FR2333297B1 - - Google Patents

Info

Publication number
FR2333297B1
FR2333297B1 FR7635826A FR7635826A FR2333297B1 FR 2333297 B1 FR2333297 B1 FR 2333297B1 FR 7635826 A FR7635826 A FR 7635826A FR 7635826 A FR7635826 A FR 7635826A FR 2333297 B1 FR2333297 B1 FR 2333297B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7635826A
Other versions
FR2333297A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba TEC Corp
Original Assignee
Tokyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Co Ltd filed Critical Tokyo Electric Co Ltd
Publication of FR2333297A1 publication Critical patent/FR2333297A1/fr
Application granted granted Critical
Publication of FR2333297B1 publication Critical patent/FR2333297B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
FR7635826A 1975-11-29 1976-11-26 Dispositif de commande d'impulsions d'horloge pour microordinateurs Granted FR2333297A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50142567A JPS5266346A (en) 1975-11-29 1975-11-29 Synch. clock control of microcomputer system

Publications (2)

Publication Number Publication Date
FR2333297A1 FR2333297A1 (fr) 1977-06-24
FR2333297B1 true FR2333297B1 (fr) 1981-06-19

Family

ID=15318319

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7635826A Granted FR2333297A1 (fr) 1975-11-29 1976-11-26 Dispositif de commande d'impulsions d'horloge pour microordinateurs

Country Status (6)

Country Link
US (1) US4095267A (fr)
JP (1) JPS5266346A (fr)
CA (1) CA1070847A (fr)
DE (1) DE2654050C3 (fr)
FR (1) FR2333297A1 (fr)
GB (1) GB1568225A (fr)

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US4276594A (en) * 1978-01-27 1981-06-30 Gould Inc. Modicon Division Digital computer with multi-processor capability utilizing intelligent composite memory and input/output modules and method for performing the same
US4409671A (en) * 1978-09-05 1983-10-11 Motorola, Inc. Data processor having single clock pin
US4330844A (en) * 1979-12-12 1982-05-18 Honeywell Information Systems Inc. Logic timing system for tape device adapter
US4476527A (en) * 1981-12-10 1984-10-09 Data General Corporation Synchronous data bus with automatically variable data rate
JPS58121864A (ja) * 1982-01-14 1983-07-20 Konishiroku Photo Ind Co Ltd シエ−デイング補正装置
US4722070A (en) * 1982-12-21 1988-01-26 Texas Instruments Incorporated Multiple oscillation switching circuit
DE3247834A1 (de) * 1982-12-23 1984-06-28 Siemens AG, 1000 Berlin und 8000 München Schaltkreis-baustein
US4872107A (en) * 1983-04-22 1989-10-03 International Business Machines Corporation Floppy disk controller with means to change clock rate automatically
US4725944A (en) * 1983-11-14 1988-02-16 Tandem Computers Incorporated Electronic communication clocking mechanism
JPH0642227B2 (ja) * 1983-12-29 1994-06-01 富士通株式会社 デ−タ転送装置
GB8501988D0 (en) * 1985-01-26 1985-02-27 Robertson J A Speed of microprocessors
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JPS61217817A (ja) * 1985-03-23 1986-09-27 Fujitsu Ltd デ−タおよびタイミング信号入力回路
US4716525A (en) * 1985-04-15 1987-12-29 Concurrent Computer Corporation Peripheral controller for coupling data buses having different protocol and transfer rates
JPH0693216B2 (ja) * 1987-04-27 1994-11-16 株式会社日立製作所 情報処理装置
US5060134A (en) * 1988-05-12 1991-10-22 Motorola, Inc. Action direction port expansion circuit and system
US4943984A (en) * 1988-06-24 1990-07-24 International Business Machines Corporation Data processing system parallel data bus having a single oscillator clocking apparatus
JPH0276056A (ja) * 1988-09-13 1990-03-15 Toshiba Corp 情報処理装置
US5193193A (en) * 1988-09-14 1993-03-09 Silicon Graphics, Inc. Bus control system for arbitrating requests with predetermined on/off time limitations
US5179667A (en) * 1988-09-14 1993-01-12 Silicon Graphics, Inc. Synchronized DRAM control apparatus using two different clock rates
US5367662A (en) * 1988-09-16 1994-11-22 Hitachi, Ltd. Distributed machine state controlled processor system with a CPU clocked with a reference signal delayed from a system clock
US5537602A (en) * 1988-09-16 1996-07-16 Hitachi, Ltd. Process system for controlling bus system to communicate data between resource and processor
US5115503A (en) * 1989-01-12 1992-05-19 Dell U.S.A. Corporation System for adapting its clock frequency to that of an associated bus only when it requires usage thereof
US5237676A (en) * 1989-01-13 1993-08-17 International Business Machines Corp. High speed data transfer system which adjusts data transfer speed in response to indicated transfer speed capability of connected device
US4958309A (en) * 1989-01-30 1990-09-18 Nrc Corporation Apparatus and method for changing frequencies
GB2228598A (en) * 1989-02-28 1990-08-29 Ibm Clock signal generator for a data processing system
US5235698A (en) * 1989-09-12 1993-08-10 Acer Incorporated Bus interface synchronization control system
US5077686A (en) * 1990-01-31 1991-12-31 Stardent Computer Clock generator for a computer system
GB2243006B (en) * 1990-04-02 1994-07-20 Pioneer Electronic Corp Digital signal processing device and audio apparatus using the same
US5255323A (en) * 1990-04-02 1993-10-19 Pioneer Electronic Corporation Digital signal processing device and audio apparatus using the same
US5263172A (en) * 1990-04-16 1993-11-16 International Business Machines Corporation Multiple speed synchronous bus having single clock path for providing first or second clock speed based upon speed indication signals
JP3089646B2 (ja) * 1990-05-17 2000-09-18 日本電気株式会社 Ｐｗｍ出力回路
KR920003128A (ko) * 1990-07-31 1992-02-29 이헌조 시계용 기준 주파수 듀얼 선택 방법
US5309561A (en) * 1990-09-28 1994-05-03 Tandem Computers Incorporated Synchronous processor unit with interconnected, separately clocked processor sections which are automatically synchronized for data transfer operations
GB2252432B (en) * 1991-02-01 1994-09-28 Intel Corp Method and apparatus for operating a computer bus using selectable clock frequencies
ATE179810T1 (de) * 1991-03-01 1999-05-15 Advanced Micro Devices Inc Mikroprozessor mit externem speicher
JP2550444B2 (ja) * 1991-03-07 1996-11-06 富士通株式会社 デバイス制御装置
JPH0553985A (ja) * 1991-08-29 1993-03-05 Nec Corp プロセツサおよびその駆動方法
US5333293A (en) * 1991-09-11 1994-07-26 Compaq Computer Corp. Multiple input frequency memory controller
US5842029A (en) * 1991-10-17 1998-11-24 Intel Corporation Method and apparatus for powering down an integrated circuit transparently and its phase locked loop
US5935253A (en) * 1991-10-17 1999-08-10 Intel Corporation Method and apparatus for powering down an integrated circuit having a core that operates at a speed greater than the bus frequency
GB2260631B (en) * 1991-10-17 1995-06-28 Intel Corp Microprocessor 2X core design
US5634041A (en) * 1992-08-12 1997-05-27 Massachusetts Institute Of Technology Rationally clocked communication interface
US5473767A (en) * 1992-11-03 1995-12-05 Intel Corporation Method and apparatus for asynchronously stopping the clock in a processor
US5392437A (en) * 1992-11-06 1995-02-21 Intel Corporation Method and apparatus for independently stopping and restarting functional units
KR0138973B1 (ko) * 1992-11-23 1998-06-15 죤 에이취.무어 클럭 주파수를 제어하여 전자 회로의 전력 소모를 최소화시키는 방법 및 장치
US5586332A (en) * 1993-03-24 1996-12-17 Intel Corporation Power management for low power processors through the use of auto clock-throttling
SG48805A1 (en) * 1994-02-04 1998-05-18 Intel Corp Method and apparatus for control of power consumption in a computer system
US5600824A (en) * 1994-02-04 1997-02-04 Hewlett-Packard Company Clock generating means for generating bus clock and chip clock synchronously having frequency ratio of N-1/N responsive to synchronization signal for inhibiting data transfer
SG47976A1 (en) * 1994-05-10 1998-04-17 Intel Corp Method and apparatus for providing synchronous data transmission between digital devices operating at frequencies having a p/q integer ratio relationship
US5513152A (en) * 1994-06-22 1996-04-30 At&T Global Information Solutions Company Circuit and method for determining the operating performance of an integrated circuit
JP3505018B2 (ja) * 1994-11-22 2004-03-08 株式会社ルネサステクノロジ 半導体集積回路
GB2304427A (en) * 1995-08-19 1997-03-19 Motorola Israel Ltd Dynamic clock rate control
US5838995A (en) * 1995-12-18 1998-11-17 International Business Machines Corporation System and method for high frequency operation of I/O bus
US5834956A (en) * 1995-12-29 1998-11-10 Intel Corporation Core clock correction in a 2/N mode clocking scheme
US5802132A (en) * 1995-12-29 1998-09-01 Intel Corporation Apparatus for generating bus clock signals with a 1/N characteristic in a 2/N mode clocking scheme
US5821784A (en) * 1995-12-29 1998-10-13 Intel Corporation Method and apparatus for generating 2/N mode bus clock signals
US5754867A (en) * 1996-03-20 1998-05-19 Vlsi Technology, Inc. Method for optimizing performance versus power consumption using external/internal clock frequency ratios
US5916311A (en) * 1996-03-27 1999-06-29 Matsushita Electric Industrial Co., Ltd. Bus controller and information processing device providing reduced idle cycle time during synchronization
US5826067A (en) * 1996-09-06 1998-10-20 Intel Corporation Method and apparatus for preventing logic glitches in a 2/n clocking scheme
US5862373A (en) * 1996-09-06 1999-01-19 Intel Corporation Pad cells for a 2/N mode clocking scheme
US5794019A (en) * 1997-01-22 1998-08-11 International Business Machines Corp. Processor with free running clock with momentary synchronization to subsystem clock during data transfers
JPH11184554A (ja) * 1997-12-24 1999-07-09 Mitsubishi Electric Corp クロック制御タイプ情報処理装置
FR2793091B1 (fr) 1999-04-30 2001-06-08 France Telecom Dispositif d'asservissement de frequence
US7100061B2 (en) * 2000-01-18 2006-08-29 Transmeta Corporation Adaptive power control
DE10046620A1 (de) * 2000-09-20 2002-03-28 Bosch Gmbh Robert Steuergerät zum Steuern/Regeln der Betriebsabläufe bei einem Kraftfahrzeug und ein Verfahren zur Inbetriebnahme eines solchen Steuergerätes
JP3995142B2 (ja) * 2001-11-12 2007-10-24 沖電気工業株式会社 半導体集積回路
JP5173751B2 (ja) * 2008-11-10 2013-04-03 パナソニック株式会社 同期・非同期制御部を有するコンピュータシステム

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3750107A (en) * 1971-10-27 1973-07-31 Sci Tek Inc Method and system for processing characters on a real time basis
JPS4940036A (fr) * 1972-08-16 1974-04-15
US3879710A (en) * 1974-03-01 1975-04-22 Rca Corp Data processor for a loop data communications system

Also Published As

Publication number Publication date
GB1568225A (en) 1980-05-29
FR2333297A1 (fr) 1977-06-24
DE2654050B2 (de) 1978-08-17
DE2654050C3 (de) 1979-04-19
US4095267A (en) 1978-06-13
DE2654050A1 (de) 1977-06-08
CA1070847A (fr) 1980-01-29
JPS5266346A (en) 1977-06-01

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Legal Events

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ST Notification of lapse