FR2325247B2 - - Google Patents

Info

Publication number
FR2325247B2
FR2325247B2 FR7517672A FR7517672A FR2325247B2 FR 2325247 B2 FR2325247 B2 FR 2325247B2 FR 7517672 A FR7517672 A FR 7517672A FR 7517672 A FR7517672 A FR 7517672A FR 2325247 B2 FR2325247 B2 FR 2325247B2
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7517672A
Other languages
French (fr)
Other versions
FR2325247A2 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jeumont Schneider SA
Original Assignee
Jeumont Schneider SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jeumont Schneider SA filed Critical Jeumont Schneider SA
Priority to FR7517672A priority Critical patent/FR2325247A2/fr
Publication of FR2325247A2 publication Critical patent/FR2325247A2/fr
Application granted granted Critical
Publication of FR2325247B2 publication Critical patent/FR2325247B2/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007Fail-safe circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/0813Threshold logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
FR7517672A 1975-06-06 1975-06-06 Circuit logique et impulsionnel a securite intrinseque Granted FR2325247A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7517672A FR2325247A2 (fr) 1975-06-06 1975-06-06 Circuit logique et impulsionnel a securite intrinseque

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7517672A FR2325247A2 (fr) 1975-06-06 1975-06-06 Circuit logique et impulsionnel a securite intrinseque

Publications (2)

Publication Number Publication Date
FR2325247A2 FR2325247A2 (fr) 1977-04-15
FR2325247B2 true FR2325247B2 (enrdf_load_stackoverflow) 1978-09-22

Family

ID=9156125

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7517672A Granted FR2325247A2 (fr) 1975-06-06 1975-06-06 Circuit logique et impulsionnel a securite intrinseque

Country Status (1)

Country Link
FR (1) FR2325247A2 (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2524738B1 (fr) * 1982-04-02 1986-05-16 Jeumont Schneider Circuit temporisateur a securite intrinseque
EP0604651B1 (en) * 1992-07-16 1998-03-04 The Nippon Signal Co. Ltd. Fail-safe logical operation circuit using electromagnetic coupling

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1933713B2 (de) * 1969-06-28 1971-09-02 Schaltungsanordnung zur logischen verknuepfung wechsel spannungsfoermiger eingangssignale

Also Published As

Publication number Publication date
FR2325247A2 (fr) 1977-04-15

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