FR2232149A1 - Variable delay for analog data signals - A-D converter, shift register, multiplexer, D-A converter, demultiplexer, memory, attenuators, adder - Google Patents

Variable delay for analog data signals - A-D converter, shift register, multiplexer, D-A converter, demultiplexer, memory, attenuators, adder

Info

Publication number
FR2232149A1
FR2232149A1 FR7320017A FR7320017A FR2232149A1 FR 2232149 A1 FR2232149 A1 FR 2232149A1 FR 7320017 A FR7320017 A FR 7320017A FR 7320017 A FR7320017 A FR 7320017A FR 2232149 A1 FR2232149 A1 FR 2232149A1
Authority
FR
France
Prior art keywords
converter
demultiplexer
multiplexer
shift register
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7320017A
Other languages
French (fr)
Other versions
FR2232149B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telemecanique SA
Original Assignee
Telemecanique Electrique SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telemecanique Electrique SA filed Critical Telemecanique Electrique SA
Priority to FR7320017A priority Critical patent/FR2232149A1/en
Publication of FR2232149A1 publication Critical patent/FR2232149A1/en
Application granted granted Critical
Publication of FR2232149B1 publication Critical patent/FR2232149B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks

Abstract

The variable delay circuit, for analog data signals, contains an input analog/digital converter (3) whose outputs supply a shift register (4) a digital multiplexer (5) coupled to the shift register outputs and supplying a digital/analog converter (6) and analog demultiplexer (7) coupled to the converter output and feeding an analog memory (8) and a matrix of attenuation elements (9) connected to the memory outputs and to the inputs of an output summation circuit (10). The two converters, the register, and the multiplexer and demultiplexer are controlled by a common control circuit (1) supplied with variable frequency timing signals.
FR7320017A 1973-06-01 1973-06-01 Variable delay for analog data signals - A-D converter, shift register, multiplexer, D-A converter, demultiplexer, memory, attenuators, adder Granted FR2232149A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7320017A FR2232149A1 (en) 1973-06-01 1973-06-01 Variable delay for analog data signals - A-D converter, shift register, multiplexer, D-A converter, demultiplexer, memory, attenuators, adder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7320017A FR2232149A1 (en) 1973-06-01 1973-06-01 Variable delay for analog data signals - A-D converter, shift register, multiplexer, D-A converter, demultiplexer, memory, attenuators, adder

Publications (2)

Publication Number Publication Date
FR2232149A1 true FR2232149A1 (en) 1974-12-27
FR2232149B1 FR2232149B1 (en) 1977-12-30

Family

ID=9120385

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7320017A Granted FR2232149A1 (en) 1973-06-01 1973-06-01 Variable delay for analog data signals - A-D converter, shift register, multiplexer, D-A converter, demultiplexer, memory, attenuators, adder

Country Status (1)

Country Link
FR (1) FR2232149A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108011621A (en) * 2017-12-01 2018-05-08 深圳先进技术研究院 A kind of programmable Time-delayed trigger impulsive synchronization device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3303335A (en) * 1963-04-25 1967-02-07 Cabell N Pryor Digital correlation system having an adjustable impulse generator
US3613030A (en) * 1969-03-12 1971-10-12 Ericsson Telefon Ab L M Filter with a periodic transfer characteristic

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3303335A (en) * 1963-04-25 1967-02-07 Cabell N Pryor Digital correlation system having an adjustable impulse generator
US3613030A (en) * 1969-03-12 1971-10-12 Ericsson Telefon Ab L M Filter with a periodic transfer characteristic

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
"S(IMULATION OF TIMEDISPERSED FADING CHANNELS" MARTINSON ET AUTRES ) *
ARTICLE "THE(US "RCA REVIEW", VOLUME) *
UE28, NO. 4, DECEMBRE 1967, PAGES 710 - 730 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108011621A (en) * 2017-12-01 2018-05-08 深圳先进技术研究院 A kind of programmable Time-delayed trigger impulsive synchronization device

Also Published As

Publication number Publication date
FR2232149B1 (en) 1977-12-30

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