FR2162039A1 - - Google Patents

Info

Publication number
FR2162039A1
FR2162039A1 FR7242338A FR7242338A FR2162039A1 FR 2162039 A1 FR2162039 A1 FR 2162039A1 FR 7242338 A FR7242338 A FR 7242338A FR 7242338 A FR7242338 A FR 7242338A FR 2162039 A1 FR2162039 A1 FR 2162039A1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7242338A
Other languages
French (fr)
Other versions
FR2162039B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
ITT Inc
Original Assignee
Deutsche ITT Industries GmbH
ITT Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH, ITT Industries Inc filed Critical Deutsche ITT Industries GmbH
Publication of FR2162039A1 publication Critical patent/FR2162039A1/fr
Application granted granted Critical
Publication of FR2162039B1 publication Critical patent/FR2162039B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02145Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
FR7242338A 1971-12-02 1972-11-29 Expired FR2162039B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB5596071A GB1357210A (en) 1971-12-02 1971-12-02 Method of manufacturing semiconductor devices

Publications (2)

Publication Number Publication Date
FR2162039A1 true FR2162039A1 (en) 1973-07-13
FR2162039B1 FR2162039B1 (en) 1976-04-23

Family

ID=10475341

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7242338A Expired FR2162039B1 (en) 1971-12-02 1972-11-29

Country Status (3)

Country Link
DE (1) DE2257216A1 (en)
FR (1) FR2162039B1 (en)
GB (1) GB1357210A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2325196A1 (en) * 1975-09-19 1977-04-15 Ibm SEMICONDUCTOR DEVICE PRESENTING REDUCED SURFACE LEAKAGE CURRENTS AND MANUFACTURING PROCESS

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3360695A (en) * 1965-08-02 1967-12-26 Sprague Electric Co Induced region semiconductor device
FR2033724A5 (en) * 1969-03-27 1970-12-04 Nal Semiconductor Corp

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3360695A (en) * 1965-08-02 1967-12-26 Sprague Electric Co Induced region semiconductor device
FR2033724A5 (en) * 1969-03-27 1970-12-04 Nal Semiconductor Corp

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
*REVUE US "SOLID-STATE ELECTRONICS", VOL. 12, NO. 5, MAI 1969 "ELECTRICAL PROPERTIES OF DIFFUSED ZINC ON SIO2-SI MOS STRUCTURES" CHUN-YEN ET KUEY-YEAU TSAO, PAGES 411-415 *
OCTOBRE 1970, "FET WITH HIGH THICK-TO-THIN OXYDE THRESHOLD VOLTAGE RATIOS", L.H.KAPLAN ET AL, PAGES 1058-1059 *
REVUE US "IBM TECHNICAL DISCLOSURE BULLETIN", VOL. 13, NO. 5 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2325196A1 (en) * 1975-09-19 1977-04-15 Ibm SEMICONDUCTOR DEVICE PRESENTING REDUCED SURFACE LEAKAGE CURRENTS AND MANUFACTURING PROCESS

Also Published As

Publication number Publication date
DE2257216A1 (en) 1973-06-14
GB1357210A (en) 1974-06-19
FR2162039B1 (en) 1976-04-23

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Legal Events

Date Code Title Description
ST Notification of lapse