FI19992361A - Integroitujen piirien valmistusmenetelmä - Google Patents

Integroitujen piirien valmistusmenetelmä

Info

Publication number
FI19992361A
FI19992361A FI992361A FI19992361A FI19992361A FI 19992361 A FI19992361 A FI 19992361A FI 992361 A FI992361 A FI 992361A FI 19992361 A FI19992361 A FI 19992361A FI 19992361 A FI19992361 A FI 19992361A
Authority
FI
Finland
Prior art keywords
manufacturing process
integrated circuits
circuits
integrated
manufacturing
Prior art date
Application number
FI992361A
Other languages
English (en)
Swedish (sv)
Inventor
Tapio Kuiri
Original Assignee
Nokia Mobile Phones Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Mobile Phones Ltd filed Critical Nokia Mobile Phones Ltd
Priority to FI992361A priority Critical patent/FI19992361A/fi
Priority to EP00660190A priority patent/EP1096560A3/en
Publication of FI19992361A publication Critical patent/FI19992361A/fi
Priority to US10/202,642 priority patent/US20020192864A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
FI992361A 1999-11-01 1999-11-01 Integroitujen piirien valmistusmenetelmä FI19992361A (fi)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FI992361A FI19992361A (fi) 1999-11-01 1999-11-01 Integroitujen piirien valmistusmenetelmä
EP00660190A EP1096560A3 (en) 1999-11-01 2000-10-25 Method of manufacturing integrated circuits with intermediate manufacturing quality controlling measurements
US10/202,642 US20020192864A1 (en) 1999-11-01 2002-07-23 Method of manufacturing integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI992361A FI19992361A (fi) 1999-11-01 1999-11-01 Integroitujen piirien valmistusmenetelmä

Publications (1)

Publication Number Publication Date
FI19992361A true FI19992361A (fi) 2001-05-02

Family

ID=8555542

Family Applications (1)

Application Number Title Priority Date Filing Date
FI992361A FI19992361A (fi) 1999-11-01 1999-11-01 Integroitujen piirien valmistusmenetelmä

Country Status (3)

Country Link
US (1) US20020192864A1 (fi)
EP (1) EP1096560A3 (fi)
FI (1) FI19992361A (fi)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006040767A1 (de) * 2006-08-31 2008-03-13 Advanced Micro Devices, Inc., Sunnyvale System und Verfahren für die standardisierte Prozessüberwachung in einer komplexen Fertigungsumgebung

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4769883A (en) * 1983-03-07 1988-09-13 Westinghouse Electric Corp. Method for tuning a microwave integrated circuit
JP2675411B2 (ja) * 1989-02-16 1997-11-12 三洋電機株式会社 半導体集積回路の製造方法
US4975141A (en) * 1990-03-30 1990-12-04 International Business Machines Corporation Laser ablation for plasma etching endpoint detection
EP0496491A1 (en) * 1991-01-22 1992-07-29 National Semiconductor Corporation Leadless chip resistor capacitor carrier for hybrid circuits and a method of making the same
FR2710192B1 (fr) * 1991-07-29 1996-01-26 Gen Electric Composant micro-onde ayant des caractéristiques fonctionnelles ajustées et procédé d'ajustement.

Also Published As

Publication number Publication date
EP1096560A2 (en) 2001-05-02
US20020192864A1 (en) 2002-12-19
EP1096560A3 (en) 2001-08-16

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Legal Events

Date Code Title Description
MA Patent expired