ES8302385A1 - Un circuito cerrado enclavado en fase que produce una senal de salida que tiene una frecuencia enclavada a la frecuenciade una senal de entrada. - Google Patents

Un circuito cerrado enclavado en fase que produce una senal de salida que tiene una frecuencia enclavada a la frecuenciade una senal de entrada.

Info

Publication number
ES8302385A1
ES8302385A1 ES506676A ES506676A ES8302385A1 ES 8302385 A1 ES8302385 A1 ES 8302385A1 ES 506676 A ES506676 A ES 506676A ES 506676 A ES506676 A ES 506676A ES 8302385 A1 ES8302385 A1 ES 8302385A1
Authority
ES
Spain
Prior art keywords
phase
loop
interlocked
initialization
closed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES506676A
Other languages
English (en)
Other versions
ES506676A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CBS Corp
Original Assignee
Westinghouse Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Westinghouse Electric Corp filed Critical Westinghouse Electric Corp
Publication of ES506676A0 publication Critical patent/ES506676A0/es
Publication of ES8302385A1 publication Critical patent/ES8302385A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06—Demodulator circuits; Receiver circuits
    • H04L27/066—Carrier recovery circuits

Abstract

CIRCUITO CERRADO ENCLAVADO EN FASE. EL CIRCUITO CERRADO (10) ENCLAVADO EN FASE PRODUCE UNA SEÑAL DE SALIDA DE VARIABLE (V<051><052><053>) ENCLAVADA EN FASE Y FRECUENCIA A UNA SEÑAL DE ENTRADA (V<054><009>). CONSTA DE: OSCILADOR CONTROLADO POR TENSION (12, VCO); DETECTORES DE FASE DE RETROALIMENTACION (14, 17); AMPLIFICADOR (18); DETECTOR (20) DE DIFERENCIA DE FRECUENCIA; FILTRO (15); CONMUTADOR (22); E INTEGRADOR (23) PRODUCTOR DE TENSION DE CONTROL PARA EL OSCILADOR (12).
ES506676A 1980-10-31 1981-10-29 Un circuito cerrado enclavado en fase que produce una senal de salida que tiene una frecuencia enclavada a la frecuenciade una senal de entrada. Expired ES8302385A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/202,554 US4365211A (en) 1980-10-31 1980-10-31 Phase-locked loop with initialization loop

Publications (2)

Publication Number Publication Date
ES506676A0 ES506676A0 (es) 1983-01-01
ES8302385A1 true ES8302385A1 (es) 1983-01-01

Family

ID=22750359

Family Applications (1)

Application Number Title Priority Date Filing Date
ES506676A Expired ES8302385A1 (es) 1980-10-31 1981-10-29 Un circuito cerrado enclavado en fase que produce una senal de salida que tiene una frecuencia enclavada a la frecuenciade una senal de entrada.

Country Status (8)

Country Link
US (1) US4365211A (es)
EP (1) EP0051473B1 (es)
JP (1) JPS57106241A (es)
BR (1) BR8107034A (es)
DE (1) DE3171060D1 (es)
ES (1) ES8302385A1 (es)
MX (1) MX152567A (es)
ZA (1) ZA817156B (es)

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JPS5850827A (ja) * 1981-09-08 1983-03-25 Fujitsu Ltd フェーズ・ロック・ループ回路
US4484152A (en) * 1982-05-19 1984-11-20 Westinghouse Electric Corp. Phase-locked loop having improved locking capabilities
JPS6014522A (ja) * 1983-07-06 1985-01-25 Mitsubishi Electric Corp デジタル信号に同期したクロツク信号発生装置
GB2143385A (en) * 1983-07-13 1985-02-06 Plessey Co Plc Phase lock loop circuit
US4583060A (en) * 1983-08-22 1986-04-15 Rca Corporation High speed voltage tunable frequency filter or frequency generator
US4580107A (en) * 1984-06-06 1986-04-01 The United States Of America As Represented By The Secretary Of The Air Force Phase lock acquisition system having FLL for coarse tuning and PLL for fine tuning
FR2573592B1 (fr) * 1984-11-20 1993-12-10 Bull Sa Circuit oscillateur asservi en phase a un signal de frequence predeterminee
US4593254A (en) * 1984-12-14 1986-06-03 International Business Machines Corp. VCO centering circuit
JPS61150525A (ja) * 1984-12-25 1986-07-09 Nec Corp 位相同期回路
US4829545A (en) * 1986-08-25 1989-05-09 Guzik Technical Enterprises, Inc. Method and apparatus for data window centering ina multifrequency data separator
US4835481A (en) * 1986-09-30 1989-05-30 Siemens Aktiengesellschaft Circuit arrangement for generating a clock signal which is synchronous in respect of frequency to a reference frequency
US4787097A (en) * 1987-02-11 1988-11-22 International Business Machines Corporation NRZ phase-locked loop circuit with associated monitor and recovery circuitry
US4806879A (en) * 1987-05-01 1989-02-21 Ecrm Incorporated Method and apparatus for synchronizing to a pulse train packet signal
JP2520697B2 (ja) * 1987-10-23 1996-07-31 アンリツ株式会社 位相信号濾波装置
IT1223524B (it) * 1987-12-18 1990-09-19 Honeywell Bull Spa Circuito ad aggancio di fase autotarante
GB2223136B (en) * 1988-03-28 1992-10-14 Plessey Co Plc Broad band vco control system for clock recovery
DE3816696A1 (de) * 1988-05-17 1989-11-30 Philips Patentverwaltung Schaltungsanordnung zum synchronisieren eines in der frequenz steuerbaren oszillators
US4882549A (en) * 1988-11-16 1989-11-21 Zvi Galani Center offset microwave frequency synthesizer
US4885553A (en) * 1988-11-30 1989-12-05 Motorola, Inc. Continuously adaptive phase locked loop synthesizer
FR2651937B1 (fr) * 1989-09-14 1994-04-08 Alcatel Espace Transpondeur de mise a poste d'un satellite.
FR2661752B1 (fr) * 1990-05-07 1992-07-10 Dassault Electronique Recepteur d'un signal electromagnetique de frequence nominale connue susceptible d'etre affecte d'une variation inconnue, notamment par decalage doppler.
US5223755A (en) * 1990-12-26 1993-06-29 Xerox Corporation Extended frequency range variable delay locked loop for clock synchronization
DE4125995A1 (de) * 1991-06-08 1992-12-10 Licentia Gmbh Empfaengeranordnung
US5142246A (en) * 1991-06-19 1992-08-25 Telefonaktiebolaget L M Ericsson Multi-loop controlled VCO
JP3137370B2 (ja) * 1991-08-07 2001-02-19 株式会社東芝 デジタルｐｌｌ回路
JP3208736B2 (ja) * 1991-11-08 2001-09-17 ソニー株式会社 Ｐｌｌ回路
JP3033654B2 (ja) * 1993-08-23 2000-04-17 日本電気株式会社 Ｐｌｌ周波数シンセサイザ
GB9320069D0 (en) * 1993-09-29 1993-11-17 Sgs Thomson Microelectronics Frequency tuning for a phase locked loop
US5512860A (en) * 1994-12-02 1996-04-30 Pmc-Sierra, Inc. Clock recovery phase locked loop control using clock difference detection and forced low frequency startup
JPH08213901A (ja) * 1995-02-02 1996-08-20 Fujitsu Ltd 位相同期回路及びこれを構成するための回路装置並びに位相同期回路を用いた電子装置
IT1279165B1 (it) * 1995-03-14 1997-12-04 Cselt Centro Studi Lab Telecom Circuito per l'estrazione del segnale di orologio da un flusso dati ad alta velocita'.
JP3824172B2 (ja) * 1995-08-14 2006-09-20 株式会社ルネサステクノロジ Ｐｌｌ回路
US5666084A (en) * 1995-12-01 1997-09-09 Motorola, Inc. Multi-level demodulator and VCO circuit
US5856753A (en) * 1996-03-29 1999-01-05 Cypress Semiconductor Corp. Output circuit for 3V/5V clock chip duty cycle adjustments
US5838205A (en) * 1997-02-18 1998-11-17 International Business Machines Corporation Variable-speed phase-locked loop system with on-the-fly switching and method therefor
US6617932B2 (en) * 2001-08-27 2003-09-09 Axe, Inc. System and method for wide dynamic range clock recovery
US20030039013A1 (en) * 2001-08-27 2003-02-27 Jones David J. Dynamic dispersion compensation in high-speed optical transmission systems
US7317778B2 (en) * 2003-01-31 2008-01-08 Hewlett-Packard Development Company, L.P. Phase-locked loop control circuit
US20080158076A1 (en) * 2006-12-28 2008-07-03 Broadcom Corporation Dynamically adjustable narrow bandwidth antenna for wide band systems
CN109121058B (zh) * 2018-07-06 2020-11-06 江西洪都航空工业集团有限责任公司 一种音频信号的测试方法

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Publication number Priority date Publication date Assignee Title
US3241084A (en) * 1962-10-29 1966-03-15 Motorola Inc System to extend the control range of phase locked oscillators
US3447084A (en) * 1966-01-03 1969-05-27 Bell Telephone Labor Inc Correction of frequency shift in carrier systems
JPS5136026B1 (es) * 1970-04-10 1976-10-06
US3660781A (en) * 1970-10-19 1972-05-02 Bendix Corp Low power frequency synthesizer with two phase locking loops
JPS5247176B2 (es) * 1972-08-30 1977-11-30
US3909735A (en) * 1974-04-04 1975-09-30 Ncr Co Slow switch for bandwidth change in phase-locked loop
JPS5126452A (es) * 1974-08-29 1976-03-04 Fujitsu Ltd
JPS529354A (en) * 1975-07-11 1977-01-24 Hitachi Ltd Phase lock circuit
JPS5252616A (en) * 1975-10-27 1977-04-27 Fujitsu Ltd Synchronous signal generating circuit in data reading device
NL174417C (nl) * 1976-08-20 1984-06-01 Philips Nv Fasevergrendellus met omschakelbaar lusfilter.
US4069462A (en) * 1976-12-13 1978-01-17 Data General Corporation Phase-locked loops
US4125815A (en) * 1977-10-27 1978-11-14 Rca Corporation Phase lock loop indicator
FR2408243A1 (fr) * 1977-11-04 1979-06-01 Cit Alcatel Boucle a verrouillage de phase
US4151463A (en) * 1978-02-02 1979-04-24 Bell Telephone Laboratories, Incorporated Phase locked loop indicator
US4135166A (en) * 1978-04-26 1979-01-16 Gte Sylvania Incorporated Master timing generator
JPS5930349B2 (ja) * 1979-01-23 1984-07-26 古野電気株式会社 同期はずれ検出回路

Also Published As

Publication number Publication date
US4365211A (en) 1982-12-21
MX152567A (es) 1985-08-29
BR8107034A (pt) 1982-07-20
ES506676A0 (es) 1983-01-01
EP0051473A1 (en) 1982-05-12
EP0051473B1 (en) 1985-06-19
ZA817156B (en) 1983-01-26
DE3171060D1 (en) 1985-07-25
JPS57106241A (en) 1982-07-02

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 20000601