ES282203A1 - Un método de fabricar un dispositivo semiconductor - Google Patents
Un método de fabricar un dispositivo semiconductorInfo
- Publication number
- ES282203A1 ES282203A1 ES282203A ES282203A ES282203A1 ES 282203 A1 ES282203 A1 ES 282203A1 ES 282203 A ES282203 A ES 282203A ES 282203 A ES282203 A ES 282203A ES 282203 A1 ES282203 A1 ES 282203A1
- Authority
- ES
- Spain
- Prior art keywords
- translation
- manufacturing
- electrodes
- machine
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
- C25F3/00—Electrolytic etching or polishing
- C25F3/02—Etching
- C25F3/12—Etching of semiconducting materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
- Weting (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL271175 | 1961-11-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES282203A1 true ES282203A1 (es) | 1963-01-16 |
Family
ID=19753400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES282203A Expired ES282203A1 (es) | 1961-11-08 | 1962-11-06 | Un método de fabricar un dispositivo semiconductor |
Country Status (6)
-
0
- BE BE624483D patent/BE624483A/xx unknown
- NL NL271175D patent/NL271175A/xx unknown
-
1962
- 1962-11-03 DE DE19621464296 patent/DE1464296B2/de active Pending
- 1962-11-05 GB GB4175662A patent/GB953829A/en not_active Expired
- 1962-11-05 CH CH1292462A patent/CH406442A/de unknown
- 1962-11-06 ES ES282203A patent/ES282203A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE1464296B2 (de) | 1971-02-25 |
GB953829A (en) | 1964-04-02 |
NL271175A (US07922777-20110412-C00004.png) | |
CH406442A (de) | 1966-01-31 |
DE1464296A1 (de) | 1968-12-05 |
BE624483A (US07922777-20110412-C00004.png) |
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