ES2710080B2 - Controller and control method of a diode stack - Google Patents

Controller and control method of a diode stack Download PDF

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Publication number
ES2710080B2
ES2710080B2 ES201731228A ES201731228A ES2710080B2 ES 2710080 B2 ES2710080 B2 ES 2710080B2 ES 201731228 A ES201731228 A ES 201731228A ES 201731228 A ES201731228 A ES 201731228A ES 2710080 B2 ES2710080 B2 ES 2710080B2
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capacitor
c1
controller
characterized
transistor
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ES2710080A1 (en
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Hervás Sergio Rodríguez
Rodas Miguel Sánchez
Rivera Horacio Lamela
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Universidad Carlos III de Madrid
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/04Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042Electrical excitation ; Circuits therefor

Description

DESCRIPTION

Controller and control method of a diode stack

Object of the invention

The present invention relates to the field of electronics, and more specifically to the field of technology dedicated to laser source controllers.

Background of the invention

In recent years, biophotonics has concentrated great scientific and business interest. Thanks to recent technological advances, more and more information can be extracted from the interaction between light and biological tissues, giving rise to more advanced and precise diagnostic techniques. In particular, the optoacoustic effect (also called photoacoustic) is a physical phenomenon based on the conversion of ultra-short pulses of light into pressure waves, propagated by the medium in the form of ultrasound. When a pulse of light is absorbed by a material, it produces a variation of the temperature that generates, in turn, a variation of pressure that propagates through the medium. This phenomenon can be used in biomedicine to perform Optoacoustic Tomography (OAT), benefiting from the main characteristics of optical imaging techniques (high contrast and the possibility of performing spectroscopic analysis) and imaging techniques. by ultrasound (high resolution), because sound waves have less scattering in biological tissues than light. In addition, Optoacoustic Tomography uses non-ionizing radiation, so the possibility of damaging these tissues is greatly reduced. Therefore, it can be said that the OAT is a novel medicine technique for the diagnosis of cardiovascular diseases such as atherosclerosis or cancer.

In order to use a laser source in OAT applications, you must meet a series of requirements: high energy light pulses (several ^ J or even mJ), ultra short (tens or hundreds of ns) and repetition frequencies of the order of kHz to improve the resolution and acquisition times of the measures. For this, solid state lasers (Nd: YAG or Ti: Sapphire) or dye lasers have traditionally been used. However, in recent decades high power laser diodes (HPLD) have been developed, which are cheaper, more compact and have a capacity to major switching, being able to increase the frequency of the system several orders of magnitude. However, the lack of power with respect to the other types of lasers makes the combination of multiple HPLDs necessary.

A possible strategy for the combination of multiple HPLDs through a diode stack (100, DLS, of the English ‘diode laser stack’) is presented schematically. Said diode stack (100) comprises a plurality of HPLD diodes (110) grouped into one-dimensional arrays called diode rods (120) (DLB) of the English ‘laser bar diode’). Laser diode batteries (or 'diode stacks') are commonly used in LIDAR applications (in English 'Laser Imaging Detection and Ranging'), in which repetition frequencies of the order of 100 Hz and relatively pulse times are typically required widths (of the order of hundreds of microseconds). However, adapting this operating regime to the requirements of OAT applications is a significant technological challenge.

This is because the diode batteries have a high parallel parasitic capacity, the result of all P-N junctions of the parallel emitting diodes. This parallel parasitic capacitor passes current while it is charging, keeping part of the current that should pass through the laser diode and, therefore, delaying the moment in which the DLS reaches its maximum power. This results in high rise times that limit the attainable pulse time and prevent its use in photoacoustic applications.

For example, WO 2014167068 A1 presents a laser diode connected at one end to the drain of a metal-oxide-semiconductor field effect transistor (MOSFET) from the English 'Metal-Oxide-Semiconductor Field-Effect Transistor') and by the other end to a parallel capacitor. However, said circuit operates according to a technique called "quasi-resonant zero current switch" (quasi-resonant zerocurrent switch). This type of circuit takes advantage of the resonance of the RLC circuit formed by the parallel capacitor, the parasitic resistance and the parasitic inductance of the electrical path to give high current pulses in the form of half a sine. Such parasitic inductance is mainly due to the tracks of the printed circuit board (PCB), the equivalent serial inductance (ESL) of the capacitor and the pins of the components . To generate the pulses, the transistor is closed, a resonant oscillation of high current value begins and, when only one half cycle of said oscillation has occurred, the transistor is opened leaving zero the current flowing through the laser diode. While the transistor is open, the capacitor and the parasitic inductance are charged.

This configuration has the advantage that the energy efficiency achieved is very high, because it is used to give the high current pulse, not only the energy stored in the capacitor, but also the energy that has been stored in the parasitic inductance of the circuit. However, it has the disadvantage that the range of pulse times that can be achieved is limited by the resonance of the RLC circuit, presenting less versatility for the applications described.

Specifically, there are two requirements that the duration of the optical pulse must meet in optoacoustic tomography applications:

• Stress confinement requirement: is that the pulse must be shorter than the time it takes for the ultrasound wave to propagate through the absorbent:

Figure imgf000004_0001

Dp being the size of the absorbent (equivalent to the maximum resolution of the tomographic image) and vs the speed of the sound in the middle.

• Thermal confinement requirement: is that the pulse duration has to be less than the time it takes for the absorber to dissipate the heat energy acquired by the optical pulse. To calculate the maximum time that meets this requirement, the following expression is used,

_ 2

^ <t t h ~ T ^ r T

where L is the linear length of the absorption (typically, for media where the absorption is greater than scattering, failing that, the length of the absorbent in the absorption direction) and aT is the thermal diffusivity of the medium. Generally, the stress confinement requirement is more restrictive.

The repetition frequency only affects the acquisition time of the system that receives the optoacoustic signal and can be any that respects the correct acquisition of the ultrasound signal and the interference with possible echoes. In addition, the pulse width in emission must be respected. Theoretically, it can be between less than 1 Hz and several MHz. In practice, solid state lasers, conventionally used in optoacoustics, have a repetition frequency of a few Hz; while high power laser diodes can operate at several kHz. This is the main reason why that the use of diode batteries in optoacoustics is proposed, since it allows, on the one hand, to perform the acquisition of data more quickly and, on the other hand, to perform a larger average of the samples obtained to obtain a resulting signal with better signal-to-noise ratio (SNR).

Finally, the power (P) of the optical pulse depends on the energy per pulse (E) that is desired, according to the relationship:

P = E -tp

The energy (E) required depends on the variation in pressure that can be detected, the Grüneisen parameter (r), the absorption coefficient of the material (^) and the area over which it radiates (A):

Figure imgf000005_0001

At higher power, more tissue penetration will be achieved and the optoacoustic signal will be of higher pressure and therefore easier to detect.

Therefore, there is still a need in the state of the art for an alternative method and system for controlling light emitting diode batteries capable of generating high-power ultra-short pulses that allow the use of said diode batteries in biophotonics applications.

Description of the invention

The present invention solves the problems described above by combining a MOSFET N-channel transistor and at least one high capacity capacitor that is charged during periods when the transistor is closed, avoiding the limitations caused by the resonant frequency of the circuit. RLC formed by the parasitic resistance and inductance of the electrical path.

In a first aspect of the invention a controller is presented which is connected to a diode stack through a first control port and a second control port, the diode stack having a parasitic resistance (R) and a parasitic inductance ( L). The controller is configured to generate a plurality of pulses with a pulse duration measured at half height (tp). Said pulse duration tp meets the thermal confinement requirements and stress confinement previously mentioned for an optoacoustic application. To generate said pulse emission, the controller comprises at least the following elements:

- An N-channel MOSFET transistor, whose drain is connected to the second control port. Preferably, the controller also comprises a driver connected to the MOSFET gate, the driver having rise times less than or equal to the rise times of the transistor.

- At least one first capacitor connected to the first control port, said capacitor (or the parallel combination of several first capacitors) having a capacity (C1) greater than or equal to:

Figure imgf000006_0001

where, Req is an equivalent resistance of an electrical path between the supply voltage (vDD) that includes the parasitic resistance (R) of the diode battery. In particular, said equivalent resistance is preferably:

Req = ESR + RdSon + ^ 3

where ESR is the equivalent series resistance (ESR English 'Equivalent Serial Resistance') of the first capacitor C1 and first capacitors, RD are is the resistance between drain and source of the MOSFET and a resistor R3 is a monitoring port.

For this calculation, it is assumed that the first capacitor is charged at the moment immediately before the current pulse, so that the charging voltage of the first capacitor (VC1) is equal to the supply voltage (vDD). The current flowing through the laser (ILD), or what is the same, along the previously mentioned electrical path is calculated as:

_ V Ci-VLD

1 r L D ------- ñ - e - q ---- where VLD is the voltage drop in the laser diode. The maximum of the laser current is:

l LDmax V dd 'V ld

R, eq

and the current pulse will follow the expression:

j

Vd d 'Vld ¡C \ Rc (ld ~ . -tp that

R eq

The threshold of the first capacitor previously mentioned therefore ensures that the pulse falls to half the height in the desired time.

More preferably, the at least one first capacitor is selected so that:

tp < ---- one ----

" 10 /

where f is the resonance frequency of the RLC circuit formed by the first capacitor, the parasitic inductance (L) and the equivalent resistance (Req), that is:

f = ___ one__ 2 tt VI c

Preferably, the controller further comprises all or a subset of the following resistors:

- A first resistance between the driver and the MOSFET door. Said first resistance protects the MOSFET and has a reduced value, typically recommended by the MOSFET manufacturer, such as 1 Q.

- A second resistance between the MOSFET door and ground. It also protects the MOSFET. If, due to some error or component failure, the MOSFET door is left in the air, a capacitive divider is generated between the CGD and CGS loads of said MOSFET and an uncontrolled current through it. This is avoided by placing the second resistance that verifies:

R 2 << ( í®Cgs ) one

where CGS is the load between door and source and CGDes the load between door and drain of the MOSFET.

- A third resistor connected to the source of the MOSFET and the monitoring port, which defines the proportionality between the current flowing through the laser diode and the monitoring voltage value, and which is part of the equivalent resistance.

- A fourth resistor connected to the power supply and the first capacitor, which acts as the load resistance of said first capacitor, allowing its loading in the time that the MOSFET is open. Therefore, given a repetition frequency frep and a pulse time tp:

Figure imgf000007_0001

where T is the period between pulses and tc is the maximum charge time for the capacitor. The theoretical charging time of the capacitor would be infinite since during charging the voltage of the first capacitor has the expression:

Vci =

However, it can be considered by agreement that the capacitor is charged at a time:

tc> 5 /? 4Ci

So the fourth controller resistance will verify:

* 4 < tc _ T-tp

s c¡ ~ T c [

Also preferably, the controller is implemented in a printed circuit board with ground plane on at least two faces comprising the tracks of the first control port and the second control port, allowing to minimize the grounding distance of all components connected to those clues. More preferably, the tracks connected to the first control port and the second control port have a greater width than the rest of the tracks, thus reducing their parasitic inductance.

In a second aspect of the invention a control method of a diode stack is presented which comprises generating a pulse signal with pulse duration (tp) between a first control port (vd1) and a second control port. For said generation, the method comprises at least the following steps:

- Switch a MOSFET transistor connected to the second control port through the drain.

- When the transistor is open: charge at least one first capacitor connected in parallel to the first control port. Said at least a first capacitor has a capacity (C1):

TV

c 'a ^ F eq -con

Req ~ ESR + RdSon + ^ 3

Preferably, the first capacitor is charged through a fourth resistor that verifies:

* 4 <- T-tr,

5 Cx 5C1!

Also preferably, the inverse of the resonance frequency (f) of the RLC circuit formed by the at least one first capacitor, the parasitic inductance and the equivalent resistance verifies:

Figure imgf000008_0001

- When the transistor is closed: release the voltage charged to the at least one first condenser.

- Preferably, monitor the diode battery through a third resistor connected to a transistor source and a monitoring port.

In a third aspect of the invention there is a diode stack comprising a plurality of diode bars, as well as a controller according to any of the embodiments of the first aspect of the invention. Note that any preferred option or particular implementation of the controller of the invention can also be applied to the method and diode stack of the invention. Likewise, the elements of said controller can be adapted or configured to implement any step of the method of the invention, according to any particular implementation of both.

The controller, control method and diode stack of the invention therefore allow to obtain high power pulses and low pulse time, avoiding the limitations imposed by the resistance and parasitic inductance of the electric path in conventional techniques. These and other advantages of the invention will be apparent in light of the detailed description thereof.

Description of the figures

In order to help a better understanding of the features of the invention according to a preferred example of practical realization thereof, and to complement this description, the following figures are attached as an integral part thereof, the character of which is illustrative and non-limiting:

Figure 1 shows a scheme of a diode stack known in the state of the art.

Figure 2 schematically shows an operation curve of a diode stack, as well as the comparison between a typical operating point and an operating point of photoacoustic applications.

Figure 3 exemplifies the reduction in peak power caused by reducing the pulse time with the techniques known in the state of the art.

Figure 4 shows schematically the type of target pulse, in which the maximum power is maintained by reducing the pulse time.

Figure 5 exemplifies the inputs and outputs of the controller of the invention according to a preferred embodiment thereof.

Figure 6 shows the elements that internally comprise the controller of the invention according to a preferred embodiment thereof.

Figure 7 illustrates the internal operation of the MOSFET transistor driver used by a preferred embodiment of the controller of the invention.

Figure 8 shows schematically the connection tracks between elements recorded on the base plate according to a preferred embodiment of the invention.

Preferred Embodiment of the Invention

In this text, the term "comprises" and its derivations (such as "understanding", etc.) should not be understood in an exclusive sense, that is, these terms should not be construed as excluding the possibility that what is described and defined can include more elements, stages, etc.

Figure 2 shows an example of the voltage (V LD ) - intensity (I LD ) curve of a diode stack, in which a typical operating point ( IRIP -V TIP ) is indicated, compared to a point of operation suitable for photoacoustic applications (I or P- V OP ), achieved by the present invention. As can be seen, photoacoustic applications require much higher current pulses than that obtainable by conventional laser diode control techniques known in the state of the art.

Figure 3 shows what happens when the pulse time is reduced to the levels suitable for photoacoustic applications with the drivers known in the state of the art (such as a quasi-resonant zero current switching scheme). In particular, an example of a pulse generated by the drivers known in the state of the art with a first pulse time (t P1 ) and a first pulse power (P P1 ) is presented; compared to a natural pulse of the same diode stack, with a second pulse time (t P2 ) and a second pulse power (P P2 ). As can be seen, the initial upward slope in both cases is the same, but since the rise time (inversely related to bandwidth) is much greater than the pulse time, the peak power reached is also less. In the case of the switch quasi-resonant of zero current, when the transistor opens after a half cycle to make the first pulse time (t P1 ) much less than the second pulse time (t P2 ), a significant reduction of the first power also occurs of pulse (P P1 ) with respect to the second pulse power (P P2 ).

On the contrary, Figure 4 schematically shows the type of optical pulse resulting from changing the working point of the diode stack (100) to a point with a much higher current value, in accordance with the present invention. By providing more current, the bandwidth is increased and the pulse rise time is reduced, allowing the desired power to be achieved in less time. In this way, optical pulses suitable for photoacoustics (ultra-short and high energy) are achieved. In the comparative example of the figure, it is possible to reduce the duration until the first pulse time (t P1 ), while maintaining the second pulse power (P P2 ).

Figure 5 schematically shows the inputs and outputs of a preferred embodiment of the controller (200) of the invention, which in turn implements the steps of a preferred embodiment of the method of the invention. The controller (200) comprises two output ports adapted to connect to a diode stack (100) and supply the diode current (i d ) necessary to generate a pulse train with a repetition frequency (f rep ) and a time of pulse (t p ). We will name these ports first control port (v d1 ) and second control port (v d2 ). Also, the controller (200) comprises an optional monitoring port (v m ) that provides a voltage proportional to the diode current (i d ) supplied. As for the inputs, the controller (200) comprises a first power port ( v Dd), a second power port (v g ) and a trigger signal port (v tr , in English 'trigger').

Figure 6 shows in greater detail the internal components of said controller (200), in accordance with a preferred embodiment thereof. The controller (200) comprises a N-channel MOSFET transistor (400), whose drain (D) is connected to the second control port (v d2 ). Connected to the first control port (v d1 ), the controller (200) comprises a plurality of first capacitors (C 1 ) connected in parallel. The set of first capacitors (C 1) reduces the resonant frequency of the RLC circuit formed by the own first capacitors (C 1) a parasitic resistance (R) of the stack of diodes (100) and the parasitic inductance (L) of said diode stack (100). Thus, in the pulse time (t p ) in which the diode battery (100) is emitting, the voltage in the capacitor has a quasi-flat response. Also, during the time in which the battery of diodes (100) does not emit, the first capacitors (C1) themselves accumulate a large amount of charge that they subsequently deliver in high current pulses. Therefore, the first capacitors (C1) are used as an auxiliary battery to the voltage source of the control circuit, charging at the same voltage as said circuit. By not depending on the pulse time (tp) of the resonance of the RLC circuit, but on the time in which the transistor (400) remains closed, greater versatility is achieved in terms of the pulse rate.

The transistor (400) is in turn controlled by a driver (300). The driver (300) comprises an input port (vi) through which the trigger signal that arrives through (vtr), a ground port (vgnd) and a driver power port (vcc) are introduced. It also comprises an output port (vo) that provides the control signal that is inserted into the gate (G) of the transistor (400). The values provided by the output port (vo) range between two limits that are also entered into the driver (300) through two minimum value ports (vmin) and maximum value ports (vmax). Note that in the particular implementation shown, the minimum value port (vmin) is directly connected to the ground port (vgnd), while the maximum value port (vmax) is connected to the driver power port (vcc). Also, the connection between the driver power port (vcc) and the second power port (vg) optionally comprises a second capacitor (C2) and a third parallel decoupling capacitor (C3), recommended for use in integrated circuits .

In order to protect the transistor (400), the gate (G) of the transistor is connected to the output port (vo) of the driver through a first resistor (R1) and grounded through a second resistor (R2) several orders of magnitude greater than said first resistance (R1). Also, the source (S) of the transistor is connected to the monitoring port (vm) by a third resistor (R3). For its part, the first power port (vDD) is connected to the first control port (vd1) through a fourth resistor (R4). The connection between the fourth resistor (R4) and the first power port (vDD) also includes a second capacitor (C2) and a third capacitor (C3) in parallel.

According to a particular embodiment, considering tp = 150 ns, ESR = 33 mü and RDSON = 10 mü, the described capacitors, resistors and supplies can be implemented with the following values:

- C2 = 4.7 MF.

- C3 = 100 nF.

- Ri = i n.

- R2 = i kn.

- R3 = 10 mn.

- R4 = 10 n.

- Vg = 10 V.

- V dd = 30 V.

- Req = ESR Rdson R3 = 53 mn

- Ci = 15 | jF> tp / Req = 2.83 j F.

Note that the plurality of first capacitors (C1) have a low equivalent series resistance (ESR) of the English ‘Equivalent Serial Resistance’). The ESR is a value that depends both on the technology and the morphology with which the capacitor is manufactured, as on the frequency and the value of the capacitor's capacity. Said ESR can be calculated as ESR = DF / wC, where w is the frequency, C is the capacity, and DF is a Dissipation Factor defined as the inverse of the resonant circuit quality factor, usually being provided by the manufacturer.

As for the driver (300), its characteristics are subject to the choice of transistor (400). Once said transistor (400) is chosen, the characteristics of this MOSFET will determine the value of the gate voltage (VG), typically between 8 and 12 V. In addition, the parallel of the door-drain capacity (CGD) and the capacity Door-source (CGS) will determine the peak current needed to charge the door at each pulse. Typically, a current peak greater than 1 A will be necessary. Therefore, a driver (300) is selected with a rise times less than or similar to those of the transistor (400), which can operate with pulses between 0 V and VG, and capable of giving the current necessary to charge the door (typically greater than 2 A).

Figure 7 shows the block diagram of a possible implementation of the driver (300) of the transistor (400), being able to use commercial drivers known in the prior art. The signal from the input port (vi) is amplified by an amplifier with hysteresis (370), whose output feeds to a first AND gate (380). Said AND gate (380) has a second input denied, to which an output of a first undervoltage lock module (320, from the English 'undervoltage lockout') is connected. The output of the first AND gate (380) is connected to the input of a level shifting module (390, from the English level shifter). The output of said level shift module (390) is in turn connected to the input of a second AND gate (340), at whose input Denied the output of a second undervoltage blocking module (330) is connected. Finally, the output of the second AND gate (340) is amplified in an amplifier (350) to obtain the signal that is transmitted to the output port (vo). The driver (300) also comprises a capacitor (360) between the minimum value port (vmin) and maximum value port (vmax). It also comprises a zener diode (310) between the driver power port (vcc) and the maximum value port (vmax).

Finally, Figure 8 shows schematically the connection tracks of the elements when installed on a PCB (500). Preferably, it is a class V PCB (500) with ground plane on both sides, BNC connectors for the monitoring port (vm) and the trip port (vtr), and side extensions (510) for connection with the diode stack ports (100). In particular, in an implementation example, it can be implemented on a PCB (500) with a FR-4 dielectric, although the expert can understand that it can also be implemented in other materials, preferably of equal or greater electrical permeability.

In order to reduce the inductance of the tracks through which the diode current (id) circulates, the tracks connected to said lateral extensions (510) have a greater width and a minimum length than allowed by the morphology of the components . In particular, in the scheme of Figure 8 a first track (520) with a first width (d1) can be observed that joins the first control port (vd1) to the first capacitors (C1); a second track (530) with the same first width (d1) that joins the first control port (vd1) to the transistor (400); a third track (540) with a second width (d2) that joins the fourth resistor (R4) to the first power port ( v Dd); and a fourth track (550) with a third width (d3) that joins the second power port (eg) and the driver (300). As can be seen, the first width (d1) is greater than the second width (d2), the second width being in turn greater than the third width (d3).

Also, the tracks through which the diode current (id) circulates are designed to have the ground reference as close as possible to all its points. For this reason, the plane of mass on both sides is preferably selected, with a spacing between faces as narrow as possible. Alternatively, a lower height substrate may be used or additional intermediate faces may be introduced.

The person skilled in the art may understand that the invention has been described according to some preferred embodiments thereof, but that multiple variations may be introduced into said preferred embodiments, without departing from the object of the invention as claimed.

Claims (14)

re iv in d ic ac io nes
1. - Controller (200) of a diode stack (100) comprising a first control port (vd1) and a second control port (vd2) adapted to connect to said diode stack (100) and generate a plurality of pulses with a pulse duration (tp), the diode stack having a parasitic inductance (L) and a parasitic resistance (R), characterized in that it further comprises:
- at least one first capacitor (C1) connected in parallel to the first control port ( v d1); the capacity of the first capacitor (C1) being greater than or equal to the pulse duration (tp) divided by an equivalent resistance (Req) of an electrical path between power ( v DD) and earth that includes the parasitic resistance (R); Y
- a N-channel metal-oxide-semiconductor field effect transistor (400), with a drain (D) connected to the second control port (vd2).
2. - Controller (200) according to any of the preceding claims characterized in that the inverse of the resonance frequency of the RLC circuit formed by the at least one first capacitor (C1), the parasitic inductance (L) and the equivalent resistance (Req) is greater than at least ten times the pulse time (tp).
3. - Controller (200) according to any of the preceding claims characterized in that it further comprises a driver (300) connected to a gate (G) of the transistor (400), the driver (300) having lower or equal rise times than the rise times of the transistor (400).
4. - Controller (200) according to claim 3 characterized in that it further comprises a first resistor (R1) between the driver (300) and the gate (G), and a second resistor (R2) between the gate (G) and earth, the second resistance (R2) having a value at least two orders of magnitude greater than the first resistance (R1).
5. - Controller (200) according to any one of the preceding claims characterized in that it further comprises a third resistor (R3) connected at the same end to a source (S) of the transistor (400) and a monitoring port (vm) .
6. - Controller (200) according to any of the preceding claims characterized in that it further comprises a fourth resistor (R4) connected to the supply ( v DD) and at least one first capacitor (C1), the product of the fourth resistor (R4) and the at least one first capacitor (C1) being a value less than or equal to one fifth of the difference between the time between pulses (T) and pulse duration (tp).
7. - Controller (200) according to any of the preceding claims characterized in that it comprises a printed circuit board (500) with ground plane in at least two layers.
8. - Controller (200) according to claim 7 characterized in that it comprises a printed circuit board (500) with a first track (520) between the at least one capacitor (C1) and the first control port ( v d1) , and a second track (530) between the drain (D) and the second control port ( v D2), the first track (520) and the second track (530) having a width (d1) greater than the rest of the tracks of the printed circuit board (500).
9. - Controller (200) according to any of the preceding claims characterized in that it is configured to increase the bandwidth of the optical pulses emitted by the diode stack, operating at a working point of greater current than usual.
10. - Control method of a diode stack (100) comprising generating a pulsed control signal between a first control port ( v d1) and a second control port ( v D2) with a pulse duration (tp) , the diode stack having a parasitic inductance (L) and a parasitic resistance (R), characterized in that it comprises:
- switching a metal channel-oxide-semiconductor field effect transistor (400) with a dreandor (D) connected to the second control port ( v D2); - when the transistor (400) is open, charge at least a first capacitor (C1) connected in parallel to the first control port ( v d1); the capacity of the first capacitor (C1) being greater than or equal to the pulse duration (tp) divided by an equivalent resistance (Req) of an electrical path between power ( vdd ) and earth that includes the parasitic resistance (R); Y
- when the transistor (400) is closed, release charge stored in the at least one first capacitor (C1).
11. - Method according to claim 9 characterized in that it comprises also monitor the diode stack (100) through a third resistor (R3) connected at the same end to a source (S) of the transistor (400) and a monitoring port ( v m).
12. Method according to any of claims 9 and 10 characterized in that the step of charging the at least one first capacitor (C1) further comprises charging said at least a first capacitor (C1) through a fourth resistor (R4 ), the product of the fourth resistor (R4) and the at least one first capacitor (C1) being a value less than or equal to a fifth of the difference between the time between pulses (T) and the pulse duration (tp) .
13. - Method according to any of claims 9 to 11 characterized in that the inverse of the resonance frequency of the RLC circuit formed by the at least one first capacitor (C1), the parasitic inductance (L) and the equivalent resistance ( Req) is greater than at least ten times the pulse time (tp).
14. - Diode stack (100) comprising a plurality of diodes (110) grouped in bars (120), characterized in that it further comprises a controller according to any one of claims 1 to 8.
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PCT/ES2018/070676 WO2019077187A1 (en) 2017-10-18 2018-10-17 Controller and method for controlling a diode stack

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