DATA PROCESSING
FIELD
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Various example embodiments relate to the field of telecommunication and in particular, to a method, apparatuses and a computer readable storage medium for data processing.
BACKGROUND
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In the communications area, there is a constant evolution ongoing in order to provide efficient and reliable solutions for utilizing wireless communication networks. Each new generation has it owns technical challenges for handling the different situations and processes that are needed to connect and serve devices connected to the wireless network. To meet the demand for wireless data traffic having increased since deployment of 4th generation (4G) communication systems, efforts have been made to develop an improved 5th generation (5G) or pre-5G communication system. The new communication systems can support various types of service applications for terminal devices.
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In some scenarios, processing of data streams using weights is involved. For example, currently beamforming multiplication has been implemented by beamforming multiplication HW (hardware) accelerator IP (intellectual property) on some products. For beamforming multiplication need beamforming weight and IQ (in-phase quadrature) data, generally, it is needed to feed the beamforming weight to the beamforming multiplication IP firstly, and then feed the IQ data.
SUMMARY
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In general, example embodiments of the present disclosure provide a solution for data processing.
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In a first aspect, there is provided a method for processing data. The data is to be transmitted based on a plurality of slots, a slot among the plurality of slots comprises a plurality of symbols, a datum of the data has an attribute of weight information, a plurality of segments of the weight information are subject to being updated sequentially, and the method comprises: processing, at a first symbol of a slot, a first datum of the data based on a first segment of the weight information; updating, at the first symbol and while
processing a second datum of the data based on a second segment of the weight information, the first segment of the weight information; and processing, at a second symbol of a slot, a third datum of the data based on the updated first segment of the weight information.
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In a second aspect, there is provided apparatus for processing data. The data is to be transmitted based on a plurality of slots, a slot among the plurality of slots comprises a plurality of symbols, a datum of the data has an attribute of weight information, a plurality of segments of the weight information are subject to being updated sequentially, and the apparatus comprises: at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus at least to: process, at a first symbol of a slot, a first datum of the data based on a first segment of the weight information; update, at the first symbol and while processing a second datum of the data based on a second segment of the weight information, the first segment of the weight information; and process, at a second symbol of a slot, a third datum of the data based on the updated first segment of the weight information.
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In a third aspect, there is provided an apparatus for processing data. The apparatus comprises means for processing, at a first symbol of a slot, a first datum of the data based on a first segment of the weight information; means for updating, at the first symbol and while processing a second datum of the data based on a second segment of the weight information, the first segment of the weight information; and means for processing, at a second symbol of a slot, a third datum of the data based on the updated first segment of the weight information.
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In a fourth aspect, there is provided a non-transitory computer readable medium comprising program instructions for causing an apparatus to perform at least the method according to the above first aspect.
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In a fifth aspect, there is provided a computer program comprising instructions, which, when executed by an apparatus, cause the apparatus at least to: process, at a first symbol of a slot, a first datum of the data based on a first segment of the weight information; update, at the first symbol and while processing a second datum of the data based on a second segment of the weight information, the first segment of the weight information; and process, at a second symbol of a slot, a third datum of the data based on the updated first segment of the weight information.
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In a sixth aspect, there is provided an apparatus for processing data. The
apparatus comprises processing circuitry configured to process, at a first symbol of a slot, a first datum of the data based on a first segment of the weight information; updating circuitry configured to update, at the first symbol and while processing a second datum of the data based on a second segment of the weight information, the first segment of the weight information; and the processing circuitry further configured to process, at a second symbol of a slot, a third datum of the data based on the updated first segment of the weight information.
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It is to be understood that the summary section is not intended to identify key or essential features of embodiments of the present disclosure, nor is it intended to be used to limit the scope of the present disclosure. Other features of the present disclosure will become easily comprehensible through the following description.
BRIEF DESCRIPTION OF THE DRAWINGS
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Some example embodiments will now be described with reference to the accompanying drawings, in which:
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Fig. 1A illustrates an example system in which embodiments of the present disclosure may be implemented;
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Fig. 1B illustrates a schematic diagram of beamforming weight according to some embodiments of the present disclosure;
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Fig. 2 illustrates a flowchart illustrating a method for processing data according to some embodiments of the present disclosure;
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Fig. 3 illustrates a schematic diagram of processing data and weight updating according to some embodiments of the present disclosure;
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Fig. 4 illustrates another schematic diagram of processing data and weight updating according to some other embodiments of the present disclosure;
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Fig. 5 illustrates a further schematic diagram of processing data and weight updating according to some other embodiments of the present disclosure;
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Fig. 6 illustrates an example apparatus according to some embodiments of the present disclosure;
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Fig. 7 illustrates a simplified block diagram of an apparatus that is suitable for implementing embodiments of the present disclosure; and
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Fig. 8 illustrates a block diagram of an example computer readable medium in accordance with some embodiments of the present disclosure;
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Throughout the drawings, the same or similar reference numerals represent the same or similar element.
DETAILED DESCRIPTION
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Principles of the present disclosure will now be described with reference to some example embodiments. It is to be understood that these embodiments are described for the purpose of illustration and help those skilled in the art to understand and implement the present disclosure, without suggesting any limitation as to the scope of the disclosure. The disclosure described herein can be implemented in various manners other than the ones described below.
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In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skills in the art to which this disclosure belongs.
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References in the present disclosure to “one embodiment, ” “an embodiment, ” “an example embodiment, ” and the like indicate that the embodiment described may include a particular feature, structure, or characteristic, but it is not necessary that every embodiment includes the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
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It shall be understood that although the terms “first” and “second” etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of example embodiments. As used herein, the term “and/or” includes any and all combinations of one or more of the listed terms.
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The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used
herein, the singular forms “a” , “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” , “comprising” , “has” , “having” , “includes” and/or “including” , when used herein, specify the presence of stated features, elements, and/or components etc., but do not preclude the presence or addition of one or more other features, elements, components and/or combinations thereof. As used herein, “at least one of the following: <a list of two or more elements>” and “at least one of <a list of two or more elements>” and similar wording, where the list of two or more elements are joined by “and” or “or” , mean at least any one of the elements, or at least any two or more of the elements, or at least all the elements.
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As used in this application, the term “circuitry” may refer to one or more or all of the following:
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(a) hardware-only circuit implementations (such as implementations in only analog and/or digital circuitry) and
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(b) combinations of hardware circuits and software, such as (as applicable) :
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(i) a combination of analog and/or digital hardware circuit (s) with software/firmware and
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(ii) any portions of hardware processor (s) with software (including digital signal processor (s) ) , software, and memory (ies) that work together to cause an apparatus, such as a mobile phone or server, to perform various functions) and
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(c) hardware circuit (s) and or processor (s) , such as a microprocessor (s) or a portion of a microprocessor (s) , that requires software (e.g., firmware) for operation, but the software may not be present when it is not needed for operation.
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This definition of circuitry applies to all uses of this term in this application, including in any claims. As a further example, as used in this application, the term circuitry also covers an implementation of merely a hardware circuit or processor (or multiple processors) or portion of a hardware circuit or processor and its (or their) accompanying software and/or firmware. The term circuitry also covers, for example and if applicable to the particular claim element, a baseband integrated circuit or processor integrated circuit for a mobile device or a similar integrated circuit in server, a cellular network device, or other computing or network device.
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As used herein, the term “communication network” refers to a network following any suitable communication standards, such as Long Term Evolution (LTE) , LTE-Advanced (LTE-A) , Wideband Code Division Multiple Access (WCDMA) , High-Speed Packet Access (HSPA) , Narrow Band Internet of Things (NB-IoT) and so on. Furthermore, the communications between a terminal device and a network device in the communication network may be performed according to any suitable generation communication protocols, including, but not limited to, the first generation (1G) , the second generation (2G) , 2.5G, 2.75G, the third generation (3G) , the fourth generation (4G) , 4.5G, the future fifth generation (5G) communication protocols, and/or any other protocols either currently known or to be developed in the future. Embodiments of the present disclosure may be applied in various communication systems. Given the rapid development in communications, there will of course also be future type communication technologies and systems with which the present disclosure may be embodied. It should not be seen as limiting the scope of the present disclosure to only the aforementioned system.
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As used herein, the term “network device” refers to a node in a communication network via which a terminal device accesses the network and receives services therefrom. The network device may refer to a base station (BS) or an access point (AP) , for example, a node B (NodeB or NB) , an evolved NodeB (eNodeB or eNB) , a NR NB (also referred to as a gNB) , a Remote Radio Unit (RRU) , a radio header (RH) , a remote radio head (RRH) , a relay, a low power node such as a femto, a pico, and so forth, depending on the applied terminology and technology.
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The term “terminal device” refers to any end device that may be capable of wireless communication. By way of example rather than limitation, a terminal device may also be referred to as a communication device, user equipment (UE) , a Subscriber Station (SS) , a Portable Subscriber Station, a Mobile Station (MS) , or an Access Terminal (AT) . The terminal device may include, but not limited to, a mobile phone, a cellular phone, a smart phone, voice over IP (VoIP) phones, wireless local loop phones, a tablet, a wearable terminal device, a personal digital assistant (PDA) , portable computers, desktop computer, image capture terminal devices such as digital cameras, gaming terminal devices, music storage and playback appliances, vehicle-mounted wireless terminal devices, wireless endpoints, mobile stations, laptop-embedded equipment (LEE) , laptop-mounted equipment (LME) , USB dongles, smart devices, wireless customer-premises equipment (CPE) , an Internet of Things (loT) device, a watch or other wearable, a head-mounted display (HMD) ,
a vehicle, a drone, a medical device and applications (e.g., remote surgery) , an industrial device and applications (e.g., a robot and/or other wireless devices operating in an industrial and/or an automated processing chain contexts) , a consumer electronics device, a device operating on commercial and/or industrial wireless networks, and the like. In the following description, the terms “terminal device” , “communication device” , “terminal” , “user equipment” and “UE” may be used interchangeably.
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There are some scenarios in which weights are used to process data streams. For example, sub-band beamforming and weigh update pipeline processing on beamer IP. Beamforming has been widely used on wireless communication product. As it is antenna, symbol level and layer level processing, the complexity will increase according to antenna*layer*bandwidth. So processing efficiency will significant impact HW capacity, power consumption, cost and radio performance. For some schemes in which the process is performed serially, the time consumed is the sum of two parts. The beamforming weight update is at slot level, just need to update at slot boundary, but the IQ data change is symbol level and need to update every symbol.
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So it is required that the beamforming multiplication IP can finish the beamforming weight update and beamforming multiplication at one symbol time even most of all symbols don’t need to update beamforming weight. So there is much performance waste for the beamforming multiplication IP. For example, for real time sub-band beamforming there are huge number of weights need to be feed into beamforming multiplication IP, for 100M bandwidth, 16 streams, 64 antennas and 2 PRB (physical resource block) granularity need 273 *16 *64 /2 = 139, 776 weights, that increase much more time consumed for weight update, so the performance waste is much more serious for the beamforming multiplication HW accelerator IP. And this extra beamforming weight update process will be bottleneck for beamer IP. It will increase total processing delay, also limit the amount of weight can be update in real-time. And more HW IP instance means higher cost and power consumption.
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Some example embodiments of the present disclosure provide a solution to reduce power consumption and performance waste. Principles and embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.
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Reference is first made to Fig. 1A, which illustrates an example system 100 in which embodiments of the present disclosure may be implemented. The system 100
includes a plurality of network devices, for example, a network device 120 is shown as an example. The system 100 also includes one or more terminal devices, for example, a terminal device 110 is shown as an example. The terminal device 110 and the network device 120 may transmit or receive signals by applying beamforming. Take the network device 120 as an example, the network device 120 may comprise an apparatus 130 for implementing beamforming multiplication. Although Fig. 1A shows that the apparatus 130 is included in the network device 120, embodiments of the present disclosure are not limited thereto. In some example embodiments, the apparatus 130 as described herein may be included in any other suitable communication devices shown or not shown in Fig. 1A. For example, the terminal device 110 can also have the apparatus 130 to perform beamforming multiplication or the like.
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It is to be understood that the number of the apparatus, the network device and terminal device is for the purpose of illustration without suggesting any limitations. The system 100 may include any suitable number of network devices and terminal devices adapted for implementing embodiments of the present disclosure.
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Communications in the system 100 may be implemented according to any proper communication protocol (s) , comprising, but not limited to, cellular communication protocols of the first generation (1G) , the second generation (2G) , the third generation (3G) , the fourth generation (4G) and the fifth generation (5G) and on the like, wireless local network communication protocols such as Institute for Electrical and Electronics Engineers (IEEE) 802.11 and the like, and/or any other protocols currently known or to be developed in the future. Moreover, the communication may utilize any proper wireless communication technology, comprising but not limited to: Code Division Multiple Access (CDMA) , Frequency Division Multiple Access (FDMA) , Time Division Multiple Access (TDMA) , Frequency Division Duplex (FDD) , Time Division Duplex (TDD) , Multiple-Input Multiple-Output (MIMO) , Orthogonal Frequency Division Multiple (OFDM) , Discrete Fourier Transform spread OFDM (DFT-s-OFDM) and/or any other technologies currently known or to be developed in the future.
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Beamforming is used to improve wireless communication (4G, 5G, 6G and wifi) system radio performance. As more antennas (32, 64, 128, 256, 512, 1024…) , layers (8, 16, 24…) and wider bandwidth (100Mhz, 200Mhz, 400Mhz…) need be processed in 5G/6G and wifi6/7, so the processing load (L=k*Bandwidth*Layer*antenna) for digital beamforming significantly increase, as shown in Fig. 1B. A methods proposed by the
present disclosure can help to save 50%of beamforming IP HW instance and power consumption.
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Reference is now made to Fig. 2, which shows a flowchart illustrating a method 200 for processing data according to some embodiments of the present disclosure. The method 200 involves a scenario in which the data is to be transmitted based on a plurality of slots, and a slot among the plurality of slots comprise a plurality of symbols, in addition, a datum of the data may have an attribute of weight information. A plurality of segments of the weight information subject to being updated sequentially, for example, the weight information may be updated segment by segment. However, it is noted that, for a single segment, different weight information may be updated in the single segment in any ways, for example, in parallel, or sequentially, or in other ways.
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In the method 200, at a first symbol of a slot, an apparatus may process (210) a first datum of the data based on a first segment of the weight information. At the first symbol, while the apparatus is processing a second datum of the data based on a second segment of the weight information, the apparatus may update (220) the first segment of the weight information. At a second symbol of a slot, the apparatus may process (230) a third datum of the data based on the updated first segment of the weight information. In some embodiments, at the second symbol, while the apparatus is processing the third datum based on the updated first segment of the weight information, the apparatus may update the second segment of the weight information. At the second symbol, the apparatus may process a fourth datum of the data based on the updated second segment of the weight information.
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In some embodiments, the apparatus may be implemented as a chip. In some scenarios, for example, a scenario related to beamforming, the chip may comprise one or more beamforming multiplication IPs, and an example of the beamforming multiplication IP may be shown in Fig. 6.
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In some scenarios, for example, beamforming, specifically, a scenario applying beamforming multiplication IP, processing the data may be performing BF (beamforming) calculation, the data may be in-phase quadrature (IQ) data, and the weight information may be BF weight. For example, the first datum may be a first portion of in-phase quadrature (IQ) data obtained in the first slot, the second datum may be a second portion subsequent to the first portion of the IQ data obtained in the first slot, the third datum may be a first
portion of IQ data obtained in the second slot, and the fourth datum may be a second portion of the IQ data obtained in the second slot subsequent to the first portion of IQ datum obtained in the second slot. In these examples, the first segment of the weight information and the second segment of the weight information may be two segments of beamforming weight information for the IQ data obtained in the first slot, and the updated first segment of the weight information and the updated second segment of the weight information may be two segments of beamforming weight information for the IQ data obtained in the second slot.
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As mentioned in the examples above, the weight information comprises two segments. for some scenarios related to beamforming, the weight memory size in legacy beamforming multiplication IP is not very big, just has 128 *64 *24 weights, this is not enough for NR 100MHz (273 PRBs) 2 PRBs granularity case, that causes the beamforming weight update and beamforming multiplication can’t work in parallel. To keep the weight memory size, in some embodiments of the present disclosure, the beamforming weight update is split in two half parts, such examples may refer to Fig. 3 and Fig. 4 below (Fig. 3 illustrates a schematic diagram of processing data and weight updating according to some embodiments of the present disclosure, and Fig. 4 illustrates another schematic diagram of processing data and weight updating according to some other embodiments of the present disclosure) . For example, the first part updates the half of weights at symbol 13 (i.e. Sym13 in Fig. 3 or Fig. 4) of front slot, the second part updates the other half of weights at symbol 0 (i.e. Sym0 in Fig. 3 or Fig. 4) of behind slot. A typical NR 100MHz (273 PRBs) 2 PRBs granularity is given as an example. At first slot symbol 13 do beamforming multiplication for the front half (273/2=137) PRBs (PRB0-136) firstly, after that the weights of front half (273/2=137) PRBs can be updated by the weights of the next slot and do the beamforming multiplication for the behind half PRBs (PRB137-272) in parallel. At the next slot symbol 0 do beamforming multiplication for the front half PRBs and update the weights of the behind half PRBs of next slot in parallel firstly, after that do the beamforming multiplication for the behind half PRBs. According to some embodiments of the present disclosure, by splitting the weight buffer into two parts (PING/PONG structure) , and cyclic using it for multiple purpose in parallel, the weight buffer may be significantly reduced.
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In some other examples, the beamforming weight update may be split in more parts, for example, three parts, as shown in Fig. 5 (Fig. 5 illustrates a further schematic
diagram of processing data and weight updating according to some other embodiments of the present disclosure) below, such as weights of first part of PRB (PRB0-35) , weights of second part of PRB (PRB36-154) , and weights of third part of PRB (PRB155-272) .
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In some embodiments, the first symbol may be of a first slot and the second symbol may be of a second slot, and the second slot may be subsequent to the first slot. With reference to Fig. 3, as an example, the first symbol may be Sym13, and the first slot may be Slot0 (corresponding to Sym…, Sym10, Sym11, Sym12, Sym13) . The second symbol may be Sym0, and the second slot may be Slot1 (corresponding to Sym0, Sym1, Sym2, Sym3, Sym…) .
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As shown in Fig. 3, the first symbol may be Sym13, and the second symbol may be Sym0. At a first symbol of a slot, an apparatus may process (210) a first datum of the data based on a first segment of the weight information, specifically, in this example, at 301, the apparatus may perform, based on a first segment of the weight information, the BF calculation for a first beamforming data at Sym13. At Sym13, while the apparatus is processing the second datum, for example, performing the BF calculation for a second beamforming data, the apparatus simultaneously updates the first segment of the weight information, as shown in Fig. 3, operations at 302 and 303 are performed in parallel. Similarly, as shown at 304 and 305, BF calculating at 304 and BF weight updating at 305 are performed in parallel.
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In some embodiments, the first segment of the weight information and the second segment of the weight information are for processing a plurality of data obtained in a plurality of symbols of the first slot, and the updated first segment of the weight information and the updated second segment of the weight information are for processing a plurality of data obtained in a plurality of symbols of the second slot. With reference to the example of Fig. 3, the first segment of the weight information and the second segment of the weight information are for processing a plurality of data obtained in a plurality of symbols of the first slot, that is, in this example, for the symbols corresponding to the first slot, BF calculation at each of the symbols in the first slot (e.g. Slot0) is performed using the same weight information (comprising the first segment or the second segment) . the updated first segment of the weight information and the updated second segment of the weight information are for processing a plurality of data obtained in a plurality of symbols of the second slot, that is, in this example, BF calculation at each of the symbols in the second slot (e.g. Slot1) is performed using the same weight information (comprising the
updated first segment or the updated second segment) .
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In some embodiments, the first symbol is an end symbol of the first slot, and the second symbol is a start symbol of the second slot. Continuing with reference to Fig. 3, Sym13 as an example of the first symbol, is an end symbol of the Slot0, and Sym0 as an example of the second symbol, is a start symbol of the second slot.
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In some embodiments of the present disclosure, data processing and weight information updating may be performed at the same time. Take a scenario of beamforming as an example, existing beamforming multiplication IP just can do one kind of job at one time. In the scheme of the present disclosure, the apparatus (may comprise a beamforming multiplication IP) can support the beamforming weight update job and beamforming multiplication job working at same time. In this way, the processing efficiency is increased.
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While processing the second datum, in order to update the first segment of the weight information, the apparatus may execute one job of one job type to process the data and update the weight information at the same time, alternatively, the apparatus may execute two jobs of different job types to process the data and update the weight information respectively at the same time.
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As an example, the apparatus may execute a first job of a first job type and a second job of a second job type in parallel, in which the first job type is used for processing the datum and the second job type is used for updating the segment of the weight information. Continuing with reference to Fig. 3, at 302 and 303, there are two jobs of different job types, i.e. BF calculation job and weight update job. As shown at 302 and 303, BF calculation job2 and weight update job1 are executed in parallel. The BF calculation job2 is used for processing the datum corresponding to PRB 137-272, and the weight update job1 is used for updating the segment of the weight information corresponding to PRB 0-136.
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To simplify the implementation of the beamforming multiplication IP, in some examples, a new job type that combines the beamforming weight update and beamforming multiplication are proposed, and the two jobs work in parallel. As an example, with reference to Fig. 4, at 401, there is one job of one job type, in this job, two operations (i.e. BF calculation and weight update) are performed in parallel, this type of job may be referred to as a combined job. Similarly, at 402, weight update corresponding to
PRB137-272 and BF calculation corresponding to PRB0-136 are performed in parallel. From the above example, it can be seen that the time of weight update has been wiped. By supporting combined task processing, control SW (software) load and complexity may be reduced, and HW (hardware) design may be eased.
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In some embodiments, prior to processing the first datum based on the first segment of the weight information, the apparatus may process a fifth datum of the data based on a third segment of the weight information. With reference to Fig. 5, at 501, at Sym13 of the first slot, the apparatus may perform BF calculation corresponding to PRB 0-35. The BF calculation corresponding to PRB 0-35 is an example of processing the fifth datum.
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It should be noted that “the first” , “the second” , “the third” , “the fourth” and “the fifth” about the datum are to distinguish these data and do not indicate their order, and “the first” , “the second” and “the third” about the segment of the weight information are to distinguish these segments and do not indicate their order.
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Additionally, at the first symbol, while processing the first datum based on the first segment of the weight information, the apparatus may update, and the third segment of the weight information. With reference to Fig. 5, at a first symbol of a slot, the apparatus processes a first datum of the data based on a first segment of the weight information, for example, at 502, at Sym13 of the first slot, based on the weight information corresponding to PRB 36-154 (an example of the first segment of the weight information) , the apparatus performs BF calculation corresponding to PRB 36-154 (an example of processing a first datum of the data) . In the example shown in Fig. 5, while the BF calculation corresponding to PRB 36-154 is performed, the apparatus updates the weight information corresponding to PRB 237-272 (0-35) , the weight information corresponding to PRB 237-272 (0-35) is an example of the third segment of the weight information.
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At 503, at Sym13 of the first slot, while performing BF calculation corresponding to PRB 155-272 based on the weight information corresponding to PRB 155-272, the apparatus updates the weight information corresponding to PRB 36-154 (i.e. update the first segment of the weight information) . At 504, at Sym0 of the second slot, while performing BF calculation corresponding to PRB 36-154 based on the updated weight information corresponding to PRB 36-154 (i.e. the updated first segment of the weight information) , the apparatus updates the weight information corresponding to PRB 155-272 (i.e. update the
second segment of the weight information) .
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Continuing with reference to Fig. 5, in some embodiments, at the second symbol, while processing the fourth datum of the data based on the updated second segment of the weight information, the apparatus may further update the updated third segment of the weight information. For example, at 505, at Sym0 of the second slot, while performing BF calculation corresponding to PRB 155-272 based on the updated weight information corresponding to PRB 155-272 (i.e. the updated second segment of the weight information) , the apparatus updates the weight information corresponding to PRB 0-35 (i.e. update the updated third segment of the weight information) . Performing BF calculation corresponding to PRB 155-272 based on the updated weight information corresponding to PRB 155-272 is an example of processing the fourth datum of the data based on the updated second segment of the weight information. In some embodiments, the apparatus may further process a sixth datum of the data based on the further updated third segment of the weight information. As shown in Fig. 5, Performing BF calculation corresponding to PRB 0-35 based on the further updated weight information corresponding to PRB 0-35 is an example of processing a sixth datum. The further updated weight information corresponding to PRB 0-35 is an example of the further updated third segment of the weight information.
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In some embodiments, the third segment of the weight information may be updated in each of the plurality of symbols. As shown in Fig. 5, at the first slot (corresponding to Slot0, comprising Sym…, Sym10, Sym11, Sym12, Sym13) or the second slot (corresponding Slot1, comprising Sym0, Sym1, Sym2, Sym3, Sym…) , weight information corresponding to PRB 0-35 is updated at each symbol.
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In some embodiments, the fifth datum is a first portion of in-phase quadrature (IQ) data obtained in the first slot, the first datum is a second portion subsequent to the first portion of the IQ data obtained in the first slot, the second datum is a third portion subsequent to the second portion of IQ data obtained in the first slot, the third datum is a first portion of the IQ data obtained in the second slot, the fourth datum is a second portion of the IQ data obtained in the second slot subsequent to the first portion of IQ data obtained in the second slot, and the sixth datum is a third portion of the IQ data obtained in the second slot subsequent to the second portion of IQ data obtained in the second slot. With reference to Fig. 5, the fifth datum corresponds to PRB0-35, the first datum corresponds to PRB36-154, and the second datum corresponds to PRB155-272. Three data above are
three portions of the IQ data obtained at Sym13 of the first slot. Similarly, the third datum corresponds to PRB36-154, the fourth datum corresponds to PRB155-272, and the sixth datum corresponds to PRB0-35. Three data above are three portions of the IQ data obtained at Sym0 of the second slot.
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In some embodiments, the first segment of the weight information, the second segment of the weight information and the third segment of the weight information may be three segments of beamforming weight information for the IQ data obtained in the first slot. For example, with reference to Fig. 5, the weight information comprises three segments for the IQ data obtained in the first slot, i.e. weight information corresponding to PRB 0-35, PRB36-154 and PRB155-272, respectively. In some embodiments, the updated first segment of the weight information, the updated second segment of the weight information and the further updated third segment of the weight information are three segments of beamforming weight information for the IQ data obtained in the second slot. For example, with reference to Fig. 5, the weight information comprises three segments for the IQ data obtained in the second slot, i.e. weight information corresponding to PRB36-154, PRB155-272 and PRB 0-35, respectively.
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In some embodiments, the first segment of the weight information is stored in a first part of a weight buffer, and the second segment of the weight information is stored in a second part of the weight buffer. With reference to Fig. 6, Fig. 6 illustrates an example structure of an apparatus according to some embodiments of the present disclosure, as shown in Fig. 6, the first segment and the segment of the weight information are stored in two parts of the weight memory (i.e. the weight buffer) respectively.
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As shown in Fig. 6, two Read DMA (direct memory access) Ports are used to enable parallel processing beamforming multiplication and weight update. One Read DMA Port is for reading beamforming weight and the other one is for reading IQ data. The DMA port width is 256 bits, so one cycle can read 256 /32 = 8 weights and IQ data in parallel.
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In some embodiments, reading, while writing the updated first segment of the weight information into the first part of the weight buffer via a first port of the weight buffer, the second segment of the weight information from the second part of the weight buffer via a second port of the weight buffer. Continuing with reference to Fig. 6, in some examples the weight memory (i.e. the weight buffer) may be a dual-port RAM comprising
the first port and the second port. In some embodiments, the apparatus may read the first datum, the second datum or the third datum or plurality of them via a first direct memory access (DMA) port, and may read one or more segments of the weight information via a second DMA port. As shown in Fig. 6, there are two DMAs are shown, the DMA 601 may be for reading the weight information (one or more segments of the weight information) and the DMA 602 may be for reading the datum. Compared with existing beamforming multiplication IP with only one read DMA port for beamforming weight update that cause the beamforming weight and IQ data can’t read at same time, the apparatus of the present disclosure uses two DMAs to enable beamforming weight and IQ data can be read at the same time, in this way, dedicate data paths for weight load and data load are provided, and efficiency is increased.
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In some embodiments, a bitwidth of the first DMA port may be determined based on a hardware processing speed of an apparatus comprising the first DMA port, that is, data path bitwidth should be designed according HW (hardware) processing speed Tbf. In some examples, the bitwidth of the second DMA port may be determined based on a size of a weight buffer, the hardware processing speed of the apparatus, and clock frequency of the apparatus, that is, weight path bitwidth should be close to Bweight = Wsize/ (Tbf*Fclock) . As mentioned above, the weight buffer may be for storing at least one segment of the weight information, Bweight is the size of the weight buffer, Fclock is the clock frequency of the apparatus.
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In some embodiments, the first segment of the weight information, the second segment of the weight information or the third segment of the weight information may be stored in a cyclic buffer.
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In some embodiments, some of the embodiments above may be implemented in combination. According to some embodiments of the present disclosure, one or more benefits may be provided, such as, reduce total silicon area of beamforming multiplication IP, reduce power consumption, simplify SW processing complexity and load, reduce HW processing delay, reduce the weight buffer in weight apply IP, save HW accelerator processing block count, and save overall SoC (system on chip) HW cost, etc. In some scenarios related to beamforming, the scheme of the present disclosure can get significant improvement for the beamer HW IP processing efficiency and reduce control SW complexity. So we can get significant cost, power saving, also support higher performance
advance beamforming algorithm (e.g. 2 PRB granularity subband beamforming) .
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The embodiments of the present disclosure may be applied in the case of sub-band beamforming in NR. For sub-band beamforming, there are a lot of weights need to feed to beamforming multiplication IP, for case 100M bandwidth, 16 streams, 64 antennas and 2 PRB granularity case need 273 *16 *64 /2 = 139, 776 weights, that need much more time consumed for weight update, after use all these 4 methods beamer IP HW instances can save 50%.
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The embodiments of the present disclosure may be applied in other scenarios in which processing data related to weight information, as an example, the scheme of the present disclosure may be used for data processing based on AI model. In such examples, the first datum may be a group of values of a plurality of neurons in a first layer in a neural network, the second datum may be a group of values of a plurality of neurons in a second layer in the neural network after the first layer, and the third datum may be a group of values of a plurality of neurons in a third layer in the neural network after the second layer. the first segment of the weight information may be for a layer prior to the first layer, the second segment of the weight information may be for the first layer, and the updated first segment of the weight information “may be for the second layer. It should be noted that, “the first” , “the second” , and “the third” of the layer are to distinguish these layers and do not indicate their order, for example, the first layer may be not an input layer of the neural network.
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In some embodiments, an apparatus capable of performing any of the method 200 (for example, the apparatus 130) may comprise means for performing the respective steps of the method 200. The means may be implemented in any suitable form. For example, the means may be implemented in a circuitry or software module.
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In some embodiments, the apparatus comprises means for means for processing, at a first symbol of a slot, a first datum of the data based on a first segment of the weight information; means for updating, at the first symbol and while processing a second datum of the data based on a second segment of the weight information, the first segment of the weight information; and means for processing, at a second symbol of a slot, a third datum of the data based on the updated first segment of the weight information.
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In some embodiments, the first symbol is of a first slot and the second symbol is of a second slot, and the second slot is subsequent to the first slot.
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In some embodiments, the apparatus further comprises means for updating, at the second symbol and while processing the third datum based on the updated first segment of the weight information, the second segment of the weight information; and means for processing, at the second symbol, a fourth datum of the data based on the updated second segment of the weight information.
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In some embodiments, the first segment of the weight information and the second segment of the weight information are for processing a plurality of data obtained in a plurality of symbols of the first slot, and the updated first segment of the weight information and the updated second segment of the weight information are for processing a plurality of data obtained in a plurality of symbols of the second slot.
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In some embodiments, the first segment of the weight information is stored in a first part of a weight buffer, and the second segment of the weight information is stored in a second part of the weight buffer.
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In some embodiments, the apparatus further comprises means for reading, while writing the updated first segment of the weight information into the first part of the weight buffer via a first port of the weight buffer, the second segment of the weight information from the second part of the weight buffer via a second port of the weight buffer.
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In some embodiments, the apparatus further comprises means for, prior to processing the first datum based on the first segment of the weight information, processing a fifth datum of the data based on a third segment of the weight information; means for updating, at the first symbol and while processing the first datum based on the first segment of the weight information, the third segment of the weight information; or means for further updating, at the second symbol and while processing the fourth datum of the data based on the updated second segment of the weight information, the updated third segment of the weight information, and means for processing a sixth datum of the data based on the further updated third segment of the weight information; or a combination of two or more above.
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In some embodiments, the third segment of the weight information is updated in each of the plurality of symbols.
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In some embodiments, the first segment of the weight information, the second segment of the weight information or the third segment of the weight information is stored in a cyclic buffer.
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In some embodiments, the first symbol is an end symbol of the first slot, and the
second symbol is a start symbol of the second slot.
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In some embodiments, the apparatus further comprises means for reading at least one of the first datum, the second datum or the third datum via a first direct memory access (DMA) port; and means for reading at least one segment of the weight information via a second DMA port. Additionally, a bitwidth of the first DMA port is determined based on a hardware processing speed of an apparatus comprising the first DMA port; or a bitwidth of the second DMA port is determined based on a size of a weight buffer, the hardware processing speed of the apparatus, and clock frequency of the apparatus, wherein the weight buffer being for storing at least one segment of the weight information; or a combination of both above.
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In some embodiments, the means for updating the first segment of the weight information while processing the second datum comprises means for executing a first job of a first job type and a second job of a second job type in parallel, wherein the first job type is used for processing the datum and the second job type is used for updating the segment of the weight information.
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In some embodiments, the means for updating the first segment of the weight information while processing the second datum comprises means for executing a third job of a third job type, wherein the third job type is used for processing the datum and updating the segment of the weight information in parallel.
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In some embodiments, the first datum is a first portion of in-phase quadrature (IQ) data obtained in the first slot, the second datum is a second portion subsequent to the first portion of the IQ data obtained in the first slot, the third datum is a first portion of IQ data obtained in the second slot, and the fourth datum is a second portion of the IQ data obtained in the second slot subsequent to the first portion of IQ datum obtained in the second slot; or the first segment of the weight information and the second segment of the weight information are two segments of beamforming weight information for the IQ data obtained in the first slot, and the updated first segment of the weight information and the updated second segment of the weight information are two segments of beamforming weight information for the IQ data obtained in the second slot; or a combination of both above.
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In some embodiments, the fifth datum is a first portion of in-phase quadrature (IQ) data obtained in the first slot; the first datum is a second portion subsequent to the first portion of the IQ data obtained in the first slot; the second datum is a third portion
subsequent to the second portion of IQ data obtained in the first slot; the third datum is a first portion of the IQ data obtained in the second slot; the fourth datum is a second portion of the IQ data obtained in the second slot subsequent to the first portion of IQ data obtained in the second slot; and the sixth datum is a third portion of the IQ data obtained in the second slot subsequent to the second portion of IQ data obtained in the second slot; or the first segment of the weight information, the second segment of the weight information and the third segment of the weight information are three segments of beamforming weight information for the IQ data obtained in the first slot, and the updated first segment of the weight information, the updated second segment of the weight information and the further updated third segment of the weight information are three segments of beamforming weight information for the IQ data obtained in the second slot; or a combination of both above.
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In some embodiments, the first datum is a group of values of a plurality of neurons in a first layer in a neural network, the second datum is a group of values of a plurality of neurons in a second layer in the neural network after the first layer, and the third datum is a group of values of a plurality of neurons in a third layer in the neural network after the second layer. Addtionally, the first segment of the weight information is for a layer prior to the first layer, the second segment of the weight information is for the first layer, and the updated first segment of the weight information is for the second layer.
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In some embodiments, the apparatus further comprises means for performing other steps in some embodiments of the method 200. In some embodiments, the means comprises at least one processor; and at least one memory including computer program code, the at least one memory and computer program code configured to, with the at least one processor, cause the performance of the apparatus.
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Fig. 7 is a simplified block diagram of a device 700 that is suitable for implementing embodiments of the present disclosure. The device 700 may be provided to implement the communication device, for example the network device 120 as shown in Fig. 1A. As shown, the device 700 includes one or more processors 710, one or more memories 720 coupled to the processor 710, and one or more communication modules 740 coupled to the processor 710.
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The communication modules 740 is for bidirectional communications. The communication modules 740 has at least one antenna to facilitate communication. The communication interface may represent any interface that is necessary for communication
with other network elements.
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The processor 710 may be of any type suitable to the local technical network and may include one or more of the following: general purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs) and processors based on multicore processor architecture, as non-limiting examples. The device 700 may have multiple processors, such as an application specific integrated circuit chip that is slaved in time to a clock which synchronizes the main processor.
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The memory 720 may include one or more non-volatile memories and one or more volatile memories. Examples of the non-volatile memories include, but are not limited to, a Read Only Memory (ROM) 724, an electrically programmable read only memory (EPROM) , a flash memory, a hard disk, a compact disc (CD) , a digital video disk (DVD) , and other magnetic storage and/or optical storage. Examples of the volatile memories include, but are not limited to, a random access memory (RAM) 722 and other volatile memories that will not last in the power-down duration.
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A computer program 730 includes computer executable instructions that are executed by the associated processor 710. The program 730 may be stored in the ROM 1020. The processor 710 may perform any suitable actions and processing by loading the program 730 into the RAM 722.
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The embodiments of the present disclosure may be implemented by means of the program 730 so that the device 700 may perform any process of the disclosure as discussed with reference to Figs. 2 to 6. The embodiments of the present disclosure may also be implemented by hardware or by a combination of software and hardware.
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In some embodiments, the program 730 may be tangibly contained in a computer readable medium which may be included in the device 700 (such as in the memory 720) or other storage devices that are accessible by the device 700. The device 700 may load the program 730 from the computer readable medium to the RAM 722 for execution. The computer readable medium may include any types of tangible non-volatile storage, such as ROM, EPROM, a flash memory, a hard disk, CD, DVD, and the like. Fig. 8 shows an example of the computer readable medium 800 in form of CD or DVD. The computer readable medium has the program 730 stored thereon.
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Generally, various embodiments of the present disclosure may be implemented in hardware or special purpose circuits, software, logic or any combination thereof. Some
aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device. While various aspects of embodiments of the present disclosure are illustrated and described as block diagrams, flowcharts, or using some other pictorial representations, it is to be understood that the block, apparatus, system, technique or method described herein may be implemented in, as non-limiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.
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The present disclosure also provides at least one computer program product tangibly stored on a non-transitory computer readable storage medium. The computer program product includes computer-executable instructions, such as those included in program modules, being executed in a device on a target real or virtual processor, to carry out the method 200 as described above with reference to Figs. 2-6. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, or the like that perform particular tasks or implement particular abstract data types. The functionality of the program modules may be combined or split between program modules as desired in various embodiments. Machine-executable instructions for program modules may be executed within a local or distributed device. In a distributed device, program modules may be located in both local and remote storage media.
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Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowcharts and/or block diagrams to be implemented. The program code may execute entirely on a machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
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In the context of the present disclosure, the computer program codes or related data may be carried by any suitable carrier to enable the device, apparatus or processor to perform various processes and operations as described above. Examples of the carrier include a signal, computer readable medium, and the like.
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The computer readable medium may be a computer readable signal medium or a
computer readable storage medium. A computer readable medium may include but not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the computer readable storage medium would include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM) , a read-only memory (ROM) , an erasable programmable read-only memory (EPROM or Flash memory) , an optical fiber, a portable compact disc read-only memory (CD-ROM) , an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. The term “non-transitory, ” as used herein, is a limitation of the medium itself (i.e., tangible, not a signal) as opposed to a limitation on data storage persistency (e.g., RAM vs. ROM) .
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Further, while operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are contained in the above discussions, these should not be construed as limitations on the scope of the present disclosure, but rather as descriptions of features that may be specific to particular embodiments. Certain features that are described in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment may also be implemented in multiple embodiments separately or in any suitable sub-combination.
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Although the present disclosure has been described in languages specific to structural features and/or methodological acts, it is to be understood that the present disclosure defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.