EP4706173A1 - Adaptive biasing in a power amplifier circuit - Google Patents

Adaptive biasing in a power amplifier circuit

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Publication number
EP4706173A1
EP4706173A1 EP24724708.3A EP24724708A EP4706173A1 EP 4706173 A1 EP4706173 A1 EP 4706173A1 EP 24724708 A EP24724708 A EP 24724708A EP 4706173 A1 EP4706173 A1 EP 4706173A1
Authority
EP
European Patent Office
Prior art keywords
power amplifier
circuit
bias
voltage
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP24724708.3A
Other languages
German (de)
French (fr)
Inventor
Alberto Costantini
Nadim Khlat
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qorvo US Inc
Original Assignee
Qorvo US Inc
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Filing date
Publication date
Application filed by Qorvo US Inc filed Critical Qorvo US Inc
Publication of EP4706173A1 publication Critical patent/EP4706173A1/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0244Stepped control
    • H03F1/025Stepped control by using a signal derived from the input signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H03F1/0266Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A by using a signal derived from the input signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/302Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H03F3/245Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/451Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)

Abstract

Adaptive biasing in a power amplifier circuit is disclosed. The power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage. Typically, the modulated voltage is generated based on a preestablished lookup table (LUT) that correlates amplitude and phase of the modulated voltage with a time-variant power envelope of the RF signal. In embodiments disclosed herein, an adaptive bias circuit can be dynamically activated to inject an adaptive bias current into a bias circuit in the power amplifier circuit to thereby reshape amplitude-amplitude (AM/AM) and/or amplitude-phase (AM/PM) characteristics of the modulated voltage. As a result, it is possible to dynamically adjust AM/AM gain dispersion and/or improve non-linear portions of the AM/PM characteristics of the modulated voltage to thereby improve performance of the power amplifier circuit.

Description

ADAPTIVE BIASING IN A POWER AMPLIFIER CIRCUIT
Related Applications
[0001] This application claims the benefit of U.S. provisional patent application serial number 63/499,827, filed on May 3, 2023, the disclosure of which is hereby incorporated herein by reference in its entirety.
Field of the Disclosure
[0002] The technology of the disclosure relates generally to a power amplifier circuit.
Background
[0003] Mobile communication devices have become increasingly common in current society for providing wireless communication services. The prevalence of these mobile communication devices is driven in part by the many functions that are now enabled on such devices. Increased processing capabilities in such devices means that mobile communication devices have evolved from being pure communication tools into sophisticated mobile multimedia centers that enable enhanced user experiences.
[0004] A fifth generation (5G) wireless communication system is widely regarded as a technological advancement that can achieve significantly higher data throughput, improved coverage range, enhanced signaling efficiency, and reduced latency compared to an existing fourth generation (4G) communication system like long-term evolution (LTE). Today, a mobile communication device is usually configured to support both 4G and 5G wireless communication systems. Often times, the mobile communication device needs to transmit and receive a radio frequency (RF) signal(s) in an RF spectrum that is more susceptible to propagation attenuation and interference that can result in substantial reduction in data throughput. To help mitigate propagation attenuation and maintain desirable data throughput, the mobile communication device typically employs a power amplifier(s) to boost output power of the RF signal(s) before transmission. [0005] Envelope tracking (ET) and average power tracking (APT) are power management techniques designed to improve operating efficiency of the power amplifier(s). Specifically, the power amplifier(s) is configured to amplify the RF signal(s) based on a modulated voltage (ET voltage or APT voltage) that closely tracks a time-variant power envelope of the RF signal(s). Understandably, the closer the modulated voltage resembles amplitude and phase of the time-variant envelope, the better the power amplifier(s) can perform to help improve overall performance, such as adjacent channel leakage ratio (ACLR) and adjacent channel power ratio (ACPR), of the mobile communication device.
[0006] Aspects disclosed in the detailed description include adaptive biasing in a power amplifier circuit. The power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage. Typically, the modulated voltage is generated based on a preestablished lookup table (LUT) that correlates amplitude and phase of the modulated voltage with a time-variant power envelope of the RF signal. In embodiments disclosed herein, an adaptive bias circuit can be dynamically activated to inject an adaptive bias current into a bias circuit in the power amplifier circuit to thereby reshape amplitude-amplitude (AM/AM) and/or amplitude-phase (AM/PM) characteristics of the modulated voltage. As a result, it is possible to dynamically adjust AM/AM gain dispersion and/or improve non-linear portions of the AM/PM characteristics of the modulated voltage to thereby improve performance of the power amplifier circuit.
[0007] In one aspect, a power amplifier apparatus is provided. The power amplifier apparatus includes a current source. The current source is configured to generate a low-frequency current. The power amplifier apparatus also includes a power amplifier circuit. The power amplifier circuit includes a bias circuit. The bias circuit is configured to generate a bias voltage based on the low-frequency current. The power amplifier circuit also includes an output stage. The output stage is biased by the bias voltage to amplify an RF signal based on a modulated voltage. The power amplifier apparatus also includes an adaptive bias circuit. The adaptive bias circuit is coupled to the bias circuit. The adaptive bias circuit is configured to inject an adaptive bias current into the bias circuit to dynamically adjust one or more of an AM/AM characteristic and an AM/PM characteristic of the modulated voltage.
[0008] In another aspect, a wireless device is provided. The wireless device includes a wireless transmission circuit. The wireless transmission circuit includes a power management integrated circuit (PMIC). The PMIC is configured to generate a modulated voltage based on a preestablished lookup table (LUT) that correlates a time-variant target voltage with the modulated voltage. The wireless transmission circuit also includes a power amplifier apparatus. The power amplifier apparatus includes a current source. The current source is configured to generate a low-frequency current. The power amplifier apparatus also includes a power amplifier circuit. The power amplifier circuit includes a bias circuit. The bias circuit is configured to generate a bias voltage based on the low-frequency current. The power amplifier circuit also includes an output stage. The output stage is biased by the bias voltage to amplify an RF signal based on the modulated voltage. The power amplifier apparatus also includes an adaptive bias circuit. The adaptive bias circuit is coupled to the bias circuit. The adaptive bias circuit is configured to inject an adaptive bias current into the bias circuit to dynamically adjust one or more of an AM/AM characteristic and an AM/PM characteristic of the modulated voltage.
[0009] In another aspect, a method for enabling adaptive biasing in a power amplifier circuit is provided. The method includes generating a low-frequency current. The method also includes generating a bias voltage based on the low- frequency current. The method also includes using the bias voltage to bias an output stage in the power amplifier circuit to thereby amplify an RF signal based on a modulated voltage. The method also includes injecting an adaptive bias current into the power amplifier circuit to dynamically adjust one or more of an AM/AM characteristic and an AM/PM characteristic of the modulated voltage. [0010] Those skilled in the art will appreciate the scope of the disclosure and realize additional aspects thereof after reading the following detailed description in association with the accompanying drawings.
Brief Description of the Drawings
[0011] The accompanying drawings incorporated in and forming a part of this specification illustrate several aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.
[0012] Figure 1 is a schematic diagram of an exemplary existing wireless transmission circuit wherein a power management integrated circuit (PMIC) generates a modulated voltage from a preestablished lookup table (LUT);
[0013] Figures 2A and 2B are graphic diagrams providing exemplary illustrations of amplitude-amplitude (AM/AM) and amplitude-phase (AM/PM) characteristics of the modulated voltage generated by the PMIC in Figure 1 ;
[0014] Figure 3 is a schematic diagram of an exemplary power amplifier apparatus configured according to one embodiment of the present disclosure to adjust AM/AM and/or AM/PM characteristics of a modulated voltage;
[0015] Figures 4A-4C are graphic diagrams providing exemplary illustrations of AM/AM, AM/PM, and adjacent channel leakage ratio (ACLR) improvements that can be achieved by the power amplifier circuit of Figure 3;
[0016] Figure 5 is a graphic diagram providing an exemplary illustration of multiple gain dispersion regions wherein the power amplifier circuit of Figure 3 can operate;
[0017] Figure 6 is a schematic diagram of an exemplary power amplifier apparatus configured according to another embodiment of the present disclosure;
[0018] Figure 7 is a schematic diagram of a wireless transmission circuit that can be configured to include the power amplifier apparatuses of Figures 3 and 6;
[0019] Figure 8 is a schematic diagram of an exemplary communication device wherein the wireless transmission circuit of Figure 7 can be provided; and [0020] Figure 9 is a flowchart of an exemplary process for enabling adaptive biasing in the power amplifier apparatuses of Figures 3 and 6.
Detailed Description
[0021] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
[0022] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. [0023] It will be understood that when an element such as a layer, region, or substrate is referred to as being "on" or extending "onto" another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or extending "directly onto" another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being "over" or extending "over" another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly over" or extending "directly over" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.
[0024] Relative terms such as "below" or "above" or "upper" or "lower" or "horizontal" or "vertical" may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.
[0025] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "including" when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
[0026] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0027] Aspects disclosed in the detailed description include adaptive biasing in a power amplifier circuit. The power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage. Typically, the modulated voltage is generated based on a preestablished lookup table (LUT) that correlates amplitude and phase of the modulated voltage with a time-variant power envelope of the RF signal. In embodiments disclosed herein, an adaptive bias circuit can be dynamically activated to inject an adaptive bias current into a bias circuit in the power amplifier circuit to thereby reshape amplitude-amplitude (AM/AM) and/or amplitude-phase (AM/PM) characteristics of the modulated voltage. As a result, it is possible to dynamically adjust AM/AM gain dispersion and/or improve non-linear portions of the AM/PM characteristics of the modulated voltage to thereby improve performance of the power amplifier circuit.
[0028] Before discussing the power amplifier circuit of the present disclosure, starting at Figure 3, a brief overview of an existing wireless transmission circuit is first provided with reference to Figures 1 and 2A-2B to help establish the technical problems to be solved by embodiments of the present disclosure.
[0029] Figure 1 is a schematic diagram of an exemplary existing wireless transmission circuit 10 wherein a power management integrated circuit (PMIC) 12 is configured to generate a modulated voltage Vcc, such as an envelope tracking (ET) voltage, from a preestablished lookup table (LUT) 14. The existing wireless transmission circuit 10 typically includes a transceiver circuit 16 and a power amplifier circuit 18. The power amplifier circuit 18 is configured to amplify an RF signal 20, which is generated by the transceiver circuit 16, based on the modulated voltage Vcc.
[0030] The power amplifier circuit 18 typically includes an output stage 22 and a bias circuit 24. In addition, the power amplifier circuit 18 may also include an input stage 26. The output stage 22 and the input stage 26, if available, are configured to amplify the RF signal 20 from an input power PIN to an output power POUT based on the modulated voltage Vcc.
[0031] The output stage 22 can include various transistors (not shown), such as bipolar junction transistors (BJTs) or heterojunction bipolar transistors (HBTs), that operate based on a bias voltage VBIAS. Typically, the bias circuit 24 is configured to generate the bias voltage VBIAS based on a low-frequency current IDC (e.g., a direct current) provided by an external current source 28.
[0032] The transceiver circuit 16 is configured to generate a modulated target voltage VTGT that closely tracks the input power both in amplitude and phase. The preestablished LUT 14 is typically pre-calibrated to correlate the modulated target voltage VTGT with the modulated voltage Vcc. In this regard, for an instantaneous value (or a range of the instantaneous value) of the modulated target voltage VTGT, the PMIC 12 can simply retrieve a set of corresponding amplitude and phase values from the preestablished LUT 14 and generate the modulated voltage Vcc accordingly.
[0033] Conventionally, the preestablished LUT 14 is determined based on a so-called “waterfall” characterization that sweeps through the output power POUT and the modulated voltage Vcc. A specific value in the preestablished LUT 14 is typically calculated from the waterfall characterization based on respective reference points of the modulated voltage Vcc and the output power POUT (e.g., Vcc = 3.5 V or 3.8 V and POUT = +10 dBm) and a target power amplifier compression point. Each entry in the preestablished LUT 14 is associated with an AM/AM characterization and an AM/PM characterization, which are illustrated in Figures 2A and 2B, respectively.
[0034] Figure 2A is a graphic diagram illustrating the AM/AM characterization of the preestablished LUT 14. Herein, the AM/AM characterization is represented by a constant gain 30 (a.k.a. IsoGain) obtained by sweeping the output power POUT across a gain dispersion region 32. As illustrated, the gain dispersion region 32 is approximately four decibels (4 dB).
[0035] Figure 2B is a graphic diagram illustrating the AM/PM characterization of the preestablished LUT 14. Herein, the AM/PM characterization typically refers to a non-linear region 34, wherein the AM/PM characteristic is a non-linear function of the output power POUT. AS illustrated, the non-linear phase changes approximately ten degrees (10°) when the output power POUT changes from 20 dBm to 35 dBm.
[0036] With reference back to Figure 1 , conventionally, the transceiver circuit 16 is configured to correct, or at least mitigate, the non-linear AM/PM characteristic through digital pre-distortion (DPD). Understandably, the larger the AM/PM changes in the non-linear region 34, the more difficult it is to correct the non-linear AM/PM characteristic through DPD as the complex coefficients involved in DPD can grow significantly. As such, it is desirable to reduce the AM/PM changes (i.e., flatten the AM/PM curve in Figure 2B) in the non-linear region 34 to help reduce complexity of the DPD operation. Also, as an important figure-of-merit (FoM) of ET, it is further desired to widen the gain dispersion region 32 in Figure 2A. In context of the present disclosure, reshaping AM/AM characteristic refers to a widening of the gain dispersion region 32, whereas reshaping AM/PM characteristic refers to a flattening of the AM/PM curve in the non-linear region 34. Unfortunately, the modulated voltage Vcc as generated based on the preestablished LUT 14 allows very little adjustment and/or shaping of the AM/AM and AM/PM characteristics. Hence, the technical problem that needs to be solved is how to dynamically adjust the AM/AM characteristic to widen the gain dispersion region 32 and reshape the AM/PM characteristic to help improve the effectiveness of DPD, particularly in the context of ET.
[0037] In this regard, Figure 3 is a schematic diagram of an exemplary power amplifier apparatus 35 that can be configured according to one embodiment of the present disclosure to adjust AM/AM and/or AM/PM characteristics of a modulated voltage Vcc. In a non-limiting example, the modulated voltage Vcc can be an ET voltage. Herein, the power amplifier apparatus 35 includes a power amplifier circuit 36. In an embodiment, the power amplifier circuit 36 includes an output stage 38, a bias circuit 40, and may further include an input stage 42. The output stage 38 is biased by a bias voltage VBIAS and the bias circuit 40 is configured to generate the bias voltage VBI S based on a low- frequency current IDC (e.g., a direct current) provided by an external current source 44. The output stage 38 and the input stage 42, if available, are configured to amplify an RF signal 46 from an input power PIN to an output power POUT based on the modulated voltage Vcc.
[0038] Like in the existing wireless transmission circuit 10 of Figure 1 , the modulated voltage Vcc may be generated by the PMIC 12 based on the preestablished LUT 14. As such, the modulated voltage Vcc will inherently exhibit the AM/AM and AM/PM characteristics as illustrated in Figures 2A and 2B. [0039] In this regard, to solve the technical problem associated with the existing wireless transmission circuit 10, the power amplifier circuit 36 is configured herein to further include an adaptive bias circuit 48. The adaptive bias circuit 48 is configured to inject an adaptive bias current IBIAS into the bias circuit 40 to dynamically adjust one or more inherent characteristics (e.g., the AM/AM characteristic and/or the AM/PM characteristic) of the modulated voltage Vcc. As a result, as illustrated later in Figures 4A-4C, the power amplifier circuit 36 is able to provide significant improvement with respective to AM/AM gain dispersion, non-linear phase change, and ACLR performance.
[0040] In an embodiment, the adaptive bias circuit 48 includes a bias transistor 50, which can be an HBT, as an example. The bias transistor 50 has a base electrode (B), a collector electrode (C), and an emitter electrode (E). The base electrode (B) is configured to receive the modulated voltage Vcc via a first bias resistor RABI , which may be a fixed or an adjustable resistor. The base electrode (B) is also coupled to a ground (GND) via a bias capacitor CAB. In an embodiment, the bias capacitor CAB may filter out residual RF content in the modulated voltage Vcc. The collector electrode (C) is coupled to the base collector (B).
[0041] The bias circuit 40 includes a pair of transistors 52, 54, each having a respective base electrode (B), a respective collector electrode (C), and a respective emitter electrode (E). The collector electrode (C) of the transistor 52 is coupled to the external current source 44 via a voltage divider network 56. The voltage divider network 56 is coupled to the external current source 44 to receive the low-frequency current IDC and output a corresponding low-frequency voltage VDC to the collector electrode (C) of the transistor 52. The emitter electrode (E) of the transistor 52 is coupled to the collector electrode (C) of the transistor 54, which is further coupled to the base electrode (B) of the transistor 54. The emitter electrode (E) of the transistor 54 is coupled to the ground (GND). In an embodiment, the emitter electrode (E) of the bias transistor 50 is configured to output the bias current IBIAS to the base electrode (B) of the transistor 54 via a second bias resistor RAB2. Notably, the bias circuit 40 can include additional components like transistors, resistors, capacitors, and/or voltage supplies to generate the bias voltage VBIAS. These additional components are omitted herein for the sake of simplicity.
[0042] In the adaptive bias circuit 48, the base electrode (B) of the bias transistor 50 can be seen as biased by the modulated voltage Vcc. In a nonlimiting example, the transistor 54 in the bias circuit 40 sets an emitter voltage VE at the emitter electrode (E) of the bias transistor 50 at approximately 1 .25 V. In this regard, when the modulated voltage Vcc is higher than or equal to a threshold voltage of the bias transistor 50, the bias transistor 50 (and therefore the adaptive bias circuit 48) will be automatically turned on (i.e., activated). In contrast, the bias transistor 50 (and therefore the adaptive bias circuit 48) will be automatically turned off (i.e., deactivated) when the modulated voltage Vcc is lower than the threshold voltage of the bias transistor 50.
[0043] In one alternative embodiment, the bias transistor 50 may be replaced by a Schottky diode. Accordingly, the adaptive bias circuit 48 will be automatically activated when the modulated voltage Vcc is higher than or equal to approximately 2 V and deactivated when the modulated voltage Vcc is below 2 V. In another alternative embodiment, the bias transistor 50 may be connected to a Schottky diode. Accordingly, the adaptive bias circuit 48 will be automatically activated when the modulated voltage Vcc is higher than or equal to approximately 3.2 V and deactivated when the modulated voltage Vcc is below 3.2 V.
[0044] The first bias resistor RABI and the second bias resistor RAB2 may be adjusted, either statically or dynamically, to control an amount of the bias current IBIAS to be injected into the bias circuit 40. In other words, the first bias resistor RABI and/or the second bias resistor RAB2 may be adjusted to control a slope (i.e., change rate versus the modulated voltage Vcc) of the bias current IBIAS. In a preferred embodiment, the first bias resistor RABI may be adjusted to control the slope of the bias current IBIAS, while the second bias resistor RAB2 may be used to maintain a larger resistance to minimize leakage and noise injection into the bias circuit 40. Given that the bias current IBIAS is solely driven by the modulated voltage Vcc, the threshold voltage of the bias transistor 50, the first bias resistor RABI , and/or the second bias resistor RAB2, the bias current IBIAS is independent from the low-frequency current IDC provided by the external current source 44. [0045] The power amplifier circuit 36 can provide significant improvement over the existing wireless transmission circuit 10 of Figure 1 in many aspects. Figures 4A-4C are graphic diagrams providing exemplary illustrations of AM/AM, AM/PM, and adjacent channel leakage ratio (ACLR) improvements that can be achieved by the power amplifier circuit 36 of Figure 3.
[0046] As illustrated in Figure 4A, by dynamically injecting the bias current IBIAS into the bias circuit 40, the gain dispersion region 32 is widened from approximately 4 dB in Figure 2A to approximately 6 dB herein. As illustrated in Figure 4B, the non-linear phase change in the non-linear region 34 is reduced from approximately 10° in Figure 2B to approximately 7° herein. As illustrated in Figure 4G, the power amplifier circuit 36 is able to reduce ACLR to approximately -41 dBm. Thus, by adding the adaptive bias circuit 48, it is possible to solve the technical problems associated with the existing wireless transmission circuit 10 of Figure 1.
[0047] As mentioned earlier, the adaptive bias circuit 48 may be configured to be turned on and off based on different threshold voltages. This makes it possible for the power amplifier circuit 36 to operate in different gain dispersion regions. Figure 5 is a graphic diagram providing an exemplary illustration of multiple gain dispersion regions GD1 , GD2 wherein the power amplifier circuit 36 of Figure 2 can be configured to operate.
[0048] Herein, the gain dispersion region GD1 is defined by a gain differential between 2.5 V and 5 V of the modulated voltage Vcc, and the gain dispersion region GD2 is defined by a gain differential between 1 V and 3.5 V of the modulated voltage Vcc. Studies have shown that, with the adaptive bias circuit 48, the power amplifier circuit 36 is able to operate in the gain dispersion regions GD1 , GD2 with satisfactory performance. In particular, the power amplifier circuit 36 is able to reduce AM/AM distortion from 1 .5 dB to less than 1 dB in the gain dispersion region GD1. [0049] With reference back to Figure 3, alternative to incorporating the adaptive bias circuit 48 into the power amplifier circuit 36, it is also possible to provide the adaptive bias circuit 48 in the external current source 44. In this regard, Figure 6 is a schematic diagram of an exemplary power amplifier apparatus 57 configured according to another embodiment of the present disclosure. Common elements between Figures 3 and 6 are shown therein with common element numbers and will not be re-described herein.
[0050] Herein, the power amplifier apparatus 57 includes a power amplifier circuit 58. In an embodiment, the power amplifier circuit 58 includes the output stage 38 and the bias circuit 40, whereas the adaptive bias circuit 48 is provided in an external current source 60. In an embodiment, the external current source 60 may include a current generator 62 that generates the low-frequency current IDC and a combiner 64 that combines the low-frequency current IDC with the bias current IBIAS to generate a combined low-frequency current IDC+ and injects the combined low-frequency current IDC+ into the bias circuit 40. By separating the adaptive bias circuit 48 from the power amplifier circuit 58, it may provide more degrees of freedom in terms of dynamically shaping the combined low-frequency current IDC+ as a function of the modulated voltage Vcc.
[0051] The power amplifier apparatus 35 of Figure 3 and the power amplifier apparatus 57 of Figure 6 may replace the power amplifier circuit 18 to help improve overall performance of the existing wireless transmission circuit 10. In this regard, Figure 7 is a schematic diagram of an exemplary wireless transmission circuit 66 wherein the power amplifier apparatus 35 of Figure 3 and the power amplifier apparatus 57 of Figure 6 can be provided. Common elements between Figures 3, 6, and 7 are shown therein with common element numbers and will not be re-described herein.
[0052] Herein, the wireless transmission circuit 66 reuses the PMIC 12 and the transceiver circuit 16 in the existing wireless transmission circuit 10, only replacing the power amplifier circuit 18 with either the power amplifier apparatus 35 or the power amplifier apparatus 57. As such, the wireless transmission circuit 66 can achieve a higher degree of backward compatibility and component reuse.
[0053] The wireless transmission circuit 66 of Figure 7 can be provided in a communication device to support the embodiments described above. In this regard, Figure 8 is a schematic diagram of an exemplary communication device 100 wherein the wireless transmission circuit 66 of Figure 7 can be provided. [0054] Herein, the communication device 100 can be any type of communication device, such as mobile terminal, smart watch, tablet, computer, navigation device, access point, base station (e.g., eNB, gNB, etc.), and any other wireless communication device that supports wireless communications, such as cellular, wireless local area network (WLAN), Bluetooth, Ultra-wideband (UWB), and near field communications. The communication device 100 will generally include a control system 102, a baseband processor 104, transmit circuitry 106, receive circuitry 108, antenna switching circuitry 110, multiple antennas 112, and user interface circuitry 114. In a non-limiting example, the control system 102 can be a field-programmable gate array (FPGA), as an example. In this regard, the control system 102 can include at least a microprocessor(s), an embedded memory circuit(s), and a communication bus interface(s). The receive circuitry 108 receives radio frequency signals via the antennas 112 and through the antenna switching circuitry 110 from one or more base stations. A low noise amplifier and a filter cooperate to amplify and remove broadband interference from the received signal for processing.
Downconversion and digitization circuitry (not shown) will then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using analog-to-digital converter(s) (ADC).
[0055] The baseband processor 104 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations, as will be discussed in greater detail below. The baseband processor 104 is generally implemented in one or more digital signal processors (DSPs) and application specific integrated circuits (ASICs).
[0056] For transmission, the baseband processor 104 receives digitized data, which may represent voice, data, or control information, from the control system 102, which it encodes for transmission. The encoded data is output to the transmit circuitry 106, where a digital-to-analog converter(s) (DAC) converts the digitally encoded data into an analog signal and a modulator modulates the analog signal onto a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier will amplify the modulated carrier signal to a level appropriate for transmission, and deliver the modulated carrier signal to the antennas 112 through the antenna switching circuitry 110. The multiple antennas 112 and the replicated transmit and receive circuitries 106, 108 may provide spatial diversity. Modulation and processing details will be understood by those skilled in the art.
[0057] In an embodiment, the power amplifier apparatus 35 of Figure 3 and the power amplifier apparatus 57 of Figure 6 can be configured to enable adaptive biasing based on a process. In this regard, Figure 9 is a flowchart of an exemplary process 200 for enabling adaptive biasing in the power amplifier apparatus 35 of Figure 3 and the power amplifier apparatus 57 of Figure 6. [0058] Herein, the process 200 includes generating the low-frequency current IDC (step 202). The process 200 also includes generating the bias voltage VDC based on the low-frequency current IDC (step 204). The process 200 also includes using the bias voltage VDC to bias the output stage 38 in the power amplifier circuit 36 or 58 to thereby amplify the RF signal 46 based on the modulated voltage Vcc (step 206). The process 200 also includes injecting the adaptive bias current IBIAS into the power amplifier circuit 36 or 58 to dynamically adjust one or more of the AM/AM characteristic and the AM/PM characteristic of the modulated voltage Vcc (step 208).
[0059] Those skilled in the art will recognize improvements and modifications to the embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims

Claims What is claimed is:
1 . A power amplifier apparatus (35, 57) comprising: a current source (44, 60) configured to generate a low-frequency current (IDC); a power amplifier circuit (36, 58) comprising: a bias circuit (40) configured to generate a bias voltage (VBIAS) based on the low-frequency current (IDC); and an output stage (38) biased by the bias voltage (VBIAS) to amplify a radio frequency, RF, signal (46) based on a modulated voltage (Vcc); and an adaptive bias circuit (48) coupled to the bias circuit (40) and configured to inject an adaptive bias current (IBIAS) into the bias circuit (40) to dynamically adjust one or more of an amplitude-amplitude, AM/AM, characteristic and an amplitude-phase, AM/PM, characteristic of the modulated voltage.
2. The power amplifier apparatus (35, 57) of claim 1 , wherein the adaptive bias circuit (48) comprises: a bias transistor (50) comprising: a base electrode coupled to a first resistor (RABI) and configured to receive the modulated voltage (Vcc); a collector electrode coupled to the base electrode; and an emitter electrode coupled to the bias circuit (40) via a second resistor (RAB2) ; and a bias capacitor (CAB) coupled between the base electrode and a ground and configured to filter out residual RF content in the modulated voltage (Vcc).
3. The power amplifier apparatus (35, 57) of claim 2, wherein the adaptive bias circuit (48) is automatically activated in response to the modulated voltage (Vcc) being higher than or equal to a threshold voltage and deactivated in response to the modulated voltage (Vcc) being lower than the threshold voltage.
4. The power amplifier apparatus (35, 57) of claim 3, wherein the threshold voltage can be adjusted to cause the power amplifier circuit (36, 58) to operate in different gain dispersion regions.
5. The power amplifier apparatus (35, 57) of claim 2, wherein: the first resistor (RABI) can be adjusted to control a slope of the adaptive bias current (IBIAS); and the second resistor (RAB2) can be adjusted to minimize leakage and/or noise injection into the bias circuit (40).
6. The power amplifier apparatus (35, 57) of claim 2, wherein the bias circuit (40) comprises: a voltage divider network (56) coupled to the current source (44) and configured to output a low-frequency voltage based on the low- frequency current (IDC); a first transistor (52) having a respective collector electrode coupled to the voltage divider network (56); a respective base electrode coupled to the respective collector electrode, and a respective emitter electrode coupled to the second resistor ( AB2) in the adaptive bias circuit (48); and a second transistor (54) having a respective collector electrode coupled to the second resistor (R B2) in the adaptive bias circuit (48) and the respective emitter electrode of the first transistor (52), a respective base electrode coupled to the respective collector electrode, and an emitter electrode coupled to the ground.
7. The power amplifier apparatus (35) of claim 1 , wherein the power amplifier circuit (36) further comprises the adaptive bias circuit (48) and the current source (44) is external to the power amplifier circuit (36).
8. The power amplifier apparatus (57) of claim 1 , wherein the current source (60) is external to the power amplifier circuit (58) and comprises: the adaptive bias circuit (48) configured to generate the adaptive bias current (IBIAS); a current generator (62) configured to generate the low-frequency current (IDC); and a combiner (64) coupled to the bias circuit (40) and configured to: combine the adaptive bias current (IBIAS) and the low-frequency current (IDC) to generate a combined low-frequency current (IDC+); and inject the combined low-frequency current (IDC+) into the bias circuit (40).
9. A wireless device (100) comprising a wireless transmission circuit (66) comprising: a power management integrated circuit, PMIC, (12) configured to generate a modulated voltage (Vcc) based on a preestablished lookup table, LUT, (14) that correlates a time-variant target voltage with the modulated voltage (Vcc); and a power amplifier apparatus (35, 57) comprising: a current source (44, 60) configured to generate a low-frequency current (IDC); and a power amplifier circuit (36, 58) comprising: a bias circuit (40) configured to generate a bias voltage (VBIAS) based on the low-frequency current (IDC); and an output stage (38) biased by the bias voltage (VBIAS) to amplify a radio frequency, RF, signal (46) based on the modulated voltage (Vcc); and an adaptive bias circuit (48) coupled to the bias circuit (40) and configured to inject an adaptive bias current (IBIAS) into the bias circuit (40) to dynamically adjust one or more of an amplitude-amplitude, AM/AM, characteristic and an amplitude-phase, AM/PM, characteristic of the modulated voltage (Vcc).
10. The wireless device (100) of claim 9, further comprising a transceiver circuit (16) configured to generate the RF signal (46) and the time-variant target voltage.
1 1 . The wireless device (100) of claim 9, wherein the adaptive bias circuit (48) comprises: a bias transistor (50) comprising: a base electrode coupled to a first resistor (RABI) and configured to receive the modulated voltage (Vcc); a collector electrode coupled to the base electrode; and an emitter electrode coupled to the bias circuit (40) via a second resistor (R B2) ; and a bias capacitor (CAB) coupled between the base electrode and a ground and configured to filter out residual RF content in the modulated voltage (Vcc).
12. The wireless device (100) of claim 1 1 , wherein the adaptive bias circuit (48) is automatically activated in response to the modulated voltage (Vcc) being higher than or equal to a threshold voltage and deactivated in response to the modulated voltage (Vcc) being lower than the threshold voltage.
13. The wireless device (100) of claim 12, wherein the threshold voltage can be adjusted to cause the power amplifier circuit (36, 58) to operate in different gain dispersion regions.
14. The wireless device (100) of claim 1 1 , wherein: the first resistor (RABI) can be adjusted to control a slope of the adaptive bias current (IBIAS); and the second resistor (RAB2) can be adjusted to minimize leakage and/or noise injection into the bias circuit (40).
15. The wireless device (100) of claim 1 1 , wherein the bias circuit (40) comprises: a voltage divider network (56) coupled to the current source (44, 60) and configured to output a low-frequency voltage based on the low- frequency current (IDC); a first transistor (52) having a respective collector electrode coupled to the voltage divider network (56); a respective base electrode coupled to the respective collector electrode, and a respective emitter electrode coupled to the second resistor (RAB2) in the adaptive bias circuit (48); and a second transistor (54) having a respective collector electrode coupled to the second resistor (R B2) in the adaptive bias circuit (48) and the respective emitter electrode of the first transistor (52), a respective base electrode coupled to the respective collector electrode, and an emitter electrode coupled to the ground.
16. The wireless device (100) of claim 9, wherein the power amplifier circuit (36, 58) further comprises the adaptive bias circuit (48) and the current source (44, 60) is external to the power amplifier circuit (36, 58).
17. The wireless device (100) of claim 9, wherein the current source (44, 60) is external to the power amplifier circuit (36, 58) and comprises: the adaptive bias circuit (48) configured to generate the adaptive bias current (IBIAS); a current generator (62) configured to generate the low-frequency current (IDC); and a combiner (64) coupled to the bias circuit (40) and configured to: combine the adaptive bias current (IBIAS) and the low-frequency current (IDC) to generate a combined low-frequency current (IDC+); and inject the combined low-frequency current (IDC+) into the bias circuit (40).
18. A method for enabling adaptive biasing in a power amplifier circuit (36, 58) comprising: generating a low-frequency current (IDC); generating a bias voltage (VBIAS) based on the low-frequency current (IDC); using the bias voltage (VBIAS) to bias an output stage in the power amplifier circuit (36, 58) to thereby amplify a radio frequency, RF, signal (46) based on a modulated voltage (Vcc); and injecting an adaptive bias current (IBIAS) into the power amplifier circuit (36, 58) to dynamically adjust one or more of an amplitude-amplitude, AM/AM, characteristic and an amplitude-phase, AM/PM, characteristic of the modulated voltage (Vcc).
19. The method of claim 18, further comprising: automatically injecting the adaptive bias current (IBIAS) into the power amplifier circuit (36, 58) when the modulated voltage (Vcc) is higher than or equal to a threshold voltage; and automatically stopping injecting the adaptive bias current (IBIAS) into the power amplifier circuit (36, 58) when the modulated voltage (Vcc) is lower than the threshold voltage.
20. The method of claim 19, further comprising adjusting the threshold voltage to cause the power amplifier circuit (36, 58) to operate in different gain dispersion regions.
EP24724708.3A 2023-05-03 2024-04-08 Adaptive biasing in a power amplifier circuit Pending EP4706173A1 (en)

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US202363499827P 2023-05-03 2023-05-03
PCT/US2024/023572 WO2024228806A1 (en) 2023-05-03 2024-04-08 Adaptive biasing in a power amplifier circuit

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EP2782245A1 (en) * 2013-03-20 2014-09-24 ST-Ericsson SA Amplifier topology for envelope tracking
US10951183B2 (en) * 2018-09-13 2021-03-16 Qorvo Us, Inc. PA output memory neutralization using baseband I/O capacitance current compensation
US11082021B2 (en) * 2019-03-06 2021-08-03 Skyworks Solutions, Inc. Advanced gain shaping for envelope tracking power amplifiers
JP2020188292A (en) * 2019-05-09 2020-11-19 株式会社村田製作所 Power amplifier circuit and bias control circuit
US11581855B2 (en) * 2019-12-20 2023-02-14 Qorvo Us, Inc. Power amplifier circuitry
US11482975B2 (en) * 2020-06-05 2022-10-25 Skyworks Solutions, Inc. Power amplifiers with adaptive bias for envelope tracking applications

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TW202448121A (en) 2024-12-01

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