EP4666386A1

EP4666386A1 - Digital pre-distorter for non-linear electronic devices

Info

Publication number: EP4666386A1
Application number: EP23708142.7A
Authority: EP
Inventors: Sener DIKMESE; Hao GAO; Pablo PASCUAL; Yanhui Zhao; Zhongwen LI; Aljosa DUDARIN; Ang FENG
Original assignee: Telefonaktiebolaget LM Ericsson AB
Current assignee: Telefonaktiebolaget LM Ericsson AB
Priority date: 2023-02-13
Filing date: 2023-02-13
Publication date: 2025-12-24
Also published as: WO2024168447A1

Abstract

There is provided techniques for operating a DPD for a non-linear electronic device. The DPD is using coefficients and basis functions defined by an input signal and tap delays. The method is performed by the DPD. The method comprises receiving the input signal as destined to be input to a non-linear electronic device. The method comprises determining the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal. The DPD implements a first control loop configured to determine the tap delays and a second control loop, different from the first control loop, configured to determine the coefficients. The method comprises obtaining an output signal. The output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays. The method comprises providing the output signal as input to the non-linear electronic device.

Description

DIGITAL PRE-DISTORTER FOR NON-LINEAR ELECTRONIC DEVICES

TECHNICAL FIELD

Embodiments presented herein relate to a method, a digital pre-distorter, a computer program, and a computer program product for a non-linear electronic device.

BACKGROUND

Some electronic devices exhibit non-linear input-output characteristics and are therefore referred to as non-linear electronic devices. Non-linear electronic devices can be found in many types of electronic equipment, such as transmitters, receivers, transceivers, signal converters, and the like. Non-limiting examples of non-linear electronic devices are radio frequency (RF) amplifiers, power amplifiers (PAs) , low-noise amplifiers (LNAs) , etc.
In some scenarios the non-linear behaviour caused by the non-linear input-output characteristics is undesired and efforts are therefore made to make the non-linear input-output characteristics linear, and thus to linearize the non-linear electronic device. One way to linearize the non-linear electronic device is to connect the output of a linearizer device to the input of the non-linear electronic device such that the input to the non-linear electronic device is fed, and processed by, the linearizer device. One of the examples for linearizer device is a digital pre-distorter (DPD) , which is used in the digital domain of a transmitter to linearize the signal seen at the output a non-linear electronic device, such as a power amplifier.
In further detail, the DPD is configured to modify the input of the non-linear electronic device by imposing an inverse model of the non-linear electronic device on the input signal to offset the impairments of it. The cascade of the DPD and the non-linear electronic device can approximate a linear system, if, for example, the DPD contains sufficient basis functions to inverse the non-linear behavior of the non-linear electronic device. Here, the basis functions comprise memory polynomials of the input signal to the DPD. In the practice of basis functions, memory polynomials may be implemented by look-up-tables (LUTs) , which is mathematically equivalent to memory polynomials but with lower computational complexity. The output signal from the DPD is a linear combination of vectors embedded in the basis function, whereas each vector is constructed by a set of nonlinear operations of the input signal. Basically, the more terms contained in the basis function, the better the performance will be. However, besides sufficiency, efficiency must be considered as well. Conversely, the more terms contained in the basis function the less the efficiency will be. Hence, design of the algorithm run in the DPD, and its optimization involve a compromise between sufficiency and efficiency. For each non-linear electronic device, intensive experiments have to be performed to achieve the best tradeoff, and this requires huge cost and long lead time.
Typically, a DPD can be realized by direct-learning architecture (DLA) or indirect-learning architecture (ILA) . Although ILA is quite popular in the literature, ILA suffers from issues in the linearization of wideband non-linear electronic devices. In this respect, ILA can be regarded as implementing post-distortion instead of predistortion, which implies, at least theoretically, that the positions of the DPD and the non-linear electronic device are exchanged. However, as memory terms increase, the commutative law does not converge to a satisfactory solution. Due to that, ILA has not been used in any commercial product. On the other hand, DLA generally requires a higher computational complexity than ILA. Adaptation of DLAs are generally based on iterative methods, such as least-mean squares (LMS) , recursive least squares (RLS) , or gradient descend (GD) , to approach the local optimal point gradually.
As more and more different types of non-linear electronic device are released, the design efforts of the DPDs are predicted to increase correspondingly. This leads to higher development cost and longer lead time. Further, with respect to the design of the DPD itself, comparatively long time is required for the parameter tuning, especially in the stage of tap optimization. Here, tap optimization denotes the procedure to find the optimal address delay and data delay (tap delays) for each nonlinear filter. Extensive searching over a predefined region is commonly considered and applied in current development. Typically, several days could be needed for finding optimal tap delays for just one test case.
Hence, there is still a need for an improved tap optimization for better DPD performance.
SUMMARY
An object of embodiments herein is to provide a DPD that does not suffer from the issues disclosed above, or at least where the above disclosed issues have been mitigated or reduced.
According to a first aspect there is presented a method for operating a DPD for a non-linear electronic device. The DPD is using coefficients and basis functions defined by an input signal and tap delays. The method is performed by the DPD. The method comprises receiving the input signal as destined to be input to a non-linear electronic device. The method comprises determining the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal. The DPD implements a first control loop configured to determine the tap delays and a second control loop, different from the first control loop, configured to determine the coefficients. The method comprises obtaining an output signal. The output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays. The method comprises providing the output signal as input to the non-linear electronic device.
According to a second aspect there is presented a DPD for a non-linear electronic device. The DPD is using coefficients and basis functions defined by coefficients an input signal and tap delays. The DPD comprises processing circuitry. The processing circuitry is configured to cause the DPD to receive the input signal as destined to be input to a non-linear electronic device. The processing circuitry is configured to cause the DPD to determine the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal. The DPD implements a first control loop configured to determine the tap delays and a second control loop, different from the first control loop, configured to determine the coefficients. The processing circuitry is configured to cause the DPD to obtain an output signal. The output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays. The processing circuitry is configured to cause the DPD to provide the output signal as input to the non-linear electronic device.
According to a third aspect there is presented a DPD for a non-linear electronic device. The DPD is using coefficients and basis functions defined by coefficients an input signal and tap delays. The DPD comprises a receive module configured to receive the input signal as destined to be input to a non-linear electronic device. The DPD comprises a determine module configured to determine the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal. The DPD implements a first control loop configured to determine the tap delays and a second control loop, different from the first control loop, configured to determine the coefficients. The DPD comprises an obtain module configured to obtain an output signal. The output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays. The DPD comprises a provide module configured to provide the output signal as input to the non-linear electronic device.
According to a fourth aspect there is presented a computer program for operating a DPD for a non-linear electronic device. The DPD is using coefficients and basis functions defined by coefficients an input signal and tap delays. The computer program comprises computer code which, when run on processing circuitry of the DPD, causes the DPD to perform actions. One action comprises the DPD to receive the input signal as destined to be input to a non-linear electronic device. One action comprises the DPD to determine the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal. The DPD implements a first control loop configured to determine the tap delays and a second control loop, different from the first control loop, configured to determine the coefficients. One action comprises the DPD to obtain an output signal. The output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays. One action comprises the DPD to provide the output signal as input to the non-linear electronic device.
According to a fifth aspect there is presented a computer program product comprising a computer program according to the fourth aspect and a computer readable storage medium on which the computer program is stored. The computer readable storage medium could be a non-transitory computer readable storage medium.
Advantageously, the disclosed DPD does not suffer from the issues noted above.
Advantageously, the disclosed DPD enables time-efficient computation of the coefficients and the tap delays for non-linear electronic devices, even for non-linear electronic devices operating in wideband/multiband scenarios.
Advantageously, the disclosed DPD enables the tap delays to be adapted to scenarios of dynamic operation as well as dynamic environments of the non-linear electronic device.
Advantageously, the disclosed DPD enables the first control loop and the second control loop to have different implementations. For example, the first control loop can be implemented in software whilst the second control loop is implemented in hardware.
Advantageously, the disclosed DPD enables reduced power consumption due to that the first control loop not needing to be executed as often as the second control loop. Further, in some examples, the second control loop does not need to be executed when the first control loop is executed.
Other objectives, features and advantages of the enclosed embodiments will be apparent from the following detailed disclosure, from the attached dependent claims as well as from the drawings.
Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the element, apparatus, component, means, module, step, etc. " are to be interpreted openly as referring to at least one instance of the element, apparatus, component, means, module, step, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.

BRIEF DESCRIPTION OF THE DRAWINGS

The inventive concept is now described, by way of example, with reference to the accompanying drawings, in which:
Fig. 1, Fig. 2, and Fig. 3 are schematic diagrams illustrating DPDs according to embodiments;
Fig. 4 and Fig. 6 are flowcharts of methods according to embodiments;
Fig. 5 operations of a first control loop and a second control loop according to an embodiment;
Fig. 7 and Fig. 8 show simulation results according to embodiments
Fig. 9 is a schematic diagram showing functional units of a DPD according to an embodiment;
Fig. 10 is a schematic diagram showing functional modules of a DPD according to an embodiment; and
Fig. 11 shows one example of a computer program product comprising computer readable storage medium according to an embodiment.

DETAILED DESCRIPTION

The inventive concept will now be described more fully hereinafter with reference to the accompanying drawings, in which certain embodiments of the inventive concept are shown. This inventive concept may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided by way of example so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. Like numbers refer to like elements throughout the description. Any step or feature illustrated by dashed lines should be regarded as optional.
The embodiments disclosed herein relate to techniques for operating a DPD for a non-linear electronic device. In order to obtain such techniques, there is provided a DPD, a method performed by the DPD, a computer program product comprising code, for example in the form of a computer program, that when run on a DPD, causes the DPD to perform the method.
Fig. 1 shows an example of a DPD 200 based on ILA. The DPD 200 is configured to, from a signal source 110, receive an input signal destined to be input to a non-linear electronic device 140 in terms of a PA. In some non-limiting examples, the signal source 110 is a signal modulating entity. The signal modulating entity could be a data modulating device e.g. operating at baseband and which is configured to process signals after being channel filtered and/or limited to some amplitude crest factor. The DPD 200 is operatively connected to the non-linear electronic device via a digital-to-analog converter (DAC) 130 in the forward path and an analog-to-digital converter (ADC) 160 in the feedback path. In a first step, a coefficient is calculated in an adaptation block 180 based on the signal produced by the non-linear electronic device 140 and an error signal ( “ERR” ) taken as a difference between the signal ( “REF” ) produced by the DPD 200 and a signal produced by a postdistortion block 170. In a second step, the resultant coefficient ( “COEFF” ) is copied into the postdistortion block 170, and possible also a predistortion block 120. The signal ( “REF” ) produced by the DPD 200 is collected at block 190 for comparison purposes. The signal produced by the non-linear electronic device 140 is collected at block 150 for comparison purposes. ILA can work at one-shot mode, where the coefficient can be given by only one calculation. Further, ILA can also work in an iterative mode.
Fig. 2 shows an example of a DPD 200 based on DLA. As in Fig. 1, the DPD 200 is configured to, from a signal source 110, receive an input signal destined to be input to a non-linear electronic device 140 in terms of a PA and is operatively connected to the non-linear electronic device 140 via a DAC 130 in the forward path and an ADC 160 in the feedback path. An adaptation block 180 calculates a coefficient ( “COEFF” ) based on the input signal to the DPD 200 as well as an error signal ( “ERR” ) based on a difference between the input signal ( “REF” ) to the DPD 200 and the output signal ( “FB” ) produced by the non-linear electronic device 140. An iterative mode is used where the coefficient is updated gradually until the error takes a desired value.
In Fig. 3 is illustrated a block diagram of a DPD 200 with a DLA based on dual-loop adaptation. As in Fig. 1, the DPD 200 is configured to, from a signal source 110, receive an input signal destined to be input to a non-linear electronic device 140 in terms of a PA. The input signal x (n) is modified in a predistortion block 120 (denoted ‘PD’ in the figure) . In this way, the output signal z (n) can be expressed as
z (n) =x (n) +p (n) , (1)
where the injected signal p (n) is provided by a Model (denoted ‘M’ in the figure) . The model can be based on generalized memory polynomials (GMPs) , LUTs, or any forms pruned from a Volterra series. Specifically, the model can be written as:
p (n) =X (n) w ⁽ⁱ⁾ . (2)
X (n) and w ⁽ⁱ⁾ denote the basis function constructed by the input signal x (n) , and the coefficient computed at iteration i, respectively. The basis function is also decided by the tap delays. To generate the signal p (n) , the basis function X (n) and the coefficient w ⁽ⁱ⁾ must be known. X (n) is composed by lots of vectors and each vector is constructed by a set of nonlinear operations of the input signal x (n) . For instance, F (|x (n-A) |) x (n-D) can express a vector embedded in X (n) , where F denotes the nonlinear function, A and D denote the address delay and data delay, respectively. Different vectors can have different values of F, A, or D. The derived signal is a weighted combination of vectors embedded in X (n) , where the weights are represented by the coefficient w ⁽ⁱ⁾ .
In classic DPD approaches, only the coefficient w ⁽ⁱ⁾ is computed adaptively to handle the variants of PA behaviors. From Eq. (2) , it can be observed that adaptation of the basis function X (n) might lead to improved performance. Furthermore, the design cost and time can be significantly reduced if the adaptation of X (n) is accomplished in an automatic way. To achieve this, the tap delays (i.e., address delay and data delay) and the coefficient should be co-optimized. In classic DPD approaches, A and D are configured statically by, for example, offline tap optimization. When the DPD is up and running, only the coefficients are adaptively computed. This corresponds to single-loop adaptation.
Hereinafter will be disclosed techniques according to which A and D can be adapted in addition to w ⁽ⁱ⁾ . This corresponds to dual-loop adaptation. In general terms, at least some of the herein disclosed embodiments are therefore based on that the coefficient computation and the tap optimization are decoupled and executed separately. As illustrated in Fig. 3, there are two control loops. In a first, or outer, control loop 250, ‘T’ represents the computation of the optimal tap delays. Here, tap delays include both the address delay and data delay. In a second, or inner, control loop 240. ‘C’ represents the computation of the optimal coefficient. According to the dual-loop adaptation, both optimal tap delays (as well as its corresponding basis function X (n) ) and optimal coefficient w ⁽ⁱ⁾ will be computed based on the input signal x (n) and the error signal e (n) . The error signal is calculated at block 280 as the difference between the input signal x (n) and the output signal y (n) after gain matching and time alignment in an attenuation ‘ATT’ block 270 is applied to the output signal y (n) .
The ‘f (e) ’ block implements a filter that only allows the error in a frequency region of interest to be provided for the adaptation. By not taking into consideration the error outside the frequency region of interest, the linearization performance inside the frequency region of interest can be improved.
Fig. 4 is a flowchart 400 illustrating embodiments of methods for operating a DPD 200 for a non-linear electronic device 140. The DPD 200 is using coefficients and basis functions defined by an input signal and tap delays. As disclosed above, the tap delays denote the delays for the nonlinear filter, which comprises address delay and data delay, used in the DPD 200. The methods are performed by the DPD 200. The DPD 200 might be implemented in a DLA or an ILA. The methods are advantageously provided as computer programs 1120.
S102: The DPD 200 receives the input signal as destined to be input to a non-linear electronic device 140.
S104: The DPD 200 determines the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal. The DPD 200 implements a first control loop 250 configured to determine the tap delays and a second control loop 240, different from the first control loop 250, configured to determine the coefficients.
S106: The DPD 200 obtains an output signal. The output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays.
S108: The DPD 200 provides the output signal as input to the non-linear electronic
device 140.
Embodiments relating to further details of operating the DPD 200 as performed by the DPD 200 will now be disclosed.
Aspects of the dual-loop adaptation will now be disclosed in more detail.
In some aspects, the second control loop 240 adaptation is performed in a shorter interval than the first control loop 250 adaptation. In particular, in some embodiments, the coefficients and the tap delays are iteratively updated over time as further input signals destined to be input to the non-linear electronic device are received, where the coefficients are updated more frequently than the tap delays. Further, the second control loop 240 adaptation, responsible for coefficient computation, might be performed periodically. That is, in some embodiments, the second control loop 240 is periodically performed to iteratively update the coefficients. Still further, the first control loop 250 adaptation, responsible for tap optimization, might be performed on-demand or periodically in a large interval. That is, in some embodiments, the first control loop 250 is periodically performed, or performed when triggered or requested, to iteratively update the tap delays. There might be different triggers for the first control loop 250. In some examples, when to perform the first control loop 250 is triggered by a counter condition being fulfilled or by an error check condition being fulfilled. The error check condition pertains to an error between the input signal and an output signal from the non-linear electronic device 140. The error check condition might be performed periodically to supervise the signal quality of the output signal from the non-linear electronic device 140. If the mean squared error (MSE) is worse than some threshold value, execution of the first control loop 250 is triggered.
There are different ways to implement the dual-loop adaptation, considering hardware resources of the DPD and timing requirements of performing the different control loops. In general terms, the second control loop 240 is more time critical than the first control loop 250. For this reason, operations of the second control loop 240 might be implemented in hardware (i.e., in an application specific integrated circuit (ASIC) , or a field programmable gate array (FPGA) . In contrast, the first control loop 250 is less time critical. For this reason, operations of the first control loop 250 might be implemented in software. The software might even be executed in a cloud computational environment, and thus the DPD 200 might have a distributed implementation. The measured data from the output of the non-linear electronic device 140 can then be collected and conveyed to a server in the cloud computational environment where the operations of the first control loop 250 are executed. The cloud server could thus calculate the optimal basis function and send the results back to perform the pre-distortion in action S106.
Specific aspects of the second control loop 240 will now be disclosed in more detail.
When the second control loop 240 is executed, the coefficient will be updated according to the input signal (i.e., x (n) ) and the error signal (i.e., e (n) ) . For each iteration, the coefficient is updated according to:
w ⁽ⁱ⁺¹⁾ =w ⁽ⁱ⁾ +μΔw. (3)
Here, μ is a step size between 0 to 1.
At iteration i, the optimal coefficient in terms of MSE can be computed by:
It is noted that X ⁽ⁱ⁾ (n) and e ⁽ⁱ⁾ (n) are only a small portion of X (n) and e (n) , respectively. One reason for this is that these quantities are just used for estimation, and it is therefore no need for using the whole quantities.
Eq. (4) can be solved by
Here, λ is a regularization term and I denotes the identity matrix, respectively. In some cases, the computation can also be simplified as
The value ofas obtained in either of Eq. (5) or Eq. (6) can then be used in Eq. (3) to determine w ⁽ⁱ⁺¹⁾ . Eq. (5) is also referred to as RLS or second-order GD and Eq. (6) is also referred to as LMS or first-order GD. Hence, in some embodiments, the coefficients are determined by running an LMS algorithm or an RLS algorithm in the second control loop 240. It is noted that Eq. (5) for each iteration only computes the differential part according to the new measurement. The process executed in the second control loop 240 based on RLS/LMS can be summarized in Algorithm 1 as listed in Table 1. Step 3 is not needed for RLS, and step 2 is not needed for LMS.
Table 1: Algorithm description for second control loop 240 adaptation
Specific aspects of the first control loop 250 will now be disclosed in more detail.
When no tap delays have yet been determined in the first control loop 250, the coefficients might be determined using random-valued tap delays.
When the first control loop 250 is executed, the tap delays will be updated according to the input signal (i.e., x (n) ) and the error signal (i.e., e (n) ) . The results of tap delays of the first control loop 250 are sent to the second control loop 240 for further computation of the coefficient. The tap optimization can be expressed as:
The optimal tap delays can be searched by a block orthogonal matching pursuit (BOMP) algorithm in an efficient way. Hence, in some embodiments, the tap delays are determined by running a BOMP algorithm in the first control loop 250. It is noted that the BOMP algorithm can also provide the optimal coefficient w ⁽ⁱ⁺¹⁾ .
Further aspects of determining the coefficient will be disclosed next.
In some examples the resulting coefficient is discarded because it will be re-computed in the second control loop 240. Therefore, in one embodiment, when the second control loop 240 is executed, the coefficients are determined based on the tap delays as determined in the first control loop 250. However, in other examples, execution of the second control loop 240 is skipped when the first control loop 250 is executed and in such cases the coefficient w ⁽ⁱ⁺¹⁾ as provided by the first control loop 250 is used. That is, in one embodiment, the first control loop 250 further is configured to determine the coefficients as part of determining the tap delays, and when the coefficients and the tap delays are iteratively updated over time, the second control loop 240 is skipped when the first control loop 250 is performed. That is, in this embodiment, one occasion of the calculations in the second control loop 240 of coefficients is skipped when the coefficients have been calculated by the first control loop 250 recently (or will be shortly) .
The process based the BOMP algorithm executed in the first control loop 250 can be summarized in Algorithm 2 as listed in Table 2.
Table 2: Algorithm description for first control loop 250 adaptation
There are several steps that are common in Algorithm 1 and 2. For instance, step 1 in Algorithm 1 as well as steps 1, 4 and 6 in Algorithm 2 all are normal equations.
Therefore, a common least square (LS) solver can be implemented to execute these steps. This can save computational resources.
Aspects of alternating between the two control loops will be disclosed next with reference to Fig. 5. In Fig. 5 is schematically illustrated the time instances 510, 520, 530 along a time axis where the second control loop 240 and the first control loop 250 are executed, as new measures of the input signal x (n) become available. Reference numeral 510 marks one occasion where new measures become available. Reference numeral 520 marks one occasion where the first control loop 250 is executed. Reference numeral 530 marks one occasion where the second control loop 260 is executed. It is thus shown in Fig. 5 how the second control loop 240 and the first control loop 250 can be alternatingly executed for coefficient computation and tap optimization. Figure 5 illustrates the alternately update of DPD with dual-loop adaptation, where the second control loop 240 is executed only if triggered.
At iteration i, a new measure is requested to acquire data from the input signal x ⁽ⁱ⁾ (n) and the error signal e ⁽ⁱ⁾ (n) for the purpose of adaptation. As disclosed above, the data is only a small piece of x (n) and e (n) . In the second control loop 240, PD’s coefficient is updated according to Algorithm 1. In the first control loop 250, PD’s tap delays are updated according to Algorithm 2. The first control loop 250 might be executed at any time when deemed needed or suitable. One example is to execute the first control loop 250 at least when the DPD is initialized. However, the first control loop 250 can also be executed on-the-fly when DPD is up and running. In some examples the MSE from the observation path is periodically checked. If the MSE is worse than a threshold value (e.g., in the order of -30 to -40 dB) , this could trigger execution of the first control loop 250.
Aspects of basis function switching will be disclosed next.
Once a new basis functionand new coefficientare determined based on new tap delays, the existing coefficient w ⁽ⁱ⁾ is to be updated as shown in Eq. (3) . In this case, performing the computations in Eq. (3) is not straight-forward. One reason is that w ⁽ⁱ⁾ andare computed based on two different basis functions, as caused by the switch of basis function between iteration i and iteration i+1. Switching the basis function in a non-controlled manner may cause outage in the data traffic. Here, a method is proposed that enables the basis function to be seamlessly switched without causing any such outage. One goal of the switching is to minimize the MSE between two predictions, that is:
The solution to Eq. (8) can be written as:
Then, the coefficient can be updated by
Here, uses the estimatefrom Eq. (9) . Hence, in some embodiments, when the basis functions are updated from old basis functions to new basis functions, the coefficients for the new basis functions are re-computed based on the injected signal p (n) determined for the old coefficients and the old basis functions. With basis function switching, the tap delays can be changed anytime without interruption of the functionality of the non-linear device 140.
One particular embodiment for operating the DPD 200 based on at least some of the herein disclosed embodiments, aspects, and examples, will be disclosed next with reference to the flowchart 600 of Fig. 6.
The second control loop 240 adaptation is executed (S202) to update the coefficient. In each iteration, the second control loop 240 captures data from the input of the DPD 200 and the output of the non-linear device 140 (S203) , and computes the coefficient (S204) , for example using the RLS or the LMS algorithm. If execution of the first control loop 250 is triggered (S205; yes) , the tap optimization is executed to optimize tap delays by, for example, using the BOMP algorithm (S207) . Once one iteration of the first control loop 250 is finished, the tap delays and the coefficient are updated with a new basis function (S208) . Then, the procedure switches back to again executing the second control loop 240. In Fig. 6 is illustrated an example where the first control loop 250 can be triggered by a counter condition (S206) . In some examples, the counter condition is implemented as a comparatively long periodic interval, such as 1 hour or 1 day, or even 1 week. As also illustrated in Fig. 6, it is also possible to set a periodical error check condition. If, for example, the MSE is poor, execution of the first control loop 250 is triggered. Otherwise, the second control loop 240 is executed. In case there is no more input data, execution of both the first control loop 250 and of the second control loop 240 can be terminated (S208) .
Measurement results will be shown next with reference to Fig. 7 and Fig. 8.
The performance will be shown in terms of adjacent channel leakage ratio (ACLR) , measured on a non-linear device 140 represented by a dual-band PA. The PA operates at both B1 and B3 frequencies, i.e., 2110 MHz～2170 MHz (B1) , and 1805 MHz～1880 MHz (B3) . The output power of the PA is 41 dBm. To fully utilize the instantaneous bandwidth (IBW) , two carriers with a 60 MHz bandwidth per carrier were set up, placing one carrier center at 1835 MHz, and another carrier center at 2140 MHz. Accordingly, the IBW equals to 365 MHz, and the total carrier bandwidth (TCBW) equals to 120 MHz. In the test, a DPD with 24 filter taps was used. The sampling rate of the test was set to 983.04 MHz, without any oversampling inside the DPD. It is noted that the herein disclosed embodiments are applicable to any basis function, including, but not being limited to, GMP, dynamic deviation reduction (DDR) , piece-wise linear/spline functions, etc. The difference between these basis functions is how the matrix X (n) is constructed.
In Fig. 7 is shown the convergence of the ACLR for GMP based basis functions. Different tap optimizations are evaluated and compared. Firstly, the DPD was run using random tap delays, where N is the number of filter taps in the PD block. Secondly, the DPD was run using the herein disclosed dual-loop adaptation, but with the tap delays initialized with the random values. After several iterations, execution of the first control loop was executed to update the tap delays. It can be seen that when tap optimization is triggered, the ACLR is improved dramatically, thanks to the contribution from the optimal tap delays. Thirdly, the DPD was run with tap delays that have been optimized offline. Typically, this offline tap optimization for the DPD requires around 1～2 days to obtain the optimal results. It can be seen that the ACLR of the DPD with tap delays having been optimized offline converges to approximately the same ACLR of the DPD using the herein disclosed dual-loop adaptation. However, the effort for online tap optimization is ignorable, compared to the effort for offline tap optimization (e.g., 1～2 seconds versus 1～2 days) .
The tests for the results in Fig. 7 were performed in static conditions, without dynamic traffic, dynamic operation, or dynamic environments. For this reason, only one trigger for using the first control loop 250 is good enough. In the case that the test conditions are continuously varying, execution of the first control loop 250 can be triggered as requested to accommodate new behavior of the PA. This leads to another benefit of the herein disclosed dual-loop adaptation compared to the existing offline tap optimization. The herein disclosed dual-loop adaptation can be applied to optimize the tap delays online according to the behavior of the PA under different conditions of traffic, operation, or environments. However, existing offline tap optimization cannot. Existing offline tap optimization must be prepared before the PA is deployed.
In Fig. 8 is shown the power spectral density (PSD) of each test after convergence. It can be observed that optimizing the tap delays substantially improves the performance.
The numerical values of the ACLR, as read from a spectrum analyzer, are provided in Table 3. With tap optimization, the GMP can have 3～4.5 dB improvement. These improvements come from minor effort in terms of computational complexity or design effort.
Table 3: Comparisons of ACLR with different approaches.
Fig. 9 schematically illustrates, in terms of a number of functional units, the components of a DPD 200 according to an embodiment. Processing circuitry 210 is provided using any combination of one or more of a suitable central processing unit (CPU) , multiprocessor, microcontroller, digital signal processor (DSP) , etc., capable of executing software instructions stored in a computer program product 1110 (as in Fig. 11) , e.g. in the form of a storage medium 230. The processing circuitry 210 may further be provided as at least one ASIC, or FPGA.
Particularly, the processing circuitry 210 is configured to cause the DPD 200 to perform a set of operations, or steps, as disclosed above. For example, the storage medium 230 may store the set of operations, and the processing circuitry 210 may be configured to retrieve the set of operations from the storage medium 230 to cause the DPD 200 to perform the set of operations. The set of operations may be provided as a set of executable instructions.
Thus the processing circuitry 210 is thereby arranged to execute methods as herein disclosed. The storage medium 230 may also comprise persistent storage, which, for example, can be any single one or combination of magnetic memory, optical memory, solid state memory or even remotely mounted memory. The DPD 200 may further comprise a communications (comm. ) interface 220 at least configured for communications with other entities, functions, nodes, and devices. As such the communications interface 220 may comprise one or more transmitters and receivers, comprising analogue and digital components. The processing circuitry 210 controls the general operation of the DPD 200 e.g. by sending data and control signals to the communications interface 220 and the storage medium 230, by receiving data and reports from the communications interface 220, and by retrieving data and instructions from the storage medium 230. Other components, as well as the related functionality, of the DPD 200 are omitted in order not to obscure the concepts presented herein.
Fig. 10 schematically illustrates, in terms of a number of functional modules, the components of a DPD 200 according to an embodiment. The DPD 200 of Fig. 10 comprises a number of functional modules; a receive module 210a configured to perform step S102, a determine module 210b configured to perform step S104, an obtain module 210c configured to perform step S106, and a provide module 210d configured to perform step S108. The DPD 200 of Fig. 10 may further comprise a number of optional functional modules, as represented by functional module 210e. In general terms, each functional module 210a: 210e may in one embodiment be implemented only in hardware and in another embodiment with the help of software, i.e., the latter embodiment having computer program instructions stored on the storage medium 230 which when run on the processing circuitry makes the DPD 200 perform the corresponding steps mentioned above in conjunction with Fig 10. It should also be mentioned that even though the modules correspond to parts of a computer program, they do not need to be separate modules therein, but the way in which they are implemented in software is dependent on the programming language used. Preferably, one or more or all functional modules 210a: 210e may be implemented by the processing circuitry 210, possibly in cooperation with the communications interface 220 and/or the storage medium 230. The processing circuitry 210 may thus be configured to from the storage medium 230 fetch instructions as provided by a functional module 210a: 210e and to execute these instructions, thereby performing any steps as disclosed herein.
The DPD 200 may be provided as a standalone device or as a part of at least one further device. For example, the functionality of the DPD 200 may collocated with the functionality of the non-linear electronic device 140. A first portion of the instructions performed by the DPD 200 may be executed in a first device, and a second portion of the of the instructions performed by the DPD 200 may be executed in a second device; the herein disclosed embodiments are not limited to any particular number of devices on which the instructions performed by the DPD 200 may be executed. Hence, the methods according to the herein disclosed embodiments are suitable to be performed by a DPD 200 residing in a cloud computational environment. Therefore, although a single processing circuitry 210 is illustrated in Fig. 9 the processing circuitry 210 may be distributed among a plurality of devices, or nodes. The same applies to the functional modules 210a: 210e of Fig. 10 and the computer program 1120 of Fig. 11.
The non-linear electronic device 140 might be part of a (radio) access network node. Some (radio) access network architectures define network nodes (or gNBs) comprising multiple component parts or nodes: a central unit (CU) , one or more distributed units (DUs) , and one or more radio units (RUs) . The protocol layer stack of the network node is divided between the CU, the DUs and the RUs, with one or more lower layers of the stack implemented in the RUs, and one or more higher layers of the stack implemented in the CU and/or DUs. The CU is coupled to the DUs via a fronthaul higher layer split (HLS) network; the CU/DUs are connected to the RUs via a fronthaul lower-layer split (LLS) network. The DU may be combined with the CU in some embodiments, where a combined DU/CU may be referred to as a CU or simply a baseband unit. A communication link for communication of user data messages or packets between the RU and the baseband unit, CU, or DU is referred to as a fronthaul network or interface. Messages or packets may be transmitted from the network node in the downlink (i.e., from the CU to the RU) or received by the network node in the uplink (i.e., from the RU to the CU) .
Fig. 11 shows one example of a computer program product 1110 comprising computer readable storage medium 1130. On this computer readable storage medium 1130, a computer program 1120 can be stored, which computer program 1120 can cause the processing circuitry 210 and thereto operatively coupled entities and devices, such as the communications interface 220 and the storage medium 230, to execute methods according to embodiments described herein. The computer program 1120 and/or computer program product 1110 may thus provide means for performing any steps as herein disclosed.
In the example of Fig. 11, the computer program product 1110 is illustrated as an optical disc, such as a CD (compact disc) or a DVD (digital versatile disc) or a Blu-Ray disc. The computer program product 1110 could also be embodied as a memory, such as a random access memory (RAM) , a read-only memory (ROM) , an erasable programmable read-only memory (EPROM) , or an electrically erasable programmable read-only memory (EEPROM) and more particularly as a non-volatile storage medium of a device in an external memory such as a USB (Universal Serial Bus) memory or a Flash memory, such as a compact Flash memory. Thus, while the computer program 1120 is here schematically shown as a track on the depicted optical disk, the computer program 1120 can be stored in any way which is suitable for the computer program product 1110.
The inventive concept has mainly been described above with reference to a few embodiments. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the inventive concept, as defined by the appended patent claims.

Claims

A method for operating a digital pre-distorter, DPD, (200) for a non-linear electronic device (140) , wherein the DPD (200) is using coefficients and basis functions defined by an input signal and tap delays, wherein the method is performed by the DPD (200) , and wherein the method comprises:

receiving (S102) the input signal as destined to be input to a non-linear electronic device (140) ;

determining (S104) the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal, wherein the DPD (200) implements a first control loop (250) configured to determine the tap delays and a second control loop (240) , different from the first control loop (250) , configured to determine the coefficients;

obtaining (S106) an output signal, wherein the output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays; and

providing (S108) the output signal as input to the non-linear electronic device (140) .
The method according to claim 1, wherein the coefficients and the tap delays are iteratively updated over time as further input signals destined to be input to the non-linear electronic device are received, and wherein the coefficients are updated more frequently than the tap delays.
The method according to claim 1 or 2, wherein the second control loop (240) is periodically performed to iteratively update the coefficients.
The method according to any preceding claim, wherein the first control loop (250) is periodically performed, or performed when triggered or requested, to iteratively update the tap delays.
The method according to any preceding claim, wherein when to perform the first control loop (250) is triggered by a counter condition being fulfilled or by an error check condition being fulfilled.
The method according to claim 5, wherein the error check condition pertains to an error between the input signal and an output signal from the non-linear electronic device (140) .
The method according to any preceding claim, wherein, when no tap delays have yet been determined in the first control loop (250) , the coefficients are determined using random-valued tap delays.
The method according to any of claims 1 to 6, wherein the coefficients are determined based on the tap delays as determined in the first control loop (250) .
The method according to any of claims 1 to 6, wherein the first control loop (250) further is configured to determine the coefficients as part of determining the tap delays, and wherein when the coefficients and the tap delays are iteratively updated over time, the second control loop (240) is skipped when the first control loop (250) is performed.
The method according to any preceding claim, wherein, when the basis functions are updated from old basis functions to new basis functions, the coefficients for the new basis functions are re-computed based on a signal added to the input signal when pre-distorting the input signal, wherein the input signal is determined for the old coefficients and the old basis functions.
The method according to any preceding claim, wherein the coefficients are determined by running a least-mean squares algorithm or recursive least squares algorithm in the second control loop (240) .
The method according to any preceding claim, wherein the tap delays are determined by running a block orthogonal matching pursuit algorithm in the first control loop (250) .
The method according to any preceding claim, wherein operations of the second control loop (240) are implemented in hardware.
The method according to any preceding claim, wherein operations of the first control loop (250) are implemented in software.
The method according to any preceding claim, wherein the DPD is implemented in a direct learning architecture.
The method according to any of claims 1 to 14, wherein the DPD is implemented in an indirect learning architecture.
A digital pre-distorter, DPD, (200) for a non-linear electronic device (140) , wherein the DPD (200) is using coefficients and basis functions defined by coefficients an input signal and tap delays, the DPD (200) comprising processing circuitry (210) , the processing circuitry being configured to cause the DPD (200) to:

receive the input signal as destined to be input to a non-linear electronic device (140) ;

determine the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal, wherein the DPD (200) implements a first control loop (250) configured to determine the tap delays and a second control loop (240) , different from the first control loop (250) , configured to determine the coefficients;

obtain an output signal, wherein the output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays; and

provide the output signal as input to the non-linear electronic device (140) .
A digital pre-distorter, DPD, (200) for a non-linear electronic device (140) , wherein the DPD (200) is using coefficients and basis functions defined by coefficients an input signal and tap delays, the DPD (200) comprising:

a receive module (210a) configured to receive the input signal as destined to be input to a non-linear electronic device (140) ;

a determine module (210b) configured to determine the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal, wherein the DPD (200) implements a first control loop (250) configured to determine the tap delays and a second control loop (240) , different from the first control loop (250) , configured to determine the coefficients;

an obtain module (210c) configured to obtain an output signal, wherein the output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays; and

a provide module (210d) configured to provide the output signal as input to the non-linear electronic device (140) .
The DPD (200) according to claim 17 or 18, further being configured to perform the method according to any of claims 2 to 16.
A computer program (1200) for operating a digital pre-distorter, DPD, (200) for a non-linear electronic device (140) , wherein the DPD (200) is using coefficients and basis functions defined by coefficients an input signal and tap delays, the computer program comprising computer code which, when run on processing circuitry (210) of the DPD (200) , causes the DPD (200) to:

receive (S102) the input signal as destined to be input to a non-linear electronic device (140) ;

determine (S104) the coefficients and the tap delays for one of the basis functions for the DPD as a function of the input signal, wherein the DPD (200) implements a first control loop (250) configured to determine the tap delays and a second control loop (240) , different from the first control loop (250) , configured to determine the coefficients;

obtain (S106) an output signal, wherein the output signal is obtained by the DPD pre-distorting the input signal using the determined coefficients and tap delays; and

provide (S108) the output signal as input to the non-linear electronic device (140) .
A computer program product (1110) comprising a computer program (1200) according to claim 20, and a computer readable storage medium (1130) on which the computer program is stored.