EP4616255A1

EP4616255A1 - Creating a dense defect probability map for use in a computational guided inspection machine learning model

Info

Publication number: EP4616255A1
Application number: EP23793300.7A
Authority: EP
Inventors: Fuming Wang
Original assignee: ASML Netherlands BV
Current assignee: ASML Netherlands BV
Priority date: 2022-11-11
Filing date: 2023-10-17
Publication date: 2025-09-17
Also published as: IL320494A; JP2025540579A; KR20250108661A; WO2024099710A1; CN120188113A; TW202436863A

Abstract

An apparatus for training a machine learning model for inspecting a wafer includes a memory storing a set of instructions and at least one processor configured to execute the set of instructions to cause the apparatus to perform: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+1th wafer and inputting a generated defect probability map for 1–N wafers into the machine learning model at a predetermined interval.

Description

CREATING A DENSE DEFECT PROBABILITY MAP FOR USE IN A COMPUTATIONAL GUIDED INSPECTION MACHINE LEARNING MODEL

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63/383,456 which was filed on November 11, 2022 and which is incorporated herein in its entirety by reference.

TECHNICAL FIELD

[0002] The embodiments provided herein relate to computational guided inspection, and more particularly to creating and using a defect probability map in a computational guided inspection machine learning model.

BACKGROUND

[0003] In manufacturing processes of integrated circuits (ICs), unfinished or finished circuit components are inspected to ensure that they are manufactured according to design and are free of defects. Inspection systems utilizing optical microscopes or charged particle (e.g., electron) beam microscopes, such as a scanning electron microscope (SEM) can be employed. As the physical sizes of IC components continue to shrink, accuracy and yield in defect detection become more important. Various metrology tools are developed and used to check whether the ICs are correctly manufactured. To improve defect inspection performance, a computational guided inspection (CGI) machine learning model may be used to assist the tools by indicating areas of a wafer to be inspected.

SUMMARY

[0004] The embodiments provided herein disclose a particle beam inspection apparatus, and more particularly, an inspection apparatus using a plurality of charged particle beams.

[0005] Some embodiments provide an apparatus for training a machine learning model for inspecting a wafer. The apparatus can include a memory storing a set of instructions and at least one processor configured to execute the set of instructions to cause the apparatus to perform: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting a generated defect probability map for 1-N wafers into the machine learning model at a predetermined interval. For example, the defect probability map is generated based on the 1-Nth wafer defect data (e.g., accumulated Nth wafer defect data). According to aspects, the probability map is mainly for N+l, N-m wafers. After accumulating N wafers, the defect probability map is generated, which will benefit the model for wafers after the Nth wafers. [0006] Other advantages of the embodiments of the present disclosure will become apparent from the following description taken in conjunction with the accompanying drawings wherein are set forth, by way of illustration and example, certain embodiments of the present invention.

BRIEF DESCRIPTION OF FIGURES

[0007] The above and other aspects of the present disclosure will become more apparent from the description of exemplary embodiments, taken in conjunction with the accompanying drawings.

[0008] FIG. 1 is a schematic diagram illustrating an example charged-particle beam inspection system, consistent with embodiments of the present disclosure.

[0009] FIG. 2 is a schematic diagram illustrating an example multi-beam tool that can be a part of the example charged-particle beam inspection system of FIG. 1, consistent with embodiments of the present disclosure.

[0010] FIG. 3 is a flow diagram of an example process for using historical computational guided inspection (CGI) data as an input for training a CGI machine learning model, consistent with embodiments of the present disclosure.

[0011] FIG. 4 is a flowchart of an example method for creating and using a defect probability map to predict wafer areas to be scanned, consistent with embodiments of the present disclosure.

[0012] FIG. 5 is a flow diagram of an example process for using process window metrology to create a defect probability map, consistent with embodiments of the present disclosure.

[0013] FIG. 6 is a flowchart of another example method for creating and using a defect probability map to predict wafer areas to be scanned, consistent with embodiments of the present disclosure. [0014] FIG. 7 is a flowchart of an example method for a wafer defect scanning process, consistent with embodiments of the present disclosure.

DETAILED DESCRIPTION

[0015] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplary embodiments do not represent all implementations. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the disclosed embodiments as recited in the appended claims. For example, although some embodiments are described in the context of utilizing electron beams, the disclosure is not so limited. Other types of charged-particle beams (e.g., including protons, ions, muons, or any other particle carrying electric charges) may be similarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photon detection, x-ray detection, ion detection, etc. [0016] Electronic devices are constructed of circuits formed on a piece of semiconductor material called a substrate. The semiconductor material may include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium, or the like. Many circuits may be formed together on the same piece of silicon and are called integrated circuits or ICs. The size of these circuits has decreased dramatically so that many more of them can be fit on the substrate. For example, an IC chip in a smartphone can be as small as a thumbnail and yet may include over 2 billion transistors, the size of each transistor being less than l/1000th the size of a human hair.

[0017] Making these ICs with extremely small structures or components is a complex, timeconsuming, and expensive process, often involving hundreds of individual steps. Errors in even one step have the potential to result in defects in the finished IC, rendering it useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs made in the process; that is, to improve the overall yield of the process.

[0018] One component of improving yield is monitoring the chip-making process to ensure that it is producing a sufficient number of functional integrated circuits. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection can be carried out using a scanning charged-particle microscope (SCPM). For example, an SCPM may be a scanning electron microscope (SEM). A SCPM can be used to image these extremely small structures, in effect, taking a “picture” of the structures of the wafer. The image can be used to determine if the structure was formed properly in the proper location. If the structure is defective, then the process can be adjusted, so the defect is less likely to recur.

[0019] As the physical sizes of IC components continue to shrink, accuracy and yield in defect detection come more important. Metrology tools can be used to determine whether the ICs are correctly manufactured by identifying a number of defects on each wafer, including at different levels of detail, such as a die level, a care area, or an image patch level.

[0020] Current computational guided inspection (CGI) processes guide inspection tools to locations on a wafer where there are a higher probability of defects. A CGI machine learning model may be built and used to output a sampling location on the wafer, so the inspection tool will go to the sampling location to inspect with a higher efficiency than inspecting wafer locations based on experience (e.g., a history of prior defects detected during scanning). The CGI process increases inspection tool efficiency by increasing the accuracy of finding defects on the wafer with capture rates of finding defects higher than a baseline value. A machine learning-based CGI model receives input from various data sources, such as wafer characteristic data (which may include scanner data, metrology data, and process data) to train the model with inspection results. The model accuracy depends on the data quality. In a high- volume manufacturing environment, the metrology data (as measured by a critical dimension scanning electron microscope (CD-SEM), for example) may sample a small number of data points (e.g., 10-20 data points) on the wafer, which may lead to errors when trying to fit a wafer map out of the errors. [0021] Embodiments of the present disclosure can provide a defect probability map that is used as an input to the CGI model to help improve the CGI model’s accuracy. According to some embodiments of the present disclosure, a number of wafers are scanned and a number of defects on each wafer are determined and a defect map for each wafer is created. The defect maps for each wafer are stacked together to form a defect probability map. In some embodiments, by providing the defect probability map along with wafer characteristic data, such as scanner data, metrology data, and process data, the CGI model may be trained with more data points, leading to a more accurate CGI model and more accurate inspection results for subsequent wafers that are inspected.

[0022] Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings, the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described. As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component may include A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component may include A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0023] FIG. 1 illustrates an example electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure. EBI system 100 may be used for imaging. As shown in FIG. 1, EBI system 100 includes a main chamber 101, a load/lock chamber 102, a beam tool 104, and an equipment front end module (EFEM) 106. Beam tool 104 is located within main chamber 101. EFEM 106 includes a first loading port 106a and a second loading port 106b. EFEM 106 may include additional loading port(s). First loading port 106a and second loading port 106b receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material) s)) or samples to be inspected (wafers and samples may be used interchangeably). A “lot” is a plurality of wafers that may be loaded for processing as a batch.

[0024] One or more robotic arms (not shown) in EFEM 106 may transport the wafers to load/lock chamber 102. Load/lock chamber 102 is connected to a load/lock vacuum pump system (not shown) which removes gas molecules in load/lock chamber 102 to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load/lock chamber 102 to main chamber 101. Main chamber 101 is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber 101 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by beam tool 104. Beam tool 104 may be a single-beam system or a multi-beam system.

[0025] A controller 109 is electronically connected to beam tool 104. Controller 109 may be a computer configured to execute various controls of EBI system 100. While controller 109 is shown in FIG. 1 as being outside of the structure that includes main chamber 101, load/lock chamber 102, and EFEM 106, it is appreciated that controller 109 may be a part of the structure.

[0026] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a generic or specific electronic device capable of manipulating or processing information. For example, the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controller, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field- Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network.

[0027] In some embodiments, controller 109 may further include one or more memories (not shown). A memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device. The codes and data may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks. The memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network.

[0028] FIG. 2 illustrates a schematic diagram of an example multi-beam tool 104 (also referred to herein as apparatus 104) and an image processing system 290 that may be configured for use in EBI system 100 (FIG. 1), consistent with embodiments of the present disclosure.

[0029] Beam tool 104 comprises a charged-particle source 202, a gun aperture 204, a condenser lens 206, a primary charged-particle beam 210 emitted from charged-particle source 202, a source conversion unit 212, a plurality of beamlets 214, 216, and 218 of primary charged-particle beam 210, a primary projection optical system 220, a motorized wafer stage 280, a wafer holder 282, multiple secondary charged-particle beams 236, 238, and 240, a secondary optical system 242, and a charged- particle detection device 244. Primary projection optical system 220 can comprise a beam separator 222, a deflection scanning unit 226, and an objective lens 228. Charged-particle detection device 244 can comprise detection sub-regions 246, 248, and 250.

[0030] Charged-particle source 202, gun aperture 204, condenser lens 206, source conversion unit 212, beam separator 222, deflection scanning unit 226, and objective lens 228 can be aligned with a primary optical axis 260 of apparatus 104. Secondary optical system 242 and charged-particle detection device 244 can be aligned with a secondary optical axis 252 of apparatus 104. [0031] Charged-particle source 202 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other particle carrying electric charges. In some embodiments, charged- particle source 202 may be an electron source. For example, charged-particle source 202 may include a cathode, an extractor, or an anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form primary charged-particle beam 210 (in this case, a primary electron beam) with a crossover (virtual or real) 208. For ease of explanation without causing ambiguity, electrons are used as examples in some of the descriptions herein. However, it should be noted that any charged particle may be used in any embodiment of this disclosure, not limited to electrons. Primary charged-particle beam 210 can be visualized as being emitted from crossover 208. Gun aperture 204 can block off peripheral charged particles of primary charged-particle beam 210 to reduce Coulomb effect. The Coulomb effect may cause an increase in size of probe spots.

[0032] Source conversion unit 212 can comprise an array of image-forming elements and an array of beam-limit apertures. The array of image-forming elements can comprise an array of micro-deflectors or micro-lenses. The array of image-forming elements can form a plurality of parallel images (virtual or real) of crossover 208 with a plurality of beamlets 214, 216, and 218 of primary charged-particle beam 210. The array of beam-limit apertures can limit the plurality of beamlets 214, 216, and 218. While three beamlets 214, 216, and 218 are shown in FIG. 2, embodiments of the present disclosure are not so limited. For example, in some embodiments, the apparatus 104 may be configured to generate a first number of beamlets. In some embodiments, the first number of beamlets may be in a range from 1 to 1000. In some embodiments, the first number of beamlets may be in a range from 200-500. In an exemplary embodiment, the apparatus 104 may generate 400 beamlets.

[0033] Condenser lens 206 can focus primary charged-particle beam 210. The electric currents of beamlets 214, 216, and 218 downstream of source conversion unit 212 can be varied by adjusting the focusing power of condenser lens 206 or by changing the radial sizes of the corresponding beam-limit apertures within the array of beam-limit apertures. Objective lens 228 can focus beamlets 214, 216, and 218 onto a wafer 230 for imaging, and can form a plurality of probe spots 270, 272, and 274 on a surface of wafer 230.

[0034] Beam separator 222 can be a beam separator of Wien filter type generating an electrostatic dipole field and a magnetic dipole field. In some embodiments, if they are applied, the force exerted by the electrostatic dipole field on a charged particle (e.g., an electron) of beamlets 214, 216, and 218 can be substantially equal in magnitude and opposite in a direction to the force exerted on the charged particle by magnetic dipole field. Beamlets 214, 216, and 218 can, therefore, pass straight through beam separator 222 with zero deflection angle. However, the total dispersion of beamlets 214, 216, and 218 generated by beam separator 222 can also be non-zero. Beam separator 222 can separate secondary charged-particle beams 236, 238, and 240 from beamlets 214, 216, and 218 and direct secondary charged-particle beams 236, 238, and 240 towards secondary optical system 242. [0035] Deflection scanning unit 226 can deflect beamlets 214, 216, and 218 to scan probe spots 270, 272, and 274 over a surface area of wafer 230. In response to the incidence of beamlets 214, 216, and 218 at probe spots 270, 272, and 274, secondary charged-particle beams 236, 238, and 240 may be emitted from wafer 230. Secondary charged-particle beams 236, 238, and 240 may comprise charged particles (e.g., electrons) with a distribution of energies. For example, secondary charged-particle beams 236, 238, and 240 may be secondary electron beams including secondary electrons (energies < 50 eV) and backscattered electrons (energies between 50 eV and landing energies of beamlets 214, 216, and 218). Secondary optical system 242 can focus secondary charged-particle beams 236, 238, and 240 onto detection sub-regions 246, 248, and 250 of charged-particle detection device 244. Detection sub-regions 246, 248, and 250 may be configured to detect corresponding secondary charged-particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltage, current, or the like) used to reconstruct an SCPM image of structures on or underneath the surface area of wafer 230.

[0036] The generated signals may represent intensities of secondary charged-particle beams 236, 238, and 240 and may be provided to image processing system 290 that is in communication with charged-particle detection device 244, primary projection optical system 220, and motorized wafer stage 280. The movement speed of motorized wafer stage 280 may be synchronized and coordinated with the beam deflections controlled by deflection scanning unit 226, such that the movement of the scan probe spots (e.g., scan probe spots 270, 272, and 274) may orderly cover regions of interests on the wafer 230. The parameters of such synchronization and coordination may be adjusted to adapt to different materials of wafer 230. For example, different materials of wafer 230 may have different resistance-capacitance characteristics that may cause different signal sensitivities to the movement of the scan probe spots.

[0037] The intensity of secondary charged-particle beams 236, 238, and 240 may vary according to the external or internal structure of wafer 230, and thus may indicate whether wafer 230 includes defects. Moreover, as discussed above, beamlets 214, 216, and 218 may be projected onto different locations of the top surface of wafer 230, or different sides of local structures of wafer 230, to generate secondary charged-particle beams 236, 238, and 240 that may have different intensities. Therefore, by mapping the intensity of secondary charged-particle beams 236, 238, and 240 with the areas of wafer 230, image processing system 290 may reconstruct an image that reflects the characteristics of internal or external structures of wafer 230.

[0038] In some embodiments, image processing system 290 may include an image acquirer 292, a storage 294, and a controller 296. Image acquirer 292 may comprise one or more processors. For example, image acquirer 292 may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, or the like, or a combination thereof. Image acquirer 292 may be communicatively coupled to charged-particle detection device 244 of beam tool 104 through a medium such as an electric conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, or a combination thereof. In some embodiments, image acquirer 292 may receive a signal from charged-particle detection device 244 and may construct an image. Image acquirer 292 may thus acquire SCPM images of wafer 230. Image acquirer 292 may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, or the like. Image acquirer 292 may be configured to perform adjustments of brightness and contrast of acquired images. In some embodiments, storage 294 may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer-readable memory, or the like. Storage 294 may be coupled with image acquirer 292 and may be used for saving scanned raw image data as original images, and postprocessed images. Image acquirer 292 and storage 294 may be connected to controller 296. In some embodiments, image acquirer 292, storage 294, and controller 296 may be integrated together as one control unit.

[0039] In some embodiments, image acquirer 292 may acquire one or more SCPM images of a wafer based on an imaging signal received from charged-particle detection device 244. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas. The single image may be stored in storage 294. The single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of wafer 230. The acquired images may comprise multiple images of a single imaging area of wafer 230 sampled multiple times over a time sequence. The multiple images may be stored in storage 294. In some embodiments, image processing system 290 may be configured to perform image processing steps with the multiple images of the same location of wafer 230.

[0040] In some embodiments, image processing system 290 may include measurement circuits (e.g., analog-to-digital converters) to obtain a distribution of the detected secondary charged particles (e.g., secondary electrons). The charged-particle distribution data collected during a detection time window, in combination with corresponding scan path data of beamlets 214, 216, and 218 incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection. The reconstructed images can be used to reveal various features of the internal or external structures of wafer 230, and thereby can be used to reveal any defects that may exist in the wafer.

[0041] In some embodiments, the charged particles may be electrons. When electrons of primary charged-particle beam 210 are projected onto a surface of wafer 230 (e.g., probe spots 270, 272, and 274), the electrons of primary charged-particle beam 210 may penetrate the surface of wafer 230 for a certain depth, interacting with particles of wafer 230. Some electrons of primary charged-particle beam 210 may elastically interact with (e.g., in the form of elastic scattering or collision) the materials of wafer 230 and may be reflected or recoiled out of the surface of wafer 230. An elastic interaction conserves the total kinetic energies of the bodies (e.g., electrons of primary charged-particle beam 210) of the interaction, in which the kinetic energy of the interacting bodies does not convert to other forms of energy (e.g., heat, electromagnetic energy, or the like). Such reflected electrons generated from elastic interaction may be referred to as backscattered electrons (BSEs). Some electrons of primary charged-particle beam 210 may inelastically interact with (e.g., in the form of inelastic scattering or collision) the materials of wafer 230. An inelastic interaction does not conserve the total kinetic energies of the bodies of the interaction, in which some or all of the kinetic energy of the interacting bodies convert to other forms of energy. For example, through the inelastic interaction, the kinetic energy of some electrons of primary charged-particle beam 210 may cause electron excitation and transition of atoms of the materials. Such inelastic interaction may also generate electrons exiting the surface of wafer 230, which may be referred to as secondary electrons (SEs). Yield or emission rates of BSEs and SEs depend on, e.g., the material under inspection and the landing energy of the electrons of primary charged-particle beam 210 landing on the surface of the material, among others. The energy of the electrons of primary charged-particle beam 210 may be imparted in part by its acceleration voltage (e.g., the acceleration voltage between the anode and cathode of charged-particle source 202 in FIG. 2). The quantity of BSEs and SEs may be more or fewer (or even the same) than the injected electrons of primary charged-particle beam 210.

[0042] The images generated by SCPM may be used for defect inspection. For example, a generated image capturing a test device region of a wafer may be compared with a reference image capturing the same test device region. The reference image may be predetermined (e.g., by simulation) and include no known defect. If a difference between the generated image and the reference image exceeds a tolerance level, a potential defect may be identified. For another example, the SCPM may scan multiple regions of the wafer, each region including a test device region designed as the same, and generate multiple images capturing those test device regions as manufactured. The multiple images may be compared with each other. If a difference between the multiple images exceeds a tolerance level, a potential defect may be identified.

[0043] Current computational guided inspection (CGI) processes guide inspection tools to locations on a wafer where there are a higher probability of defects. A CGI machine learning model may be built and used to output a sampling location on the wafer, so the inspection tool will go to the sampling location to inspect with a higher efficiency than inspecting wafer locations based on experience (e.g., a history of prior defects in a given location detected during scanning). The CGI process increases inspection tool efficiency by increasing the accuracy of finding defects on the wafer with capture rates of finding defects higher than a baseline value. A machine learning-based CGI model receives input from various data sources, including wafer characteristic data such as scanner data, metrology data, and process data to train the model with inspection results. The model accuracy depends on the data quality, such that higher quality data results in a higher model accuracy. In a high-volume manufacturing environment, the metrology data (as measured by a critical dimension scanning electron microscope (CD-SEM), for example) may sample a small number of data points (e.g., 10-20 data points) on the wafer, which may lead to errors when trying to fit a wafer map out of the detected errors. To improve the accuracy of the CGI machine learning model, more data points (i.e., more detail) are needed.

[0044] In conventional systems, inspection data (which is the defect data) is the output from the inspection tools. Conventional systems also do not provide feedback to the model to increase the model’s accuracy. With the CGI tool and the CGI machine learning model described herein, each wafer may have hundreds of scanned locations, providing more dense data than prior input data and includes direct defect information that can be used to improve the CGI machine learning model.

[0045] In some embodiments, historical inspection data output from the inspection tool is used to generate a defect probability map that may be used to update the CGI machine learning model. As inspection sampling is generally denser than metrology at high-volume manufacturing levels, the defect probability map created from inspection results provides a denser wafer map for CGI machine learning model training and helps to reduce the accuracy impact from the sparse metrology data previously used for the CGI machine learning model training.

[0046] The CGI machine learning model creates dynamic sampling on the wafer, and the inspection tool inspects the locations based on the dynamic sampling on different wafers. The historical inspection results include a large amount of defect information on many wafers across dynamic locations. In some embodiments, the historical inspection data output from the inspection tool is used to generate a defect probability map that can be used to update the CGI machine learning model. The N+l wafer CGI inspection results are used to update the defect probability map. As each CGI inspection sampling is different from wafer to wafer, with accumulated historical inspection data, a defect probability wafer map can be created at different defect aggregation levels, such as a die level, a care area, or an image patch level.

[0047] The defect probability per sampling region may be determined based on the number of defects captured in the sampling region divided by the number of wafers sampled. The sampling region may correspond to the defect aggregation level, such that the sampling region may be at the die level, the care area, or the image patch level. The defect probability per sampling region can be expressed based on the following equation: Equation (I).

[0048] The defect probability can be calculated by stacking inspection results across historical wafers. At each sampling region on the wafers, there are wafers that have no defects in the sampling region and there are wafers that have defects in the sampling region. The defect probability in a certain time frame on the wafers inspected may be calculated based on Equation (I).

[0049] With hundreds of inspected regions across the wafer and the calculated defect probability, certain fitting algorithms, such as Zernike or polynomial based fitting, can be used to create the dense defect probability wafer map. The defect probability map may be derived from historical data and combining new wafer characteristic data, such as scanner data, metrology data, and process data, on the next wafer to inspect. The defect probability map is then used to update the CGI machine learning model and the updated model can predict a new inspection sampling for the next (N+l) wafer. After the N+l wafer is inspected, its inspection results are provided to update the defect probability map and to continue to improve the CGI machine learning model with the latest defect probability map for the next wafer to be inspected.

[0050] FIG. 3 is a flow diagram of a process 300 for using historical computational guided inspection (CGI) data as an input for training a CGI machine learning model, consistent with embodiments of the present disclosure. A CGI machine learning model 302 is used as a guide to detect defects on a plurality of wafers (shown as 304a, 304b, and 304c). The defects detected on the individual wafers 304a-304c are combined to form a stacked defect map 306. In some embodiments, the stacked defect map 306 may be based on historical CGI results of individual wafer scans. In some embodiments, the stacked defect map 306 may be based on defect data of individual wafer scans obtained by other sampling methods (e.g., sampling methods that do not use CGI), such as defect data obtained from an SEM tool. In some embodiments, the stacked defect map 306 may be based on defect data of individual wafer scans obtained from a combination of sources, including historical CGI results and non-CGI based inspection tools.

[0051] The stacked defect map 306 is used to generate a defect probability map 308, which indicates a probability of a defect on each region of the wafer. The defect probability map 308 is provided as one input for updating the CGI machine learning model 310. Additional data 312, including wafer characteristic data such as scanner data, metrology data, and process data, is also provided as input for updating the CGI machine learning model 310. The updated CGI machine learning model 310 is used to predict defects on the next wafer 314 to be scanned (also referred to as the N+l wafer). The defect detection results for wafer 314 are used to update the defect probability map 308, which in turn updates the CGI machine learning model 310. The process 300 continues as a feedback loop to update the CGI machine learning model 310.

[0052] The feedback loop is used to update the CGI machine learning model 310 and the defect probability map 308. The feedback loop does not have to include data from each wafer scanned. For example, the feedback loop may be performed periodically. As one example, the feedback loop may be performed every X number of wafers (e.g., every 100 wafers). As another example, the feedback loop may be performed every Y days (e.g., every 3 or 4 days).

[0053] In addition to the feedback loop, the CGI machine learning model 310 and the defect probability map 308 may be monitored. If something in either the CGI machine learning model 310 or the defect probability map 308 appears “off’ (for example, if there is a drift in the data, deviating from the defect probability map), an update may be triggered (for example, a KPI triggered update. A KPI (key performance indicator) can be the CGI inspection results compared to a ground truth, the CGI sampling count, the CGI captured defect count, the machine learning model feature attribution score, etc.) and may be used to update the CGI machine learning model 310 and the defect probability map 308.

[0054] The process may also be monitored during defect probability map creation. For example, if after inspection it is determined that a wafer is “bad,” then the data from the “bad” wafer may be discarded and not used in updating the defect probability map. For example, a wafer with a number of defects higher than a predetermined threshold may be considered to be a “bad” wafer. The threshold may be an absolute number of defects (e.g., if the number of defects on the wafer exceeds the threshold, then the data for that wafer is discarded) or may be a percentage deviation from the average number of defects detected (e.g., if the average number of defects is typically around 100 defects per wafer but the N+l wafer has over 1000 defects, then the data for the N+l wafer is discarded).

[0055] The defect probability map 308 is only one input into the CGI machine learning model 310 and can be used to improve the accuracy of the CGI machine learning model 310. Even if the defect probability map 308 is not currently being updated (for example, while in-between periodic updates of the defect probability map 308), the CGI machine learning model 310 keeps using the other data (e.g., the wafer characteristic data, such as the scanner data, the metrology data, and the process data) to monitor the CGI machine learning model 310. In some embodiments, the defect probability map 308 may be used as an input to the CGI machine learning model 310 after the defect probability map 308 includes data on a predetermined minimum number of wafers, e.g., 100 wafers.

[0056] In some embodiments, the defect probability map 308 may be displayed to a user. For example, the defect probability map 308 may be displayed to a user who is monitoring the CGI tool’ s operation, for example at a monitoring station. In some embodiments, the defect probability map 308 may be displayed to the user in certain operating modes of the monitoring station, for example, in a debug mode. In some embodiments, the defect probability map 308 may be displayed as a heat map to graphically show the defect probabilities in different areas of the wafer. In other embodiments, the defect probability map 308 may be displayed in different formats. In some embodiments, the defect probability map 308 may be hidden from the user because the defect probability map is intermediate data that is input into the CGI machine learning model 310.

[0057] Using the defect probability map 308 in the CGI machine learning model 310 does not change how the CGI machine learning model 310 works during wafer inspection. The sampling is determined by an algorithm. For example, one algorithm may be to inspect wafer locations with a highest probability for defects and skip wafer locations with a lower probability for defects. In some embodiments, whether a wafer location is to be inspected may be determined by a threshold probability value for there being a defect at the location. If the probability value meets or exceeds the threshold, then the wafer location is inspected. If the probability value is below the threshold, then the wafer location is skipped. [0058] FIG. 4 is a flowchart of a method 400 for using historical CGI data as an input for training a CGI machine learning model, consistent with embodiments of the present disclosure. The steps of method 400 may be performed by a system (e.g., system 300 of FIG. 3) executing on or otherwise using the features of a computing device, e.g., controller 109 of FIG. 1. It is appreciated that the illustrated method 400 may be altered to modify the order of steps and to include additional steps. [0059] A plurality of wafers are scanned to detect defects on each of the plurality of wafers (step 402). Step 402 can be performed by, for example, a CGI guided inspection tool (e.g., a CD-SEM) or other type of inspection tool or metrology tool. In some embodiments, CGI machine learning model 302 may be used as a guide to detect defects on the plurality of wafers (e.g., wafers 304a-304c). In some embodiments, the area of each wafer scanned may be the same, may be different, or may partially overlap. By using dynamic sampling (e.g., changing at least some of the area of each wafer scanned), a more complete scan of the entire wafer may be obtained.

[0060] A stacked defect map is created based on the defect detection results for each of the plurality of scanned wafers (step 404). Step 404 can be performed by, for example, CGI machine learning model 302 running on controller 109. The stacked defect map (e.g., stacked defect map 306) contains a cumulative defect map across all scanned wafers.

[0061] A defect probability map is created based on the stacked defect map (step 406). Step 406 can be performed by, for example, CGI machine learning model 302 running on controller 109. The defect probability map (e.g., defect probability map 308) indicates a probability of a defect on each region of the wafer. In some embodiments, if the defect probability map is displayed, it may be shown as a heat map with different colors or shading representing different levels of defects in a given region of the wafer. It is noted that other formats for the defect probability map are possible, including formats that are displayed to a user and formats that are not displayed to a user.

[0062] The defect probability map (e.g., defect probability map 308) along with wafer characteristic data, such as scanner data, metrology data, and process data, are provided as inputs to update the CGI machine learning model (step 408). The CGI machine learning model (e.g., CGI machine learning model 302) may use these inputs to update the CGI machine learning model (e.g., updated CGI machine learning model 310). By including a higher number of detected defect data points in the CGI machine learning model, the accuracy of defect location predictions made by the CGI machine learning model may be improved, as compared to conventional methods.

[0063] The CGI machine learning model is used to predict defects on a next (N+l) wafer to be scanned (step 410). The CGI machine learning model (e.g., CGI machine learning model 302) may be used by a CGI guided inspection tool to determine wafer locations to be inspected for defects.

[0064] The defect probability map is updated based on the results of the defect detection performed on the N+l wafer (step 412). In some embodiments, the defect detection on the N+l wafer may be performed by a CGI guided inspection tool, a non-CGI guided inspection tool, or a combination of wafer scanning tools. The defects detected on the N+l wafer (e.g., wafer 314) may be combined with the previously detected defects on the 1-N wafers, updating the stacked defect map (e.g., stacked defect map 306), updating the defect probability map (e.g., defect probability map 308), and then fed back into the updated CGI machine learning model (e.g., updated CGI machine learning model 310). This feedback loop further trains the CGI machine learning model for the next wafer to be scanned. [0065] In some embodiments, the initial defect probability map used by the CGI machine learning model may be generated with different tools, such as a process window metrology (PWM) tool. A process window is a domain (e.g., a space) of values of processing parameters under which a pattern will be produced on a wafer within specification. In a lithography process, the process window of a pattern is based on the specifications of the pattern and the lithography process used to create the pattern. The process window includes regions in a two-dimensional focus exposure matrix (FEM) plot. In the FEM plot, “F” is a focus value and “E” is an exposure dose. A process window may be defined as an area of a focus exposure plane in which the critical dimension (CD) is patterned within acceptable tolerances of a target size.

[0066] The critical dimension (CD) is a width of a feature patterned on a process layer. CD uniformity (CDU) is a measure that indicates a degree to which a lithography processing tool is capable of uniformly processing the feature having the critical dimension.

[0067] A PWM model is created with a focus exposure matrix (FEM) wafer. A FEM wafer is a wafer with a repeating pattern that is imaged onto the wafer at different focus settings and different exposure dose settings. The pattern includes several different features, and the critical dimension of the features can be measured. Measuring the critical dimension of the same feature at the same location on different wafers (with exposure at different focus settings, for example) or measuring the critical dimension of the same feature on multiple locations on the same wafer may be used to generate defect data. A defect may be determined based on any critical dimension measurement of the feature that is outside the acceptable tolerance. According to aspects, a defect can also be determined by direct defect inspection modules.

[0068] With PWM modeling applied on a critical dimension uniformity (CDU) wafer, a defect probability map may be predicted and may also be provided as training input data to the CGI machine learning model to improve model accuracy. Generating the defect probability map with the PWM tool is an alternate way to generate the initial defect probability map. The defect probability map is provided as an input to the CGI machine learning model, along with wafer characteristic data, such as scanner data, metrology data, and process data (similar to process 300 described above), to update the CGI machine learning model. According to aspects the PWM model is created with CD metrology on a FEM wafer such that resulting defects on the FEM wafers are at relevant dose/focus field/die.

[0069] FIG. 5 is a flow diagram of a process 500 for using process window metrology to create the defect probability map, consistent with embodiments of the present disclosure. Critical dimension (CD) metrology is performed on a focus exposure matrix (FEM) wafer (step 502). The FEM wafer includes a repeating pattern imaged onto the wafer at different focus settings and different exposure dose settings. The pattern includes several different features, and the critical dimension of the features can be measured. The CD metrology data from the FEM wafer is provided as an input to a process window metrology (PWM) model (step 504). Any defects in the FEM wafer may be determined based on any CD measurements of the feature outside the acceptable tolerance for the FEM wafer.

[0070] CD metrology is performed on a CD uniformity (CDU) wafer (step 506). The PWM model is applied to the CD metrology data from the CDU wafer (step 508) to predict a defect probability and to generate a defect probability map (step 510). The defect probability map is provided as an input to update a CGI model (step 512). In some embodiments, the defect probability map generated by process 500 may be provided as an input to process 300 described above to provide additional data to the CGI machine learning model.

[0071] In some embodiments, the defect probability map may be generated based on data obtained from other tools in the inspection process. Examples of such inspection tools include, but are not limited to, electron beam inspection tools, bright-field inspection tools, and dark-field inspection tools.

[0072] FIG. 6 is a flowchart of a method 600 for creating and using a defect probability map to predict wafer areas to be scanned, consistent with embodiments of the present disclosure. The steps of method 600 may be performed by a system (e.g., system 500 of FIG. 5) executing on or otherwise using the features of a computing device, e.g., controller 109 of FIG. 1. It is appreciated that the illustrated method 600 may be altered to modify the order of steps and to include additional steps. [0073] Critical dimension (CD) metrology is performed on a FEM wafer (step 602). The FEM wafer includes a repeating pattern imaged onto the wafer at different focus settings and different exposure dose settings. The pattern includes several different features, and the critical dimension of the features can be measured. The CD metrology data from the FEM wafer is provided as an input to update a PWM model (step 604). Any defects in the FEM wafer may be determined based on any CD measurements of the feature outside the acceptable tolerance for the FEM wafer. CD metrology is performed on a CD uniformity (CDU) wafer (step 606). The PWM model is applied to the CD metrology data from the CDU wafer to predict a defect probability and to generate a defect probability map (step 608).

[0074] The defect probability map (e.g., defect probability map 510) along with wafer characteristic data, such as scanner data, metrology data, and process data, are provided as inputs to update the CGI machine learning model (step 610). The CGI machine learning model may use these inputs to update the CGI machine learning model (e.g., updated CGI machine learning model 512). By including a higher number of detected defect data points in the CGI machine learning model, the accuracy of defect location predictions made by the CGI machine learning model may be improved, as compared to conventional methods. [0075] The CGI machine learning model is used to predict defects on a next (N+l) wafer to be scanned (step 612). The CGI machine learning model (e.g., CGI machine learning model 512) may be used by a CGI guided inspection tool to determine wafer locations to be inspected for defects.

[0076] The defect probability map is updated based on the results of the defect detection performed on the N+l wafer (step 614). In some embodiments, the defect detection on the N+l wafer may be performed by a CGI guided inspection tool, a non-CGI guided inspection tool, or a combination of wafer scanning tools. The defects detected on the N+l wafer may be combined with the previously detected defects on the 1-N wafers, updating the stacked defect map, updating the defect probability map, and then fed back into the updated CGI machine learning model. This feedback loop (steps 610- 614) further trains the CGI machine learning model for the next wafer to be scanned.

[0077] FIG. 7 is a flowchart of a method 700 for a wafer defect scanning process, consistent with embodiments of the present disclosure. The steps of method 700 may be performed by a system (e.g., system 300 of FIG. 3 or system 500 of FIG. 5) executing on or otherwise using the features of a computing device, e.g., controller 109 of FIG. 1. It is appreciated that the illustrated method 700 may be altered to modify the order of steps and to include additional steps.

[0078] A determination is made whether a condition is met to update the defect probability map (step 702). During the wafer scanning process (e.g., method 400 of FIG. 4 or method 600 of FIG. 6), after the defect probability map is initially generated, the same defect probability map may be re-used for a predetermined number of wafers, for a predetermined period of time, or until triggered by one of several different triggers (e.g., an issue with the CGI machine learning model, an issue with the defect probability map, or another trigger). In some embodiments, an “issue” with the CGI machine learning model or the defect probability map may result from a drift in the data, showing a deviation from the defect probability map. In some embodiments, the deviation will trigger an update if the deviation is greater than a predetermined threshold.

[0079] If the condition to update the defect probability map is not met (step 702, “No” branch), then the current defect probability map, along with current wafer characteristic data, such as current scanner data, current metrology data, and current process data, are used to update the CGI machine learning model (step 704). Even if the same defect probability map is used in the CGI machine learning model, the CGI machine learning model is updated with wafer characteristic data, such as scanner data, metrology data, and process data, for each wafer scanned. The defect probability map is one input to the CGI machine learning model; the other inputs to the CGI machine learning model (e.g., wafer characteristic data such as scanner data, metrology data, and process data) may be continuously updated for each wafer scanned, to provide feedback to the CGI machine learning model.

[0080] If the condition to update the defect probability map is met (step 702, “Yes” branch), then the defect probability map is updated (step 706). In some embodiments, the defect probability map is updated by scanning a predetermined number of wafers, updating the stacked defect map based on the defects detected by scanning the predetermined number of wafers, and then updating the defect probability map based on the updated stacked defect map (e.g., in a similar manner as steps 402-406 of method 400 shown in FIG. 4). In some embodiments, the defect probability map is updated by scanning wafers over a predetermined period of time, updating the stacked defect map based on the defects detected by scanning the wafers, and then updating the defect probability map based on the updated stacked defect map. The updating may be considered completed after the predetermined period of time has ended. The updated defect probability map, along with current wafer characteristic data, such as current scanner data, current metrology data, and current process data, are used to update the CGI machine learning model (step 708).

[0081] After the CGI machine learning model has been updated (step 704 or step 708), the CGI machine learning model is used to predict defects on a next (N+l) wafer to be scanned (step 710). The CGI machine learning model may be used by a CGI guided inspection tool to determine wafer locations to be inspected for defects.

[0082] The CGI machine learning model is updated based on the results of the defect detection performed on the N+l wafer by using the wafer characteristic data, such as the scanner data, the metrology data, and the process data, for the N+l wafer (step 712). In some embodiments, the defect detection on the N+l wafer may be performed by a CGI guided inspection tool, a non-CGI guided inspection tool, or a combination of wafer scanning tools. The method 700 then returns to step 702, as described above.

[0083] A non-transitory computer readable medium may be provided that stores instructions for a processor of a controller (e.g., controller 109 of FIG. 1) to carry out, among other things, image inspection, image acquisition, stage positioning, beam focusing, electric field adjustment, beam bending, condenser lens adjusting, activating charged-particle source, beam deflecting, process 300, method 400, process 500, method 600, and method 700. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), and Erasable Programmable Read Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same.

[0084] The embodiments may further be described using the following clauses:

1. A method of training a machine learning model for inspecting a wafer, comprising: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting a generated defect probability map for 1-N wafers into the machine learning model at a predetermined interval.

2. The method of clause 1, wherein the wafer characteristic data comprises scanner data, metrology data, and process data.

3. The method of clauses 1 or 2, wherein generating the defect probability map for the 1-N wafers comprises: generating a defect map for each of the N wafers; generating a stacked defect map for all of the N wafers by combining the defect maps for each of the N wafers; and generating a defect probability map for the 1-N wafers based on the stacked defect map.

4. The method of any one of clauses 1-3, wherein the predetermined interval is every X number of wafers, wherein X is an integer.

5. The method of any one of clauses 1-3, wherein the predetermined interval is based on a period of time.

6. The method of any one of clauses 1-5, wherein the machine learning model is a computational guided inspection model and is used by an inspection tool for inspecting a wafer.

7. The method of clause 6, wherein the inspection tool is a scanning electron microscope or an optical tool.

8. The method of any one of clauses 1-7, further comprising: training the machine learning model based on a trigger condition.

9. The method of clause 8, wherein the trigger condition is based on a second predetermined interval.

10. The method of clause 9, wherein the second predetermined interval is every Y number of wafers, wherein Y is an integer.

11. The method of clause 9, wherein the second predetermined interval is based on a period of time.

12. The method of any one of clauses 1-11, further comprising: training the machine learning model for an initial training period.

13. The method of clause 12, wherein the initial training period ends after a predetermined number of wafers have been inspected.

14. The method of clause 12, wherein training the machine learning model comprises: performing critical dimension metrology and inspection on a focus exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology on the focus exposure matrix wafer; performing critical dimension metrology on a critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict a defect probability and to generate the defect probability map. 15. The method of any one of clauses 1-14, further comprising: updating the defect probability map when an update condition is met.

16. The method of clause 15, wherein the update condition is a number of scanned wafers exceeds a first threshold.

17. The method of clause 15, wherein the update condition is a period of time since a previous defect probability map update exceeds a second threshold.

18. The method of clause 15, wherein the update condition is based on a trigger.

19. The method of clause 18, wherein the trigger is based on a deviation detected in the machine learning model and the deviation exceeds a third threshold.

20. The method of clause 18, wherein the trigger is based on a deviation detected in the defect probability map and the deviation exceeds a fourth threshold.

21. A method of using a machine learning model for inspecting a wafer, comprising: training the machine learning model, comprising: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting the generated defect probability map for 1-N wafers into the machine learning model; and using the machine learning model to guide an inspection tool to locations on a wafer to be inspected for defects.

22. The method of clause 21, wherein the wafer characteristic data comprises scanner data, metrology data, and process data.

23. The method of clauses 21 or 22, wherein the machine learning model is a computational guided inspection model and the inspection tool is a scanning electron microscope or an optical tool for inspecting a wafer.

24. The method of any one of clauses 21-23, wherein generating the defect probability map for the 1- N wafers comprises: generating a defect map for each of the N wafers; generating a stacked defect map for all of the N wafers by combining the defect maps for each of the N wafers; and generating a defect probability map for the 1-N wafers based on the stacked defect map.

25. The method of any one of clauses 21-24, further comprising: training the machine learning model based on a trigger condition.

26. The method of clause 25, wherein the trigger condition is based on a predetermined interval.

27. The method of clause 26, wherein the predetermined interval is every Y number of wafers, wherein Y is an integer. 28. The method of clause 26, wherein the predetermined interval is based on a period of time.

29. The method of any one of clauses 21-28, further comprising: training the machine learning model for an initial training period.

30. The method of clause 29, wherein the initial training period ends after a predetermined number of wafers have been inspected.

31. The method of clause 29, wherein training the machine learning model comprises: performing critical dimension metrology on a focus exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology on the focus exposure matrix wafer; performing critical dimension metrology on a critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict a defect probability and to generate the defect probability map.

32. The method of any one of clauses 21-31, further comprising: updating the defect probability map when an update condition is met.

33. The method of clause 32, wherein the update condition is a number of scanned wafers exceeds a first threshold.

34. The method of clause 32, wherein the update condition is a period of time since a previous defect probability map update exceeds a second threshold.

35. The method of clause 32, wherein the update condition is based on a trigger.

36. The method of clause 35, wherein the trigger is based on a deviation detected in the machine learning model and the deviation exceeds a third threshold.

37. The method of clause 35, wherein the trigger is based on a deviation detected in the defect probability map and the deviation exceeds a fourth threshold.

38. An apparatus for training a machine learning model for inspecting a wafer, comprising: a memory storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the apparatus to perform: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting a generated defect probability map for 1-N wafers into the machine learning model at a predetermined interval.

39. The apparatus of clause 38, wherein the wafer characteristic data comprises scanner data, metrology data, and process data. 40. The apparatus of clauses 38 or 39, wherein, in generating the defect probability map for the 1-N wafers, the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: generating a defect map for each of the N wafers; generating a stacked defect map for all of the N wafers by combining the defect maps for each of the N wafers; and generating a defect probability map for the 1-N wafers based on the stacked defect map.

41. The apparatus of any one of clauses 38^10, wherein the predetermined interval is every X number of wafers, wherein X is an integer.

42. The apparatus of any one of clauses 38^10, wherein the predetermined interval is based on a period of time.

43. The apparatus of any one of clauses 38^12, wherein the machine learning model is used by an inspection tool for inspecting a wafer.

44. The apparatus of clause 43, wherein the machine learning model is a computational guided inspection mode and the inspection tool is a scanning electron microscope or an optical tool.

45. The apparatus of any one of clauses 38^14, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: training the machine learning model based on a trigger condition.

46. The apparatus of clause 45, wherein the trigger condition is based on a second predetermined interval.

47. The apparatus of clause 46, wherein the second predetermined interval is every Y number of wafers, wherein Y is an integer.

48. The apparatus of clause 46, wherein the second predetermined interval is based on a period of time.

49. The apparatus of any one of clauses 38^18, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: training the machine learning model for an initial training period.

50. The apparatus of clause 49, wherein the initial training period ends after a predetermined number of wafers have been inspected.

51. The apparatus of clause 49, wherein, in training the machine learning model, the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: performing critical dimension metrology on a focus exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology on the focus exposure matrix wafer; performing critical dimension metrology on a critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict a defect probability and to generate the defect probability map.

52. The apparatus of any one of clauses 38-51, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: updating the defect probability map when an update condition is met.

53. The apparatus of clause 52, wherein the update condition is a number of scanned wafers exceeds a first threshold.

54. The apparatus of clause 52, wherein the update condition is a period of time since a previous defect probability map update exceeds a second threshold.

55. The apparatus of clause 52, wherein the update condition is based on a trigger.

56. The apparatus of clause 55, wherein the trigger is based on a deviation detected in the machine learning model and the deviation exceeds a third threshold.

57. The apparatus of clause 55, wherein the trigger is based on a deviation detected in the defect probability map and the deviation exceeds a fourth threshold.

58. An apparatus for using a machine learning model for inspecting a wafer, comprising: a memory storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the apparatus to perform: training the machine learning model, comprising: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting the generated defect probability map for 1-N wafers into the machine learning model; and using the machine learning model to guide an inspection tool to locations on a wafer to be inspected for defects.

59. The apparatus of clause 58, wherein the wafer characteristic data comprises scanner data, metrology data, and process data.

60. The apparatus of clauses 58 or 59, wherein the machine learning model is a computational guided inspection model and the inspection tool is a scanning electron microscope or an optical tool for inspecting a wafer.

61. The apparatus of any one of clauses 58-60, wherein, in generating the defect probability map for the 1-N wafers, the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: generating a defect map for each of the N wafers; generating a stacked defect map for all of the N wafers by combining the defect maps for each of the N wafers; and generating a defect probability map for the 1-N wafers based on the stacked defect map.

62. The apparatus of any one of clauses 58-61, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: training the machine learning model based on a trigger condition.

63. The apparatus of clause 62, wherein the trigger condition is based on a predetermined interval.

64. The apparatus of clause 63, wherein the predetermined interval is every Y number of wafers, wherein Y is an integer.

65. The apparatus of clause 63, wherein the predetermined interval is based on a period of time.

66. The apparatus of any one of clauses 58-65, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: training the machine learning model for an initial training period.

67. The apparatus of clause 66, wherein the initial training period ends after a predetermined number of wafers have been inspected.

68. The apparatus of clause 66, wherein, in training the machine learning model, the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: performing critical dimension metrology on a focus exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology on the focus exposure matrix wafer; performing critical dimension metrology on a critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict a defect probability and to generate the defect probability map.

69. The apparatus of any one of clauses 58-68, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: updating the defect probability map when an update condition is met.

70. The apparatus of clause 69, wherein the update condition is a number of scanned wafers exceeds a first threshold.

71. The apparatus of clause 69, wherein the update condition is a period of time since a previous defect probability map update exceeds a second threshold.

72. The apparatus of clause 69, wherein the update condition is based on a trigger.

73. The apparatus of clause 72, wherein the trigger is based on a deviation detected in the machine learning model and the deviation exceeds a third threshold.

74. The apparatus of clause 72, wherein the trigger is based on a deviation detected in the defect probability map and the deviation exceeds a fourth threshold. 75. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method for training a machine learning model for inspecting a wafer, the method comprising: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting a generated defect probability map for 1-N wafers into the machine learning model at a predetermined interval.

76. The non-transitory computer readable medium of clause 75, wherein the wafer characteristic data comprises scanner data, metrology data, and process data.

77. The non-transitory computer readable medium of clauses 75 or 76, wherein, in generating the defect probability map for the 1-N wafers, the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: generating a defect map for each of the N wafers; generating a stacked defect map for all of the N wafers by combining the defect maps for each of the N wafers; and generating a defect probability map for the 1-N wafers based on the stacked defect map.

78. The non-transitory computer readable medium of any one of clauses 75-77, wherein the predetermined interval is every X number of wafers, wherein X is an integer.

79. The non-transitory computer readable medium of any one of clauses 75-77, wherein the predetermined interval is based on a period of time.

80. The non-transitory computer readable medium of any one of clauses 75-79, wherein the machine learning model is a computational guided inspection model and is used by an inspection tool for inspecting a wafer.

81. The non-transitory computer readable medium of clause 80, wherein the inspection tool is a scanning electron microscope or an optical tool.

82. The non-transitory computer readable medium of any one of clauses 75-81, wherein the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: training the machine learning model based on a trigger condition.

83. The non-transitory computer readable medium of clause 82, wherein the trigger condition is based on a second predetermined interval.

84. The non-transitory computer readable medium of clause 83, wherein the second predetermined interval is every Y number of wafers, wherein Y is an integer.

85. The non-transitory computer readable medium of clause 83, wherein the second predetermined interval is based on a period of time. 86. The non-transitory computer readable medium of any one of clauses 75-85, wherein the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: training the machine learning model for an initial training period.

87. The non-transitory computer readable medium of clause 86, wherein the initial training period ends after a predetermined number of wafers have been inspected.

88. The non-transitory computer readable medium of clause 86, wherein, in training the machine learning model, the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: performing critical dimension metrology on a focus exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology on the focus exposure matrix wafer; performing critical dimension metrology on a critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict a defect probability and to generate the defect probability map.

89. The non-transitory computer readable medium of any one of clauses 75-88, wherein the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: updating the defect probability map when an update condition is met.

90. The non-transitory computer readable medium of clause 89, wherein the update condition is a number of scanned wafers exceeds a first threshold.

91. The non-transitory computer readable medium of clause 89, wherein the update condition is a period of time since a previous defect probability map update exceeds a second threshold.

92. The non-transitory computer readable medium of clause 89, wherein the update condition is based on a trigger.

93. The non-transitory computer readable medium of clause 92, wherein the trigger is based on a deviation detected in the machine learning model and the deviation exceeds a third threshold.

94. The non-transitory computer readable medium of clause 92, wherein the trigger is based on a deviation detected in the defect probability map and the deviation exceeds a fourth threshold.

95. A non-transitory computer readable medium that stores a set of instructions that is executable by at least one processor of a computing device to cause the computing device to perform a method for using a machine learning model for inspecting a wafer, the method comprising: training the machine learning model, comprising: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting the generated defect probability map for 1-N wafers into the machine learning model; and using the machine learning model to guide an inspection tool to locations on a wafer to be inspected for defects.

96. The non-transitory computer readable medium of clause 95, wherein the wafer characteristic data comprises scanner data, metrology data, and process data.

97. The non-transitory computer readable medium of clauses 95 or 96, wherein the machine learning model is a computational guided inspection model and the inspection tool is a scanning electron microscope or an optical tool for inspecting a wafer.

98. The non-transitory computer readable medium of any one of clauses 95-97, wherein, in generating the defect probability map for the 1-N wafers, the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: generating a defect map for each of the N wafers; generating a stacked defect map for all of the N wafers by combining the defect maps for each of the N wafers; and generating a defect probability map for the 1-N wafers based on the stacked defect map.

99. The non-transitory computer readable medium of any one of clauses 95-98, wherein the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: training the machine learning model based on a trigger condition.

100. The non-transitory computer readable medium of clause 99, wherein the trigger condition is based on a predetermined interval.

101. The non-transitory computer readable medium of clause 100, wherein the predetermined interval is every Y number of wafers, wherein Y is an integer.

102. The non-transitory computer readable medium of clause 100, wherein the predetermined interval is based on a period of time.

103. The non-transitory computer readable medium of any one of clauses 95-102, wherein the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: training the machine learning model for an initial training period.

104. The non-transitory computer readable medium of clause 103, wherein the initial training period ends after a predetermined number of wafers have been inspected.

105. The non-transitory computer readable medium of clause 103, wherein, in training the machine learning model, the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: performing critical dimension metrology on a focus exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology on the focus exposure matrix wafer; performing critical dimension metrology on a critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict a defect probability and to generate the defect probability map.

106. The non-transitory computer readable medium of any one of clauses 95-105, wherein the set of instructions that is executable by one or more processors of the computing device to cause the computing device to further perform: updating the defect probability map when an update condition is met.

107. The non-transitory computer readable medium of clause 106, wherein the update condition is a number of scanned wafers exceeds a first threshold.

108. The non-transitory computer readable medium of clause 106, wherein the update condition is a period of time since a previous defect probability map update exceeds a second threshold.

109. The non-transitory computer readable medium of clause 106, wherein the update condition is based on a trigger.

110. The non-transitory computer readable medium of clause 109, wherein the trigger is based on a deviation detected in the machine learning model and the deviation exceeds a third threshold.

111. The non-transitory computer readable medium of clause 109, wherein the trigger is based on a deviation detected in the defect probability map and the deviation exceeds a fourth threshold.

[0085] Block diagrams in the figures may illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer hardware or software products according to various exemplary embodiments of the present disclosure. In this regard, each block in a schematic diagram may represent certain arithmetical or logical operation processing that may be implemented using hardware such as an electronic circuit. Blocks may also represent a module, segment, or portion of code that comprises one or more executable instructions for implementing the specified logical functions. It should be understood that in some alternative implementations, functions indicated in a block may occur out of the order noted in the figures. For example, two blocks shown in succession may be executed or implemented substantially concurrently, or two blocks may sometimes be executed in reverse order, depending upon the functionality involved. Some blocks may also be omitted. It should also be understood that each block of the block diagrams, and combination of the blocks, may be implemented by special purpose hardware -based systems that perform the specified functions or acts, or by combinations of special purpose hardware and computer instructions.

[0086] It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings, and that various modifications and changes may be made without departing from the scope thereof. The present disclosure has been described in connection with various embodiments, and other embodiments will be apparent to those skilled in the art from consideration of the specification and practice of the technology disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

Claims

1. An apparatus for training a machine learning model for inspecting a wafer, comprising: a memory storing a set of instructions; and at least one processor configured to execute the set of instructions to cause the apparatus to perform: inputting wafer characteristic data into the machine learning model for an Nth wafer, wherein N is an integer; generating a defect probability map based on the input data for the Nth wafer; and inputting wafer characteristic data into the machine learning model for an N+lth wafer and inputting a generated defect probability map for 1-N wafers into the machine learning model at a predetermined interval.

2. The apparatus of claim 1, wherein the wafer characteristic data comprises scanner data, metrology data, and process data.

3. The apparatus of claim 1, wherein, in generating the defect probability map for the 1-N wafers, the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: generating a defect map for each of the N wafers; generating a stacked defect map for all of the N wafers by combining the defect maps for each of the N wafers; and generating a defect probability map for the 1-N wafers based on the stacked defect map.

4. The apparatus of claim 1, wherein the predetermined interval is every X number of wafers, wherein X is an integer.

5. The apparatus of claim 1, wherein the predetermined interval is based on a period of time.

6. The apparatus of claim 1, wherein the machine learning model is a computational guided inspection model and is used by an inspection tool for inspecting a wafer.

7. The apparatus of claim 6, wherein the inspection tool is a scanning electron microscope or an optical tool.

8. The apparatus of claim 1, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: training the machine learning model based on a trigger condition.

9. The apparatus of claim 8, wherein the trigger condition is based on a second predetermined interval.

10. The apparatus of claim 9, wherein the second predetermined interval is every Y number of wafers, wherein Y is an integer.

11. The apparatus of claim 9, wherein the second predetermined interval is based on a period of time.

12. The apparatus of claim 1, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: training the machine learning model for an initial training period.

13. The apparatus of claim 12, wherein the initial training period ends after a predetermined number of wafers have been inspected.

14. The apparatus of claim 12, wherein, in training the machine learning model, the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: performing critical dimension metrology on a focus exposure matrix wafer; updating a process window metrology model with data from the critical dimension metrology on the focus exposure matrix wafer; performing critical dimension metrology on a critical dimension uniformity wafer; and applying the process window metrology model to the critical dimension metrology data from the critical dimension uniformity wafer to predict a defect probability and to generate the defect probability map.

15. The apparatus of claim 1, wherein the at least one processor is configured to execute the set of instructions to cause the apparatus to further perform: updating the defect probability map when an update condition is met.