EP4569448A1

EP4569448A1 - Scalable architectures for control of quantum devices within cold environments

Info

Publication number: EP4569448A1
Application number: EP23793130.8A
Authority: EP
Inventors: Jeremy Patterson Hilton; George Earl Grant STERLING; Ofer Naaman
Original assignee: Google LLC
Current assignee: Google LLC
Priority date: 2022-09-22
Filing date: 2023-09-21
Publication date: 2025-06-18
Also published as: CN119948498A; AU2023347492A1; WO2024064283A1; CA3267725A1; KR20250070075A

Abstract

The disclosure is directed to a quantum processor system. The system includes a qubit structure, a control line, and a cavity filter. The control line is configured to transmit a control signal to and from the qubit structure. The cavity filter is configured to filter the control signal transmitted by the control line. The cavity filter includes a waveguide that comprises a cavity and a material disposed within the cavity. The material has an index of refraction greater than 1.0. The material may be a dielectric material (e.g., a dielectric), a metallic material (e.g., a conductive or magnetic material), or a combination thereof. The cavity filter includes a resonator structure that is encapsulated in the material and has a floating ground connection. The cavity filter includes a central conductor that transmits low frequency signals, while the waveguide transmits high frequency signals.

Description

SCALABLE ARCHITECTURES FOR CONTROL OF QUANTUM DEVICES WITHIN COLD ENVIRONMENTS

PRIORITY CLAIM

[1] The present application claims the benefit of priority of U.S. Application Serial No. 17/950,807, filed on September 22, 2022, titled SCALABLE ARCHITECTURES FOR CONTROL OF QUANTUM DEVICES WITHIN COLD ENVIRONMENTS, which is incorporated herein by reference.

FIELD

[2] The present disclosure relates generally to quantum computing and information processing systems, and more particularly to scalable architectures for quantum devices within cold environments.

BACKGROUND

[3] Quantum computing is a computing method that takes advantage of quantum effects, such as superposition of basis states and entanglement to perform certain computations more efficiently than a classical digital computer. In contrast to a digital computer, which stores and manipulates information in the form of bits, e.g., a “1” or “0,” quantum computing systems can manipulate information using quantum bits (“qubits”). A qubit can refer to a quantum device that enables the superposition of multiple states, e.g., data in both the “0” and “1” state, and/or to the superposition of data, itself, in the multiple states. In accordance with conventional terminology, the superposition of a “0” and “1” state in a quantum system may be represented, e.g., as a |0) + b 11) The “0” and “1” states of a digital computer are analogous to the |0) and 11) basis states, respectively of a qubit.

SUMMARY

[4] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the following description, or can be learned from the description, or can be learned through practice of the embodiments.

[5] One example aspect of the present disclosure is directed to a quantum computing system (QCS). The QCS may include a first cryogenic chamber, a first quantum device, a second quantum device, and the first control logic device. Each of the first quantum device, the second quantum device, and the first control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more programming signals, the first control logic device may be configured to provide a first control signal to the first quantum device and to provide a second control signal to the second quantum device. In some embodiments, the QCS may also include a first control line. The first control line may originate from outside the first cryogenic chamber and terminate at the first control logic device. The first control line is configured to transmit the one or more programming signals from outside the first cryogenic chamber.

[6] In various embodiments, the QCS may further include a third quantum device, a fourth quantum device, and a second control logic device. Each of the second quantum device, the third quantum device, and the second control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more additional programming signals, the second control logic device may be configured to provide a third control signal to the third quantum device and to provide a fourth control signal to the fourth quantum device. In some embodiments, the QCS may also include a second control line. The second control line may originate from outside the first cryogenic chamber and terminate at the second control logic device. The second control line is configured to transmit the one or more additional programming signals from outside the first cryogenic chamber.

[7] Other aspects of the present disclosure are directed to various systems, methods, apparatuses, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[8] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate example embodiments of the present disclosure and, together with the description, explain the related principles.

BRIEF DESCRIPTION OF THE DRAWINGS

[9] Detailed discussion of embodiments directed to one of ordinary skill in the art is set forth in the specification, which refers to the appended figures, in which:

[10] FIG. 1 depicts an example quantum computing system according to example embodiments of the present disclosure.

[11] FIG. 2 depicts an example environment that various embodiments may be practiced in.

[12] FIG. 3 A depicts an example DC control logic device that is consistent with the various embodiments. [13] FIG. 3B depicts an example digital -to-analog device array that is consistent with the various embodiments.

DETAILED DESCRIPTION

[14] The embodiments are directed towards scalable architectures for the control of devices that are positioned within an isolated environment (e.g., a first environment that is isolated from a second environment by a chamber or another closed vessel positioned within the second environment), via control signals. Although the devices may be positioned within the isolated environment, the generation of such control signals may be controlled and/or operated from outside the isolated environment. Such devices include, but are not limited to quantum devices (e.g., qubits, qubit couplers, quantum-logic gates, and the like). The isolated environment may be, but is not limited to, a thermally insulated environment. For instance, the isolated environment may be a cryogenic environment. A chamber and/or vessel that isolates (and insulates) the cryogenic environment may be a cryogenic chamber and/or cryogenic vessel. Thus, the devices may be quantum devices that are positioned within a cry ogenic system. The generation of the control signals may be controlled from outside the cryogenic system (e.g., a room-temperature (RT) environment). The cry ogenic environment may be an ultra-cold (e.g., on the order of millikelvins (mK)) environment. Thus, the embodiments may be employed in quantum computing and information processing systems, where the quantum devices are located within a cryogenic environment (e.g., an ultra-cold environment). In the embodiments, a significant reduction in the number of signal transmission lines (e.g., control lines) that are required to run from the RT environment and into the cryogenic ultra-cold environment is achieved.

[15] Such a reduction in the required number of control lines is achieved by positioning one or more multiplexed logic devices within the ultra-cold environment. Such multiplexed logic devices may receive an input signal originating from the RT environment. Based on the input signal, a single multiplexed logic device may provide control signals to multiple quantum devices within the ultra-cold environment via the logic device’s output lines. A multiplexed logic device may receive its input signals via K input lines, yvhere K is a positive integer. Based on the signals encoded K input signals, the multiplexed logic device may provide control signals to L quantum devices via its output lines, where L is positive integer. To control the L quantum devices, K control lines are run from the RT environment to the ultra-cold environment. The K control lines transmit the input signal from the RT environment to the multiplexed logic device. When the ratio - > 1, a reduction in the number of control lines that are run from the RT environment and into the cryogenic ultracold environment is achieved. In some embodiments, - K » 1. leading to a significant reduction in the required number of control lines. In at least one embodiment, the multiplexed control logic device may be a digital-to-analog (DAC) device. The DAC device may be implemented via multiple loops pairing a large inductance with a Josephson junction.

[16] In conventional quantum computing systems (QCSs), one or more control lines may be dedicated to each quantum device within a cryogenic chamber. As used here, a dedicated control line may be a pathway that enables the transmission of a control signal from outside the cryogenic environment to a single (and corresponding) quantum device within the cryogenic environment. Each of the dedicated control lines are conventionally run from outside the cryogenic environment, through one or more cry ogenic chambers, and terminate at a corresponding quantum device within the cryogenic environment. Conventionally, a control signal may be generated from outside the cryogenic chamber and is transmitted through the chamber and to the quantum device, via one or more control lines dedicated to the device. Thus, in a conventional QCS, there may be a one-to- one correspondence between signal-transmitting pathways outside of a cryogenic environment and signal-transmitting pathways inside the cry ogenic environment.

[17] As the number of quantum devices within a cryogenic chamber grows (e.g., increasing the number of qubits and quantum gates in a QCS), the difficulty of passing dedicated control lines, for each quantum device, from outside the cryogenic environment to the inside of the environment significantly increases. This increasing difficulty⁷ is a consequence, of at least, the physical space and heat-transfer constraints required to pass electrical power from outside the chamber to the inside of the chamber. The increasing difficulty is rendered even more significant because for ultra-cold temperatures (as the quantum devices may require), a single conventional dedicated control line may be required to pass through a series of nested cryogenic chambers to terminate at the “innermost” ultra-cold chamber. Rather than having one or more dedicated control lines that pass through one or more cryogenic chambers for each quantum device, as conventional QCS may do, the embodiments employ one or more multiplexed logic devices positioned within the innermost ultra-cold chamber as discussed above. The multiplexed logic devices may be constructed such that - » 1, achieving a significant reduction in the required number of control lines running from outside the cryogenic environment and into the ultra-cold chamber.

[18] More specifically, a quantum processor device within an ultra-cold environment may include a set of quantum devices. The set of quantum devices may include a set of qubits, a set of qubit couplers, and/or a set of quantum logic gates (e.g., a set of Z-gates). Each qubit of the set of qubits may be controlled via one or more control signals within the microwave-frequency band (e.g., a microwave control signal) and one or more DC control signals. That is, the control and/or operation of a qubit requires at least one DC control signal and at least one microware control signal. In contrast, the control and/or operation of a quantum coupler may require one or more DC control signals but may not require a microwave control signal.

[19] Conventional QCSs may include both the microwave control logic (e.g., the generation and shaping of the microw ave control signals for the qubits) and DC control logic (e.g., the generation and shaping of the DC control signals for the qubit couplers and the qubits). Such conventional approaches require running at least one dedicated DC control line from a RT environment to the ultra-cold environment for each qubit coupler and for each qubit. In contrast, via locating a multiplexed control logic device within the ultra-cold environment, the various embodiments position at least a portion of the DC control logic (e.g., for the control of the qubits and the quantum couplers) within the ultra-cold environment. That is, at least a portion of the DC control logic for the qubit couplers and qubits is co-located with the quantum processor device within the ultra-cold environment. Co-locating a portion of the DC control logic with the quantum processor device (e.g., within the ultra-cold environment) provides a significant reduction in the number of DC control lines that are required to run from the RT environment to the ultra-cold environment.

[20] The portion of the DC control logic for the quantum couplers may be implemented by a multiplexed control logic device, positioned within the ultra-cold environment, as discussed above. Thus, the multiplexed control logic device may be a DC control logic device, or simply a DC logic device. The DC logic device may include one or more multiplexing logic devices and/or one or more demultiplexing logic devices. As used herein, the term “multiplexing” logic device (e.g., a mux) may refer to a logic device that is a “many-to-one” device and/or a “fan-in” device. A multiplexer logic device enables several input signals to be inputted to a single other device and/or signal line. For example, a multiplexing logic device may be a “data selector” device that maytransmit a single output signal based on a selection of at least one of multiple input signals or lines. The term “demultiplexing” logic device may be a “one-to-many” device and/or a “fan-out” logic device that inverts the multiplexing logic of a multiplexer logic device. A demultiplexing logic device (e.g., a demux) is a device that takes a single input signal and provides an output signal to at least one of multiple output lines based on the input signal and a selection to the at least one of the multiple output lines. The “many-to-one” selection of a multiplexer logic device and/or the “one- to-many” selection of a demultiplexer logic device may⁷ be based on a separate input signal (e.g., the selection signal) received via a separate input line (e.g., a selection line). The “many” of each of the “many-to-one” and the “one-to-many” terminologies may refer to a positive integer greater than 1 : K = 2ⁿ > 1. where n is a positive integer. Thus, the selection input line may be enabled to transmit a selection of input signals that encode n classical bits of information. [21] In the embodiments, a control line may originate from outside a cryogenic environment and terminate at a demultiplexer device within the cryogenic environment. The demultiplexer device may have N output lines. The control line may pass through one or more chamber walls that separate the outside of the cryogenic environment from the inside of the cryogenic environment. The control line may provide separate control signals for up to K quantum devices via the demultiplexer device, as discussed below. As such, a single control line passing through the one or more chamber walls may provide the control signals for at least A separate quantum devices. The demultiplexer device may receive a control signal as an input. Each output line of the demultiplexer device may serve as an input line for a separate quantum device within the cryogenic environment. Thus, a reduction of - of the number of control lines that must pass through one or more nested cry ogenic chambers is achieved via the embodiments.

[22] In at least one embodiment, bidirectional communication between outside the cryogenic environment and the quantum devices within the cryogenic environment may be achieved via a combination of demultiplexing devices and multiplexing devices. For example, multiple qubit devices may each provide one or more input signals to a multiplexing device within the cryogenic environment. The one or more input signals may be communicated to outside the cryogenic environment via a single output of the multiplexing device that passes through the cryogenic chamber.

[23] The DC logic device may be enabled to receive a signal (e.g., a digital signal) originating from outside the cryogenic environment and delivered via a control line. In response to receiving the input signal, the control logic device may generate and/or route one or more DC control signals. The DC control signals may be provided to one or more quantum devices within the cryogenic environment directly from the DC logic device or via one or more multiplexing or demultiplexing devices included in the DC logic device.

[24] In some embodiments, the DC logic device positioned within the cryogenic chamber may be a programmable DC logic device. The programmable DC logic device may receive one or more “programming” signals through a transmission line passing through the one or more chamber walls (e.g., the control line discussed above). The programmable DC logic device may be programmed (e.g., configured via the programming signal provided by the single control line) to generate and provide various DC control signals that are to be provided to the quantum devices. An output of the programmable DC logic device, which generates and outputs the various “programmed” DC control signals, may serve as the input to a demultiplexing device embedded in the DC logic device. In at least one embodiment, the programmable DC logic device may be programmed to generate respective selection input signals for the demultiplexing device. A separate output of the programmable DC logic device may provide the generated selection input signal to the demultiplexing device. In at least one embodiment, the programmable DC logic device and the demultiplexing device may be integrated into a single programmable multiplexed control logic device. In at least one embodiment, the programmable control logic device may be programmed to read out multiple quantum devices and communicate one or more quantum device signals to outside the cryogenic environment, via the multiplexing device. A multiplexing device, a demultiplexing device, and the programmable DC control logic device may be integrated into a single programmable multiplexed control logic device. In at least one embodiment, the control logic device may be a digital-to-analog converter (DAC) device implemented as multiple loops pairing a large inductance with a Josephson junction.

[25] Aspects of the present disclosure provide a number of technical effects and benefits. For instance, the architectures significantly decrease a number of control lines that needs to be run from a RT environment to an ultra-cold environment. The DC control logic device located within the ultra-cold environment is enabled to deliver DC pulses of sufficient fidelity to control the qubits and the quantum logic gates. Furthermore, the ultra-cold DC control logic device is enabled to power and control the qubits and quantum logic gates with sufficiently low power dissipation. The DC control logic device is further enabled to individually address each of its respective qubits and quantum gates.

[26] FIG. 1 depicts an example quantum computing system 100. The quantum computing system 1 0 is an example of a system of one or more classical computers and/or quantum computing devices in one or more locations, in which the systems, components, and techniques described below can be implemented. Those of ordinary' skill in the art, using the disclosures provided herein, will understand that other quantum computing devices or systems can be used without deviating from the scope of the present disclosure.

[27] The quantum computing system 100 includes quantum hardware 102 in data communication with one or more classical processors 104. The classical processors 104 can be configured to execute computer-readable instructions stored in one or more memory devices to perform operations, such as any of the operations described herein. The quantum hardware 102 includes components for performing quantum computation. For example, the quantum hardware 102 includes a quantum system 110, control device(s) 112, and readout device(s) 114 (e.g., readout resonator(s)). The quantum system 110 can include one or more multi-level quantum subsystems, such as a register of qubits (e.g.. qubits 120). In some implementations, the mullti-level quantum subsystems can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, spin-based qubits, and the like.

[28] The type of multi-level quantum subsystems that the quantum computing system 100 utilizes may vary. For example, in some cases it may be convenient to include one or more readout device(s) 114 attached to one or more superconducting qubits, e.g., transmon, flux, gmon, xmon, or other qubits. In other cases, ion traps, photonic devices or superconducting cavities (e.g., with which states may be prepared without requiring qubits) may be used. Further examples of realizations of multi-level quantum subsystems include fluxmon qubits, silicon quantum dots or phosphorus impurity qubits.

[29] Quantum circuits may be constructed and applied to the register of qubits included in the quantum system 110 via multiple control lines that are coupled to one or more control devices 112. Example control devices 1 12 that operate on the register of qubits can be used to implement quantum gates or quantum circuits having a plurality of quantum gates, e.g., Pauli gates, Hadamard gates, controlled-NOT (CNOT) gates, controlled-phase gates, T gates, multi-qubit quantum gates, coupler quantum gates, etc. The one or more control devices 112 may be configured to operate on the quantum system 110 through one or more respective control parameters (e g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystems may be superconducting qubits and the control devices 112 may be configured to provide control pulses to control lines to generate magnetic fields to adjust the frequency of the qubits.

[30] The quantum hardware 102 may further include readout devices 114 (e.g., readout resonators). Measurement results 108 obtained via measurement devices may be provided to the classical processors 104 for processing and analyzing. In some implementations, the quantum hardware 102 may include a quantum circuit and the control device(s) 112 and readout devices(s) 114 may implement one or more quantum logic gates that operate on the quantum computing system 100 through physical control parameters (e.g., microwave pulses) that are sent through wires included in the quantum hardware 102. Further examples of control devices include arbitrary waveform generators, wherein a DAC (digital to analog converter) creates the signal.

[31] The readout device(s) 114 may be configured to perform quantum measurements on the quantum system 110 and send measurement results 108 to the classical processors 104. In addition, the quantum hardware 102 may be configured to receive data specify ing physical control qubit parameter values 106 from the classical processors 104. The quantum hardware 102 may use the received physical control qubit parameter values 106 to update the action of the control device(s) 1 12 and readout devices(s) 114 on the quantum system 110. For example, the quantum hardware 102 may receive data specifying new values representing voltage strengths of one or more DACs included in the control devices 112 and may update the action of the DACs on the quantum system 110 accordingly. The classical processors 104 may be configured to initialize the quantum system 110 in an initial quantum state, e.g., by sending data to the quantum hardware 102 specifying an initial set of physical control qubit parameters 106.

[32] In some implementations, the readout device(s) 114 can take advantage of a difference in the impedance for the |0) and 11) states of an element of the quantum system, such as a qubit, to measure the state of the element (e.g., the qubit). For example, the resonance frequency of a readout resonator can take on different values when a qubit is in the state |0) or the state 11), due to the nonlinearity of the qubit. Therefore, a microwave pulse reflected from the readout device 114 carries an amplitude and phase shift that depend on the qubit state. In some implementations, a Purcell filter can be used in conjunction with the readout device(s) 114 to impede microwave propagation at the qubit frequency.

[33] In some embodiments, the quantum system 110 can include a plurality of qubits 120 arranged, for instance, in a two-dimensional grid 122. For clarity, the two-dimensional grid 122 depicted in FIG. 1A includes 4x4 qubits, however in some implementations the quantum system 110 may include a smaller or a larger number of qubits. In some embodiments, the multiple qubits 120 can interact with each other through multiple qubit couplers, e.g., qubit coupler 124. The qubit couplers can define nearest neighbor interactions between the multiple qubits 120. In some implementations, the strengths of the multiple qubit couplers are tunable parameters. In some cases, the multiple qubit couplers included in the quantum computing system 100 may be couplers w ith a fixed coupling strength.

[34] In some implementations, the multiple qubits 120 may include data qubits, such as qubit 126 and measurement qubits, such as qubit 128. A data qubit is a qubit that participates in a computation being performed by the quantum computing system 100. A measurement qubit is a qubit that may be used to determine an outcome of a computation performed by the data qubit. That is, during a computation an unknown state of the data qubit is transferred to the measurement qubit using a suitable physical operation and measured via a suitable measurement operation performed on the measurement qubit.

[35] In some implementations, each qubit in the multiple qubits 120 can be operated using respective operating frequencies, such as an idling frequency and/or an interaction frequency and/or readout frequency and/or reset frequency. The operating frequencies can vary from qubit to qubit. For instance, each qubit may idle at a different operating frequency. The operating frequencies for the qubits 120 can be chosen before a computation is performed. [36] FIG. 1 depicts one example quantum computing system that can be used to implement the methods and operations according to example aspects of the present disclosure. Other quantum computing systems can be used without deviating from the scope of the present disclosure.

[37] FIG. 2 depicts an example environment 200 that various embodiments may be practiced in. Environment 200 may be a room temperature (RT) environment 200. RT environment 200 may house or include a quantum computing and/or quantum information processing system (e.g., a QCS). The QCS may include a cryogenic system. The cryogenic system may include a cold temperature chamber 210 that achieves temperatures approximately of 4 kelvins (K). Nested within the cold temperature chamber may be an ultra-cold chamber 220. The ultra-cold chamber 220 may achieve temperatures on the order of millikelvins (mK). The ultracold chamber 220 may house a quantum processor device 240. The quantum processor device 240 may include a set of quantum devices 250. The set of quantum devices 250 may include a set of quantum logic gates 260 and a set of qubits 290. The set of quantum logic gates 260 may include a set of qubit couplers 270 and a set of Z-gates 280. In addition to the quantum processor device 240, the ultra-cold chamber 220 may house one or more DC control logic devices (e.g., DC control logic device 230).

[38] In quantum computing and quantum information processing systems (e.g., the QCS housed by the RT environment 200), qubits (e.g., qubits included in the set of qubits 290) are the fundamental information-encoding mechanism. Quantum-logic gates (e.g., quantum logic gates included in the set of quantum logic gates 260) are the fundamental logic mechanism that is employed to manipulate and/or process the information encoded by the qubits. Qubits encode quantum-information via the amplitudes and relative phases that characterize the quantum states (e.g.. states of superposition and/or entanglement) of the qubits. Quantum-logic gates process quantum-information by performing unitary operations (e.g., transformations) on the quantum states of the qubits. Such unitary operations process quantum-information by deterministically transforming the quantum states (e.g., transforming the amplitudes and relative phases) of the corresponding qubits. Thus, the operations and/or transformations deterministically manipulate the information encoded by the qubits. The quantum-logic operations performed by at least some quantum-logic gates may be somewhat analogous to classical logic operations (e.g., XOR, AND, NOT, and the like). For instance, an X-gate is a single qubit quantum-logic gate that is somewhat analogous to the classical NOT operation. Other quantum-logic gates have no analog classical logic operation. For example, a Z-gate (e.g., a Z-gate included in the set of Z-gates 280) is a single qubit quantum-logic gate that rotates the quantum state of the qubit around the z-axis of its Bloch sphere representation by n radians. Another quantum-logic gate that has no classical logic analog is a Hadamard gate, which transforms a "pure" quantum state into a "superposition" quantum state. Some quantum-logic gates are physically implemented by one or more qubit couplers (e.g., a qubit coupler included in the set of qubit couplers 270). Such coupler-based quantum-logic gates may be employed to generate an “entanglement” of two or more qubits.

[39] The unitary constraint on the transformations performed by the quantum-logic gates ensures that the transformations are invertible, and thus conserving the quantum-information during a computation, at least until the corresponding qubit is “read” or becomes decohered. Even though the quantum-information is conserved via the unitary⁷ transformations, when a qubit is in a superposition of its eigenstates, the amplitudes and relative phases may not be readily observable. However, an application of specific configurations of quantum-logic gates may⁷ enable the extraction of information that is correlated with the manipulated quantum states of the qubits. Both qubits and quantum-logic gates (including couplers) may be considered as variants of a quantum device, e g., a quantum device included in the set of quantum devices 250.

[40] To successfully control and operate a quantum device, each quantum device requires at least one control line that is configured to transmit an electrical signal. Via a control line, the quantum device is communicatively⁷ coupled to other components of a quantum computing system. Depending on the nature of the quantum device, some quantum devices may require more than one control line. The quantum computing system may operate and/or control a quantum device via the transmission of one or more control signals to the quantum device, along the device’s one or more control lines.

[41] Without precise control of their environments, qubits tend to become decohered. A decohered qubit may be unable to sustain a state of superposition and/or entanglement. A decohered qubit is unable to encode quantum-information and to quantum-mechanically “interfere” with other qubits. At most, a decohered qubit may act as a classical bit. Thus, once decohere, qubits have lost their “quantum supremacy” over classical computing bits. Fluctuations resulting from thermal energy is one mechanism that may lead to qubit decoherence. As such, many quantum computing systems isolate their qubit devices from the universe via one or more cryogenic systems. To enable coherence times that are commensurate with timespans sufficient for non-trivial quantum computations, temperatures on the order of millikelvins (mK) may be required. As such, the cry ogenic system may be a multi-stage system, e.g., a system that achieves multiple (thermally isolated) environments with decreasing temperatures. The multi-stage cryogenic systems may include at least two stages. A first stage may achieve temperatures on the order of 4 kelvins (K), while the second stage achieves temperatures in the mK range. In the embodiments, the first stage (e.g., a 4K stage) is commensurate with a low temperature (LT) environment, and the second stage (e.g.. a mK stage) is commensurate with a ultra-low temperature (uLT) environment. The cold temperature chamber 210 may enable the 4K stage, while the ultracold chamber 220 may enable the mK stage.

[42] To operate each quantum device of the set of quantum devices 250 may require at least one DC control signal being delivered to the quantum device. In addition to DC control signals, the operation of each qubit of the set of qubits 290 may require a microwave control signal. A microwave signal generator 204 located in the room temperature environment 200 may generate the micro wave control signals. A set of microwave control lines 214 may run from the room temperature environment 200 and through the cold temperature chamber 210 and the ultra-cold chamber 220, and to the set of quantum devices 250. The set of microwave control lines 214 may be configured transmit the microwave control signals from the microwave signal generator 204 to at least a portion of the set of quantum devices 250. In at least one embodiment. The set of micro wave control lines 214 may be configured transmit the microwave control signals from the micro wave signal generator 204 to each qubit of the set of qubits 290. In at least some embodiments, the set of microwave control lines 214 may be configured transmit the microwave control signals from the microwave signal generator 204 to additional and/or alternative quantum devices of the set of quantum devices 250. For example, the set of micro wave control lines 214 may be configured transmit the microwave control signals from the microwave signal generator 204 to at least a subset of the set of qubit couplers 270 and/or at least a subset of the set of Z-gates 280.

[43] To provide this DC control signal in conventional QCSs, for each individual quantum device of the set of quantum devices 250, at least one control lines may originate in the room temperature (RT) environment 200 and cross the colder temperature chamber 210 and the ultra-cold chamber 229 to terminate at the corresponding quantum device within the ultra-cold chamber 220. In contrast to conventional approaches, in the various embodiments, a multiplexed control logic device (e.g., DC control logic device 230) is positioned within the ultra-cold chamber 220. As shown in FIG. 2, the outputs of DC control logic device 230 “fan-out” to multiple quantum devices. Thus, the DC control logic device 230 may be a multiplexed DC control logic device. The fan-out (or multiplexing) of the DC control logic device 230 enables the providing a set of DC control signals 222 to at least a subset of the set of quantum devices 260.

[44] One or more DC control lines (e.g., DC control line 212) can provide the DC control logic device 230 with one or more “programming” signals. In the embodiment shown in FIG. 2, a single DC control line (e.g., DC control line 212) provides the DC control logic device 230 with the programming signals. A programming signal generator is located in the room temperature environment 200. The DC control line 212 originates in the room temperature environment 200, and traverses the cold temperature chamber 210 and the ultra-cold chamber 220 and terminates at the DC control logic device 230. The programming signal generator 202 may generate the programming signals and the DC control 212 may provide the programming signals to the DC control logic device 230. In response to receiving the programming signals, the DC control logic device 230 may provide the set of DC control signals 222 to the subset of the set of quantum devices 250.

[45] In other embodiments, multiple DC control lines may bring the programming signals to the DC control logic device 230. In various embodiments, multiple DC control lines may bring the programming signals to the DC control logic device 230. The DC control logic device 230 may receive its input signals via K input lines, where ? is a positive integer. Based on the signals encoded K input signals, the DC control logic device 230 may provide control signals to L quantum devices (of the set of quantum devices 250, where L is positive integer. To control the L quantum devices, K DC control lines are run from the RT environment 200 and into the ultracold chamber 220. The K control lines transmit the programming signals from the RT environment 200 to the DC control logic device 230. When the ratio - > 1, a reduction in the number of control lines that are run from the RT environment 200 and into the cryogenic ultra-cold chamber 220 is achieved. In some embodiments, - » 1, leading to a significant reduction in the required number of control lines.

[46] Although not shown explicitly in FIG. 2, the ultra-cold chamber 220 may include a plurality of DC control logic devices. A plurality of DC control lines may transmit a plurality of programming signals to the plurality of DC control logic devices. Each DC control logic device of the plurality of DC control logic devices may provide DC control signals to a separate subset of thee set of quantum devices 250. Each separate subset of the set of quantum devices 250 may be disjoint from all the other subsets of the set of quantum devices 250.

[47] FIG. 3A depicts an example DC control logic device 300 that is consistent with the various embodiments. DC control logic device 300 may be similar to DC control logic device 230 of FIG. 2. As such, DC control logic device 300 may be co-located with a quantum processor (e.g., quantum processor device 240 of FIG 2) within a cryogenic chamber (e.g., cold temperature chamber 210 and/or ultra-cold temperature chamber 220 of FIG. 2). DC control logic device 300 may be a digital-to-analog convertor (DAC) device. DC control logic device 300 may be implemented as a set of loops (e.g., first loop 302 and second loop 304) pairing a large inductance (e.g., inductor 306) w ith one or more Josephson junction (e.g., first Josephson junction 320, second Josephson junction 322, and third Josephson junction 324). Note that the different physical sizes of the “X” used to indicated the separate Josephson junctions indicates that the IC of the junctions may vary betw een the first, second, and third Josephson junctions 320/322/324. In other embodiments, the IC may be similar across all the Josephson junctions.

[48] In this non-limiting example, the DC control logic device 300 comprises a set of stages (e.g., first stage 308). In the example embodiment shown in FIG. 3A, only a single stage is included. However, the embodiments are not so limited, and additional stages may be added to the DC control logic device 300. For each stage, a flux quantum is added to the loops (e.g., the first loop 302 or the second loop 304), the current flowing in the loop increases. Each loop is then inductively coupled to a separate quantum device through a transformer (e.g., first transformer 330 for the first loop 302 and second transformer 332 for the second loop 304), effectively applying a bias field. Additional loops can be added to recover fine control over the output field. Each flux quanta can be added to the loop at very⁷ fast speeds. Superconductor circuits can be operated in the rate of 100+GHz. In addition, power dissipation is roughly 0.22aJ per flux quantum moved into or out of the loop.

[49] In the non-limiting embodiment shown in FIG. 3 A, a “programming” input signal 310 may be provided to the DC control logic device 300. The input signal 310 may have the form of . Thus, the programming signal may be a sinusoidal signal. For each loop, a separate output signal may be provided to separate quantum devices via the corresponding transformers. For example, a first sinusoidal signal 340 may be provided to a first quantum device and a second sinusoidal signal 342 may be provided to a second quantum device. Based on the programming signal (e.g., the input signal 310), the first sinusoidal signal 340 may have the form G₁(t) = cos (a>t + <p_x) and the second sinusoidal signal 342 may have the form G₂ (t) = sin(tot + <p₂) . Accordingly, the first and second sinusoidal signals 340/342 may be offset by a relative phase. Because the frequencies of the input signal 310, the first sinusoidal signal 340, and the second sinusoidal signal 342 are significantly less than a microwave signal, such signals may be considered to be “DC signals.” For example, the first and second sinusoidal signals 340/342 may be DC control signals. As discussed in conjunction with FIG. 3B, the biasing current may be shared across separate quantum devices.

[50] FIG. 3B depicts an example digital-to-analog (DAC) device array 350 that is consistent with the various embodiments. DAC device array 350 may be a 2D array of DAC devices. In this non-limiting example, DAC device array 350 includes 4 DAC devices: first DAC device 352, second DAC device 354, third DAC device 356, and fourth DAC device 358. The four DAC devices are arranged in a 2D 2 x 2 planar array. Other embodiments are not so limited and may include additional DAC. For instance, larger 2D arrays are possible. Furthermore, in at least one embodiment, DAC device array 350 may be a 3D array of DAC devices. Each DAC device in the DAC device array 350 (e.g., first DAC device 352, second DAC device 354, third DAC device 356, and fourth DAC device 358) may be a DC control logic device. That is, each of the DAC devices in the DAC device array 350 may be similar to DC control logic device 300 of FIG. 3A. Accordingly, each of the DAC devices may provide a DC control signal to one or more quantum devices. Furthermore, the DAC device array 350 may be located within a cryogenic environment (e.g., ultra-cold chamber 220 of FIG. 2)

[51] Via one or more bias current lines (e.g., first bias current line 362 and second bias current line 364), a common bias current may be shared across multiple DAC devices, and thus multiple quantum devices. For instance, first bias current line 362 may provide a common bias current to both first DAC device 352 and third DAC device 356. Likewise, second bias current line 364 may provide another common bias cunent to second DAC device 354 and fourth DAC device 358. In this way, a single bias current line may provide a common bias current to multiple quantum devices. That is, a bias current may be shared across multiple quantum devices. Note that in some embodiments, the first bias current line 362 and the second bias current line 364 maybe tied together, such that a common bias current may be shared amongst each of the four DAC devices 352/354/356/358.

[52] The DAC device array 350 may also include a plurality of address lines, such that each DAC device (and thus each quantum device) may be selectively addressed, accessed, controlled, operated and/or read. As shown in the non-limiting embodiment, the DAC device array 350 includes four address lines (e.g., first address line 372, second address line 374, third address line 376, and fourth address line 378) arranged in a 2D array. The 2D array of address lines may be arranged in a "column and row” arrangement, such that each pair of a column and row address lines selects a unique DAC device (and/or a unique quantum device). In the non-limiting example of FIG. 3B, the first address line 372 and the second address line 374 are column address lines.

The third address line 376 and the fourth address line 378 are row address lines. The combination of the first address line 372 (e.g., a column address line) and the third address line (e.g., a row address line) selects the first DAC device 376). Note that for 3D embodiments, the array of address lines may be a 3D array.

Additional Embodiments [53] One non-limiting embodiment includes a quantum computing system (QCS). The QCS may include a first cryogenic chamber, a first quantum device, a second quantum device, and the first control logic device. Each of the first quantum device, the second quantum device, and the first control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more programming signals, the first control logic device may be configured to provide a first control signal to the first quantum device and to provide a second control signal to the second quantum device. In some embodiments, the QCS may also include a first control line. The first control line may originate from outside the first cryogenic chamber and terminate at the first control logic device. The first control line is configured to transmit the one or more programming signals from outside the first cry ogenic chamber.

[54] In various embodiments, the QCS may further include a third quantum device, a fourth quantum device, and a second control logic device. Each of the second quantum device, the third quantum device, and the second control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more additional programming signals, the second control logic device may be configured to provide a third control signal to the third quantum device and to provide a fourth control signal to the fourth quantum device. In some embodiments, the QCS may also include a second control line. The second control line may originate from outside the first cry ogenic chamber and terminate at the second control logic device. The second control line is configured to transmit the one or more additional programming signals from outside the first cryogenic chamber.

[55] In at least one embodiment, the first control signal is a first DC control signal, the second control signal is a second control DC signal, the third control signal is a third DC control signal, and the fourth control signal is a fourth control DC signal. Each of the first, second, third, and fourth quantum devices may be a qubit or a quantum logic gate. A quantum logic gate may be aZ-gate. In some embodiments, a quantum logic gate may be implemented by a qubit coupler.

[56] In at least one embodiment, the QCS may include a second cryogenic chamber. The first cry ogenic chamber may be nested within the second cry ogenic chamber. The first cry ogenic chamber may be configured to sustain a first temperature in the millikelvin (mK) range. The second cryogenic chamber may be configured to sustain a second temperature of approximately 4 kelvins.

[57] In some embodiments, the first control logic device is a DC control logic device. The DC control logic device may be a digital-to-analog (DAC) device. The DAC device may convert the one or more programming signals into the first control signal and the second control signal. The first control signal may be a first analog signal and the second control signal may be a second analog signal. The first analog signal and the second analog signal may be sinusoidal signals that are offset by a relative phase. Furthermore, the one or more programming signals may be a sinusoidal signal.

[58] The DAC device may include a first current loop and a second current loop. The first current loop may pair a first Josephson junction with a first inductance of the DAC device. The second current loop may pair a second Josephson junction with the first inductance of the DAC device. The first current loop may provide the first analog signal to the first quantum device. The second current loop may provide the second analog signal to the second quantum device. The DAC device may additionally include a first transformer and a second transformer. The first transformer may electrically couple the first loop to the first quantum device. The second transformer may electrically couple the second loop to the second quantum device. The DAC device may further include a set of stages. Each stage in the set of stages adds an additional quantum of flux to the first inductance.

[59] Another embodiment includes a method for operating a quantum computing system. The method may include providing one or more programming signals to a control logic device. The control logic device may be co-located with a first quantum device and a second quantum device within a cryogenic chamber. The one or more programming signals may originate from an exterior of the cryogenic chamber. In response to receiving the one or more programming signals, the control logic device may be configured to provide a first control signal to the first quantum device within the cryogenic chamber and a second control signal to the second quantum device within the cryogenic chamber.

[60] Another embodiment includes a cryogenic chamber comprising a first device, a second device, and a DC control logic device. Each of the first device, the second device, and the DC control logic device may be positioned within an interior of the cryogenic chamber. The first device is operable via a first DC control signal. The second device may be operable via a second DC control signal. In response to receiving one or more programming signals that originated from an exterior of the cryogenic chamber, the DC control logic device may be configured to provide the first DC control signal to the first device and to provide the second DC control signal to the second device.

[61] Implementations of the digital, classical, and/or quantum subject matter and the digital functional operations and quantum operations described in this specification can be implemented in digital electronic circuitry, suitable quantum circuitry or, more generally, quantum computational systems, in tangibly-implemented digital and/or quantum computer software or firmware, in digital and/or quantum computer hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. The term “quantum computing systems’" may include, but is not limited to. quantum computers/computing systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[62] Implementations of the digital and/or quantum subject matter described in this specification can be implemented as one or more digital and/or quantum computer programs, i.e., one or more modules of digital and/or quantum computer program instructions encoded on a tangible non-transitory storage medium for execution by, or to control the operation of, data processing apparatus. The digital and/or quantum computer storage medium can be a machine- readable storage device, a machine-readable storage substrate, a random or serial access memory' device, one or more qubits/qubit structures, or a combination of one or more of them. Alternatively or in addition, the program instructions can be encoded on an artificially-generated propagated signal that is capable of encoding digital and/or quantum information (e.g., a machine-generated electrical, optical, or electromagnetic signal) that is generated to encode digital and/or quantum information for transmission to suitable receiver apparatus for execution by a data processing apparatus.

[63] The terms quantum information and quantum data refer to information or data that is carried by, held, or stored in quantum systems, where the smallest non-trivial system is a qubit, i.e., a system that defines the unit of quantum information. It is understood that the term “qubif ' encompasses all quantum systems that may be suitably approximated as a two-level system in the corresponding context. Such quantum systems may include multi-level systems, e.g., with two or more levels. By way of example, such systems can include atoms, electrons, photons, ions or superconducting qubits. In many implementations the computational basis states are identified with the ground and first excited states, however it is understood that other setups where the computational states are identified with higher level excited states (e.g., qudits) are possible.

[64] The term “data processing apparatus” refers to digital and/or quantum data processing hardware and encompasses all kinds of apparatus, devices, and machines for processing digital and/or quantum data, including by way of example a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or multiple digital and quantum processors or computers, and combinations thereof. The apparatus can also be, or further include, special purpose logic circuitry, e.g., an FPGA (field programmable gate array), or an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing apparatus that is designed to simulate or produce information about a specific quantum system. In particular, a quantum simulator is a special purpose quantum computer that does not have the capability to perform universal quantum computation. The apparatus can optionally include, in addition to hardware, code that creates an execution environment for digital and/or quantum computer programs, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[65] A digital or classical computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, a software application, a module, a software module, a script, or code, can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or can be written in a quantum programming language, e.g., QCL, Quipper, Cirq, etc..

[66] A digital and/or quantum computer program may, but need not, correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data, e g., one or more scripts stored in a markup language document, in a single file dedicated to the program in question, or in multiple coordinated files, e.g., files that store one or more modules, sub-programs, or portions of code. A digital and/or quantum computer program can be deployed to be executed on one digital or one quantum computer or on multiple digital and/or quantum computers that are located at one site or distributed across multiple sites and interconnected by a digital and/or quantum data communication network. A quantum data communication network is understood to be a network that may transmit quantum data using quantum systems, e.g. qubits. Generally, a digital data communication network cannot transmit quantum data, however a quantum data communication network may transmit both quantum data and digital data.

[67] The processes and logic flows described in this specification can be performed by one or more programmable digital and/or quantum computers, operating with one or more digital and/or quantum processors, as appropriate, executing one or more digital and/or quantum computer programs to perform functions by operating on input digital and quantum data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA or an ASIC, or a quantum simulator, or by a combination of special purpose logic circuitry' or quantum simulators and one or more programmed digital and/or quantum computers. [68] For a system of one or more digital and/or quantum computers or processors to be “configured to" or “operable to” perform particular operations or actions means that the system has installed on it software, firmware, hardware, or a combination of them that in operation cause the system to perform the operations or actions. For one or more digital and/or quantum computer programs to be configured to perform particular operations or actions means that the one or more programs include instructions that, when executed by digital and/or quantum data processing apparatus, cause the apparatus to perform the operations or actions. A quantum computer may receive instructions from a digital computer that, when executed by the quantum computing apparatus, cause the apparatus to perform the operations or actions.

[69] Digital and/or quantum computers suitable for the execution of a digital and/or quantum computer program can be based on general or special purpose digital and/or quantum microprocessors or both, or any other kind of central digital and/or quantum processing unit. Generally, a central digital and/or quantum processing unit will receive instructions and digital and/or quantum data from a read-only memory⁷, or a random access memory, or quantum systems suitable for transmitting quantum data, e.g. photons, or combinations thereof.

[70] Some example elements of a digital and/or quantum computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital and/or quantum data. The central processing unit and the memory⁷ can be supplemented by. or incorporated in, special purpose logic circuitry or quantum simulators. Generally, a digital and/or quantum computer will also include, or be operatively coupled to receive digital and/or quantum data from or transfer digital and/or quantum data to, or both, one or more mass storage devices for storing digital and/or quantum data, e.g., magnetic, magneto-optical disks, or optical disks, or quantum systems suitable for storing quantum information. However, a digital and/or quantum computer need not have such devices.

[71] Digital and/or quantum computer-readable media suitable for storing digital and/or quantum computer program instructions and digital and/or quantum data include all forms of nonvolatile digital and/or quantum memory, media and memory⁷ devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD- ROM disks; and quantum systems, e g., trapped atoms or electrons. It is understood that quantum memories are devices that can store quantum data for a long time with high fidelity⁷ and efficiency, e.g., light-matter interfaces where light is used for transmission and matter for storing and preserving the quantum features of quantum data such as superposition or quantum coherence. [72] Control of the various systems described in this specification, or portions of them, can be implemented in a digital and/or quantum computer program product that includes instructions that are stored on one or more tangible, non-transitory machine-readable storage media, and that are executable on one or more digital and/or quantum processing devices. The systems described in this specification, or portions of them, can each be implemented as an apparatus, method, or electronic system that may include one or more digital and/or quantum processing devices and memory to store executable instructions to perform the operations described in this specification.

[73] While this specification contains many specific implementation details, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to particular implementations. Certain features that are described in this specification in the context of separate implementations can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable sub combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub-combination or variation of a sub-combination.

[74] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order show n or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system modules and components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[75] Particular implementations of the subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As one example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.

Claims

WHAT IS CLAIMED IS:

1. A quantum computing system comprising: a first cryogenic chamber; a first quantum device positioned within the first cry ogenic chamber; a second quantum device positioned within the first cryogenic chamber; and a first control logic device positioned within the first cryogenic chamber, wherein in response to receiving one or more programming signals, the first control logic device is configured to provide a first control signal to the first quantum device and to provide a second control signal to the second quantum device.

2. The quantum computing system of claim 1, further comprising: a first control line originating from outside the first cry ogenic chamber and terminating at the first control logic device, wherein the first control line is configured to transmit the one or more programming signals from outside the first cryogenic chamber.

3. The quantum computing system of claim 1, further comprising: a third quantum device positioned within the first cryogenic chamber; a fourth quantum device positioned within the first cry ogenic chamber; and a second control logic device positioned within the first cryogenic chamber, wherein in response to receiving one or more additional programming signals, the second control logic device is configured to provide a third control signal to the third quantum device and to provide a fourth control signal to the fourth quantum device.

4. The quantum computing system of claim 3, further comprising: a first control line originating from outside the first cry ogenic chamber and terminating at the first control logic device, wherein the first control line is configured to transmit the one or more programming signals from outside the first cryogenic chamber; and a second control line originating from outside the first cry ogenic chamber and terminating at the second control logic device, wherein the second control line is configured to transmit the one or more additional programming signals from outside the first cryogenic chamber.

5. The quantum computing system of claim 1, wherein the first control signal is a first DC control signal, and the second control signal is a second control DC signal.

6. The quantum computing system of claim 5, further comprising: a first control line originating from outside the first cryogenic chamber and terminating at the first control logic device, wherein the first control line is configured to transmit the one or more programming signals from outside the first cryogenic chamber; a second control line originating from outside the first cryogenic chamber; and terminating at the first quantum device, wherein the second control line is configured to transmit a microwave control signal to the first quantum device.

7. The quantum computing system of claim 6, wherein the first quantum device is a qubit and the second quantum device is a quantum logic gate.

8. The quantum computing system of claim 7, wherein the quantum logic gate is a Z- gate.

9. The quantum computing system of claim 7, wherein the quantum logic gate is implemented by a qubit coupler.

10. The quantum computing system of claim 1, further comprising: a second cry ogenic chamber, wherein the first cryogenic chamber is nested withing the second cryogenic chamber.

11. The quantum computing system of claim 10, wherein the first cryogeni c chamber is configured to sustain a first temperatures in a millikelvin (mK) range and the second cryogenic chamber is configured to sustain second temperature of approximately 4 kelvins.

12. The quantum computing system of claim 1, wherein the first control logic device is a DC control logic device.

13. The quantum computing system of claim 1, wherein the first control logic device is a digital-to-analog (DAC) device that converts the one or more programming signals into the first control signal and the second control signal, the first control signal being a first analog signal and the second control signal being a second analog signal.

14. The quantum computing system of claim 13, wherein the first analog signal and the second analog signal are sinusoidal signals that are offset by a relative phase.

15. The quantum computing system of claim 13, wherein the one or more programming signals is a sinusoidal signal.

16. The quantum computing system of claim 13, wherein the DAC device comprises: a first loop that pairs a first Josephson junction with a first inductance, wherein the first loop provides the first analog signal to the first quantum device; and a second loop that pairs a second Josephson junction with the first inductance, wherein the second loop provides the second analog signal to the second quantum device.

17. The quantum computing system of claim 16, wherein the DAC device comprises: a first transformer that electrically couples the first loop to the first quantum device; and a second transformer that electrically couples the second loop to the second quantum device.

18. The quantum computing system of claim 17, wherein the DAC device comprises: a set of stages, wherein each stage in the set of stages adds an additional quantum of flux to the first inductance.

19. A method for operating a quantum computing system, the method comprising: providing one or more programming signals to a control logic device that is colocated with a first quantum device and a second quantum device within a cry ogenic chamber, wherein the one or more programming signals originated from an exterior of the cryogenic chamber, and in response to receiving the one or more programming signals, the control logic device provides a first control signal to the first quantum device within the cryogenic chamber and a second control signal to the second quantum device within the cryogenic chamber.

20. A cryogenic chamber comprising: a first device included within an interior of the cryogenic chamber, wherein the first device is operable via a first DC control signal; a second device included within the interior of the cryogenic chamber, wherein the second device is operable via a second DC control signal; and a DC control logic device included within the interior of the cryogenic chamber, wherein in response to receiving one or more programming signals that originated from an exterior of the cryogenic chamber, the DC control logic device is configured to provide the first DC control signal to the first device and to provide the second DC control signal to the second device.