EP4526930A1 - Localized passivated contacts for solar cells - Google Patents
Localized passivated contacts for solar cellsInfo
- Publication number
- EP4526930A1 EP4526930A1 EP23725464.4A EP23725464A EP4526930A1 EP 4526930 A1 EP4526930 A1 EP 4526930A1 EP 23725464 A EP23725464 A EP 23725464A EP 4526930 A1 EP4526930 A1 EP 4526930A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- solar cell
- substrate
- contact
- tco
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
- H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F10/00—Individual photovoltaic cells, e.g. solar cells
- H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
- H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
- H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
- H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/121—The active layers comprising only Group IV materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/138—Manufacture of transparent electrodes, e.g. transparent conductive oxides [TCO] or indium tin oxide [ITO] electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/244—Electrodes made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/30—Coatings
- H10F77/306—Coatings for devices having potential barriers
- H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/70—Surface textures, e.g. pyramid structures
- H10F77/703—Surface textures, e.g. pyramid structures of the semiconductor bodies, e.g. textured active layers
Definitions
- the present invention is in the field of a semiconductor device sensitive to light, and specially adapted for the conversion of the energy of such radiation into electrical energy, in particular a silicon hetero-j unction solar cell, or photovoltaic (PV) cell, a method for the manufacture thereof, and details thereof.
- Said solar cells comprise at least one heterojunction and typically two heterojunctions.
- a solar cell, or photovoltaic (PV) cell is an electrical device that converts energy of light, typically sun light (hence “solar”), directly into electricity by the so-called photovoltaic effect.
- the solar cell may be considered a photoelectric cell, having electrical characteristics, such as current, voltage, resistance, and fill factor, which vary when exposed to light and which vary from type of cell to type.
- Solar cells are described as being photovoltaic irrespective of whether the source is sunlight or artificial light. They may also be used as photo detector.
- a solar cell When a solar cell absorbs light it may generate either electron-hole pairs or excitons. In order to obtain an electrical current charge carriers of opposite types are separated. The separated charge carriers are “extracted” to an external circuit, typically providing a DC-current. For practical use, a DC-current may be transformed into an AC-current, e.g. by using a transformer.
- solar cells are grouped into an array of elements. Various elements may form a panel, and various panels may form a system.
- Wafer-based c-Si solar cells contribute to more than 90% of the total PV market. According to recent predictions, this trend will remain for the upcoming years and many years beyond. Due to their simplified process, conventional c-Si solar cells dominate a large part of the market. As an alternative to the industry to improve the power to cost ratio, the silicon heterojunction approach has become increasingly attractive for the PV industry, even though the relatively complicated process to deploy the proper front layers, such as a transparent conductive oxide (TCO) and an inherent low thermal budget of the cells limiting usage of existing production lines and thus result in a relatively small market share so far.
- TCO transparent conductive oxide
- a heterojunction is an interface that occurs between two layers or regions of dissimilar crystalline semiconductors. These semiconducting materials have unequal band gaps as opposed to a homojunction.
- a homojunction relates to a semiconductor interface formed by typically two layers of similar semiconductor material, wherein these semiconductor materials have equal band gaps and typically have a different doping (either in concentration, in type, or both).
- a common example is a homojunction at the interface between an n-type layer and a p-type layer, which is referred to as a p-n junction.
- advanced techniques are used to precisely control a deposition thickness of layers involved and to create a lattice-matched abrupt interface.
- Three types of heterojunctions can be distinguished, a straddling gap, a staggered gap, and a broken gap.
- a disadvantage of solar cells is that the conversion per se is not very efficient, typically, for Si-solar cells, limited to somewhat above 20%. Theoretically a single p-n junction crystalline silicon device has a maximum power efficiency of 32%. An infinite number of layers may reach a maximum power efficiency of 86%. The highest ratio achieved for a solar cell per se at present is about 44%. For commercial silicon solar cells, the record is about 26.7% (an interdigitated back-contacted silicon heterojunction solar cell). In view of efficiency, the front contacts may be moved to a rear or back side, eliminating shaded areas. In addition, thin silicon films were applied to the wafer.
- the fill factor may be defined as a ratio of an actual maximum obtainable power to the product of the open-circuit voltage and short-circuit current. It is considered to be a key parameter in evaluating performance.
- a typical advanced commercial solar cell has a fill factor > 0.75, whereas less advanced cells have a fill factor between 0.4 and 0.7. Cells with a high fill factor typically have a low equivalent series resistance and a high equivalent shunt resistance; in other words, less internal losses occur. Efficiency is nevertheless improving gradually, so every relatively small improvement is welcomed and of significant importance.
- a solar cell having a full area front passivating contact is not attractive, such as due to highly absorptive materials used to build such a structure. That is the case of heavily doped poly-silicon and a-Si layers.
- the process requires a very thin polysilicon film for minimizing parasitic absorption loss, and in case of a-Si, the process requires e.g. an extra transparent conductive oxide (TCO) layer for supporting the carrier lateral transport.
- TCO transparent conductive oxide
- the electron transport layer and/or hole transport layer hinder the conversion of light into electrical power.
- typically extra process steps in the manufacture of a solar cell are involved, such as a doping step, and the deposition of the transport layer, and possibly even (intermediate) cleaning steps, as well as extra or multi-chamber process tools, typically deposition tools.
- extra tools or multi-chamber tools in addition add to the cost of production as more of the expensive clean-room surface is occupied thereby.
- Solar cells deliver power electricity from sun light. It is noted that the efficiency of this PV-process usually is limited by material properties and the amount of light arriving to the absorber bulk. Normally, for low temperature processing of high efficiency solar cells, light management is limited by parasitic absorption of the light in front and rear layers. The reason for such parasitic absorption is that collecting layers are designed to cover bulk interfaces, to support the collection of charge. Indeed, such layers collect efficiently the charge inside the solar cell in spite of limiting the amount of absorbed light in the absorber bulk. Moreover, such collecting layers use materials that are not abundant in earth, such as indium.
- US2017162725A1 recites a solar cell which includes a front side for light incidence, an opposite back side, a crystalline semiconductor substrate of a first or second conductivity type, a front side passivating region with a passivating layer and a conductive layer of the first type, a back side passivating region with a passivating layer and a conductive layer of the second type, a front side contact with one front side conductive material and front side electrical contacts on the front side conductive material, a front side light coupling layer on the front side, a back side contact opposite the front side contact and formed by back side conductive material and a back side electrical contact thereon.
- the front side has lower light absorption and better antireflective property.
- US2019057792A1 recites an electrically conductive composition for use in the preparation of an electrically conductive network, said composition comprising, based on the total weight of the composition: a) from 75 to 98 wt. % of a silver powder having a tap density of at least 4.0 g/cm 3 and a specific surface area of less than 1.5 m2/g; b) from 1 to 10 wt. % of a binder resin; c) from 0 to 5 wt. % of a hardener; and, d) from 0 to 10 wt.
- US2020168759A1 recites a method for manufacturing a substrate with a transparent conductive film, which includes: preparing a base body that has a top surface and a back surface and has an a-Si film coating at least one of the top surface and the back surface; and setting temperatures of the base body and the a- Si film to be in the range of 70 to 220° C.
- CN10678404A recites a silicon-based heterojunction solar cell and a preparation method thereof.
- the silicon-based heterojunction solar cell comprises a crystalline silicon substrate, a first intrinsic amorphous layer, a second intrinsic amorphous layer, a first doping layer, a second doping layer, a first transparent conductive layer and a second transparent conductive layer, wherein the first transparent conductive layer and/or the second transparent conductive layer is a transparent conductive lamination formed by a metal film layer and a dielectric film layer;
- the metal film layer is a silver film layer, a gold film layer, an aluminum film layer, a copper film layer, a chromium film layer, a molybdenum film layer, a tungsten film layer, a niobium film layer or a film layer of other alloy material.
- US2018138334A1 recites a method for manufacturing a solar cell. The method includes: forming a first tunneling layer on one surface of a semiconductor substrate; forming a first conductive region on the first tunneling layer so that the first conductive region includes a metal oxide layer having an amorphous structure; and forming a first electrode electrically connected to the first conductive region.
- US2017338356A1 recites a system for fabrication of a photovoltaic structure.
- the system can include a physical vapor deposition tool configured to sequentially deposit a transparent conductive oxide layer and a metallic layer on an emitter layer formed in a first surface of a Si substrate, without requiring the Si substrate to be removed from the physical vapor deposition tool after depositing the transparent conductive oxide layer.
- the system can further include an electroplating tool configured to plate a metallic grid on the metallic layer and a thermal annealing tool configured to anneal the transparent conductive oxide layer.
- the present invention relates to an improved heterojunction solar cell and various aspects thereof and a simplified process for manufacturing the solar cell which overcomes one or more of the above disadvantages, without jeopardizing functionality and advantages.
- the present invention relates in a first aspect to a solar cell, in particular a het- ero-junction silicon solar cell according, typically a front and rear contacted solar cell, and in a second aspect to a method for making such a solar cell.
- a design of solar cells is provided using localized layers to collect efficiently the charge, and allowing the light to freely arrive to the light absorbing bulk.
- the present solar cells make use of collecting layers localized in a fraction of the bulk interface, with a reduction of the parasitic absorption. Additionally, it is an option to reduce the use of materials during the manufacture of the solar cells.
- the light collecting layers use materials that are not abundant in earth, such as indium.
- Inventors present a design of solar cells using localized layers to collect efficiently the charge and allowing the light to freely arrive to the absorber bulk. Furthermore, as the proposed design devise the use of collecting layers are localized to a small part of the bulk interface, it is a clear option to reduce and eventually avoid the consumption of materials during the processing.
- the present invention is in particular feasible with photovoltaic industry based in low temperature process for Silicon solar cells.
- the invention involves the removal of a substantial part of the transparent conductive oxide (TCO) layer, in particular both the front and rear side TCO layer. More in particular the part of the TCO layer which is not underneath a contact or contact layer is removed. “Removal” is in view of typical prior art solar cells, which have a full TCO-layer. In the present invention the TCO needs only to be provided underneath the respective contact.
- the contact is considered to be an electrical contact, typically for flowing electrons externally away from the solar cell, such as to a converter, or to a power grid.
- the remainder of the front surface area or back surface area provides (direct) access for light to at least one light absorbing layer.
- the remainder of the front surface area or back surface area provides direct access to at least one light absorbing layer and is substantially free of other layers.
- the remainder of the front surface area or back surface area provides direct access to at least one light absorbing layer and is substantially free of other layers, apart from an optional antireflective coating or optional surface treated layer.
- the at least one contact, in particular a metal contact, more in particular a contact layer, and the TCO layer form a stack, optionally incorporating the doped silicon layer in the stack as well; the stack has a relatively small width, of all layers in the stack, such that only a small fraction of the respective surface is covered with the stack, the remainder of the surface being substantially free of other layers, part from the optional antireflective coating layer and/or optional surface treated layer.
- a stack is considered to relate to an orderly pile of layers, having a substantially similar width, in the present case, a relative narrow width.
- the present stack may be considered to be or form the electrical contact.
- a full TCO-layer can be provided, and then mostly removed, such as by etching. The removed TCO can be reused.
- a mask or the like can be used to provide the TCO layer only partially on the surface available, and not on the surface occupied by the exemplary mask. Therewith, from the beginning less TCO-material is used. Also the performance of the obtained solar cell is comparable to prior art solar cells, albeit less material is used.
- the doped silicon layer may be likewise substantially absent.
- the TCO can be made even thinner.
- a proof-of-concept SHJ solar cell exhibits a VOC of >700 mV, a JSC of about 40 mA/cm 2 , a FF of >80%, and an efficiency of >23%.
- the present invention clearly allows a simpler process, cost reductions, and material savings. Cost reductions come from both materials saving during the device manufacturing, and also simplification of fabrication tools, in particular the Plasma-Enhanced Chemical-Vapor-Deposition (PECVD).
- PECVD Plasma-Enhanced Chemical-Vapor-Deposition
- the present inventors provide this layer localized only beneath metal contacts. Accordingly, it allows some flexibility regarding processing, for instance the thickness of collecting layers that has less impact in the illuminated area.
- the present invention is therefore better than available alternatives, as it uses less material and allows more flexibility in the manufacture of a solar cell.
- the use of ultra-thin layers is no longer a limitation for improving the performance of high efficiency solar cells.
- the use of hard masks and its alignment is considered. Alignment may be relative to the present solar cell, or details thereof, such as alignment markers, may be relative to the hard mask, may be relative to an equipment used, in particualr a lithographic equipment, and so on, and combinations thereof.
- the impact of the present invention may be expressed in terms of less material consumption and the provision of more efficient solar cells, such as with a higher charge current density.
- the present solar cell comprises at least one heterojunction and typically two heterojunctions.
- the heterojunctions may be of staggered type.
- the present solar cells comprise a substrate (10), wherein the substrate typically comprises Si and dopants, directly on the substrate, at least one intrinsic layer (11), directly on the intrinsic layer a doped silicon layer, which may or may not occupy the full surface area of the intrinsic layer, and on the doped silicon layer a transparent conductive oxide (TCO)-layer (12), which may or may not occupy the full surface area of the doped silicon layer.
- the doped silicon layer may function as electron transport layer [ETL], or as hole transport layer [HTL], respectively.
- the transparent conductive oxide (TCO)-layer (12) provides electron transport or hole transport, respectively, and a metal contact (15) in electrical contact with the TCO-layer.
- the substrate is typically a crystalline Si-substrate, such as a n-doped or p-doped crystalline Si layer 10, typically of 50 pm-300 pm thickness.
- the layers of the stack are typically provided directly on one and another, that is, without an intermediate layer, or in any case an intermediate layer of significance to the performance of the heterojunction solar cell.
- the present invention relates to a method of producing a front-side and back-side contacted silicon hetero-j unction solar cell (100) according to the invention, comprising providing a substrate, such as a crystalline Si-substrate, optionally texturing the substrate, such as double-side texturing the substrate, thereafter immersing the substrate into a strong oxidizing solution, thereafter etching the oxidized substrate by dipping the oxidized substrate into an acidic solution, directly thereafter loading the etched substrate into a layer deposition tool, and depositing an intrinsic Si layer on at least one side of the etched substrate, thereafter providing at least one doped silicon layer on the at least one intrinsic Si- layer, in particular a layer that covers less than 20% of the front surface area or back surface area, respectively, thereafter depositing a transparent conductive oxide(TCO) layer on the at least one doped Si-layer, in particular after a first alignment of the solar cell, and then depositing metal contacts on the TCO-layer, in particular after a second alignment of the solar cell, more
- TCO
- the present invention provides a simplified fabrication process wherein solar cell precursors can be finished within a couple of steps, and which is a low cost and high throughput process, using compatible industrial standard metallization steps, solar cells featuring a high Voc, solar cells featuring a high Jsc & Voc, solar cells featuring a relatively high fill factor (FF), and wherein the design is applicable to both a front/rear contacted conventional solar cell architecture, a bifacial solar cell architecture, for interdigitated back-contacted (IBC) solar cells, and for both n- type and p-type bulk material.
- IBC interdigitated back-contacted
- the present invention relates in a first aspect to a silicon solar cell, and in a second aspect to a process for making such a solar cell.
- bottom and top are relative terms, which terms may be interchanged in so far as applicable.
- the substrate is covered with at least one intrinsic layer 11, such as one intrinsic layer at the rear side, and one intrinsic layer at the front side, in particular wherein the at least one intrinsic layer 11 each individually is selected from intrinsic Si, such as (i)a-Si:H and (i)nc-Si:H, from intrinsic Si-di electrics, such as (i)a-SiO x :H, (i)a-SiC x :H, and (i)a-SiNx:H, or dielectric metal oxide passivation layer, and combinations thereof.
- intrinsic Si such as (i)a-Si:H and (i)nc-Si:H
- intrinsic Si-di electrics such as (i)a-SiO x :H, (i)a-SiC x :H, and (i)a-SiNx:H, or dielectric metal oxide passivation layer, and combinations thereof.
- the thickness of the intrinsic layer each individually is from 0.1 nm-50 nm, in particular 1-20 nm, such as 2-15 nm.
- the intrinsic layer each individually is textured, in particular with a same texturing as the substrate.
- the present solar cell comprises at least one doped silicon layer 13,14, such as a p-doped silicon layer 13, and an n-doped silicon layer 14, in particular comprising a 5*10 14 -0.5*10 19 dopants/cm 3 n- or p-type doped crystalline Si layer 13,14, and/or wherein a doping concentration is preferably spatially constant.
- n-type dopants are selected from P, As, Bi, Sb and Li, and wherein p-type dopants are selected from B, Ga, and In.
- the doped silicon layer is provided in between the at least one contact and substrate.
- the doped silicon layer substantially covers the same surface area and the same amount of surface area as the at least one contact.
- the at least one contact is provided on a TCO layer 12, in particular wherein the material of the transparent conductive layer 12 is selected from Indium Tin Oxide (ITO), IOH, ZnO, or doped ZnO, such as Aluminium doped ZnO, doped Tin oxide, such as fluorine doped tin oxide, doped indium oxide, such as Indium Fluor Oxide (IFO:H), and Indium Tungsten Oxide (IWO).
- ITO Indium Tin Oxide
- IOH IOH
- ZnO or doped ZnO, such as Aluminium doped ZnO
- doped Tin oxide such as fluorine doped tin oxide
- doped indium oxide such as Indium Fluor Oxide (IFO:H)
- IWO Indium Tungsten Oxide
- a thickness of the transparent conductive layer 12 is 10-200 nm, in particular 20-170 nm, more in particular 30-50 nm.
- the refractive index of the transparent conductive layer 12 is ⁇ 2.2.
- the work function of the TCO layer 12 is from 2 eV to 8 eV, in particular 3.4 eV to 6.4 eV.
- the work function of the TCO layer 12 is 3.4 eV to 4.7 eV in case of the TCO-layer mainly transporting electrons.
- the work function of the TCO layer 12 is 4.7 eV to 6.4 eV in case of the TCO-layer mainly collecting holes.
- the TCO layer each individually is textured, in particular with a same texturing as the substrate.
- the contact in particular a metal contact, more in particular a contact layer, the TCO layer, and optionally the doped silicon layer form a stack, in particular a stack of substantially the same shaped layers, more in particular wherein a width of the doped silicon layer (HTL or ETL) > a width of the TCO layer, which width of the TCO layer > width of the contact layer.
- the width of an underlying layer may be slightly larger than the width of the layer directly on top thereof, such as 1-10% wider, such as 2-5% wider.
- the contact in particular a metal contact, more in particular a contact layer, the TCO layer, and the doped silicon layer form a stack, in particular a stack of substantially the same shaped layers.
- the respective widths in the stack, or in general of layers on top of one and another, may therefore have substantially the same width.
- a width of the layer lines each individually may be from 1-300 pm, such as 20-200 pm.
- a remainder of the front surface area or back surface area provides access to at least one light absorbing layer and is substantially free of other layers, apart from an optional antireflective coating and/or optional surface treated layer
- the at least one contact is provided as a strip, in particular at least one of a circular shaped strip, a multigonal shaped strip, a rectangular strip, and a spiral shaped strip, more in particular as a strip with a width of 0.01-200 pm, in particular a width of 0.05-50 pm, such as 1-5 pm.
- the at least one light absorbing layer is surface treated, in particular wherein the treatment is selected from treatment with a gas, and treatment with a plasma, more particular wherein in the treatment hydrogen is used, or wherein CO2 is used, or wherein in the treatment oxygen is used, even more in particular wherein substantially only hydrogen is used, or wherein substantially only oxygen is used.
- a pressure of 1.1 to 4.4 mbar, a power of 55-90 mW/cm 2 , and a temperature of 160-200 °C may be used, each individually.
- Preferred values are a pressure of 2.0-2.2 mbar, a power of 80-90 mW/cm 2 , and a temperature of 180-185 °C.
- the surface treatment is aimed at changing the surface of the layer, in particular of the doped silicon layer or the intrinsic silicon layer respectively. It provides a better condition/passivation of the absorber bulk. And also it provides a better interface for the application of ARC layer (s)
- the substrate 10 is a single sided or double sided flat substrate 10 surface.
- the substrate 10 is a single sided or double sided textured substrate 10 surface (ISO 4287: 1997), in particular textured with a surface roughness Ra of 1-20 pm, such as 2-10 pm.
- the textured surface has an aspect ratio (height depth of a textured structure) of 2-10.
- the substrate has a thickness of 1-500 pm.
- the substrate 10 comprises 1 * 10 12 -l .0* 10 21 n- or p-type dopants/cm 3 , in particular 2*10 14 -10 18 dopants/cm 3 , more in particular 5*10 14 -10 16 dopants/cm 3 , such as 8*10 14 -3*10 15 dopants/cm 3 .
- the substrate 10 has a resistivity of 0.1-1000 ohm*cm at 300K, more in particular 1-100 ohm*cm, such as 5-10 ohm* cm.
- the at least one contact covers less than 5% of the front surface area or back surface area, in particular wherein the at least one contact covers less than 1% of the front surface area or back surface area, more in particular less than 0.5%.
- a width of the doped silicon layer and a width of the TCO layer and a width of the contact layer each individually are from 1 pm-300 pm, in particular from 20 pm-200 pm, such as from 80 pm-150 pm.
- a thickness of said metal contacts 13 is 200 nm-50 pm, in particular 1-25 pm.
- the metal contact 13 is selected from a metal layer, a metal grid, a metal line, or a combination thereof.
- At least one of the front surface and the back surface is provided with an anti -reflective coating 16, in particular an anti- reflective coating 16 on the surface area not covered by the contact.
- the layer underneath the anti- reflective coating is surface treated 17, such as surface treated with H2, with O2, or a combination thereof.
- further chemical species may be present, either reactive species, or inactive species, such as nitrogen, or He.
- the Voc is >700 mV, in particular > 725 mV, such as > 730 mV.
- a J sc is > 30 mA/cm 2 , in particular > 38 mA/cm 2 , such as > 39 mA/cm 2 .
- FF fill factor
- the present solar cell has an efficiency of > 23%, in particular >23.8%, such as > 23.9%.
- the solar cell is a back-contacted solar cell, such as an interdigitated back-contacted solar cell, or wherein the solar cell is a back and front contacted solar cell.
- a hard mask is used.
- a hard mask For forming a plurality of solar cells these are typically provided in a tray or pod. Such a tray may house tens of wafers. These wafers are then subsequently treated through various process steps, such as deposition of a layer.
- a metal sheet could be used, considered to be a hard mask. The hard mask is carefully aligned with the wafer, or likewise, the solar cell being formed in the relevant process step. For alignment, at least one alignment marker may be used, and typically four markers are used.
- the hard mask may be provided with ad-hoc engineered, laser-cut openings, which openings provided deposition of the relevant layer on the relevant part of the surface area, and prevent deposition elsewhere, such as with the present contact layer, with the present TCO layer, and optionally with the present doped layer.
- the mask can be cleaned regularly such that the deposited material on the mask can be recovered, and reused. As such these localized layers (doped lines, TCO lines, and metal lines) could be deposited, among other techniques, also via hard mask.
- contacts and/or contact layers are provided by metal deposition and lift off of non-contact areas, screen printing, and electrical plating.
- the present invention therefore relates to a silicon hetero-j unction solar cell (100) as claimed and/or obtained by the method as claimed, comprising at least two elements as mentioned in the claims, and/or comprising at least one further element as mentioned in the description.
- Figure la,b shows an example of a prior-art solar cell.
- Figures 2a,b-3a,b show a schematic representation of an example of the present solar cell.
- Fig. 2a shows a typical cross-section comprising a crystalline silicon substrate 10, on both sides thereof an intrinsic a-Si:H layer 11, a p-doped 13 or n-doped layer 14 on the intrinsic layer, respectively, a TCO layer 12 only partially covering the doped layer, and metal contacts 15 on the TCO-layer.
- Fig. 2b shows a perspective view of the top layers. The bottom layers are formed likewise.
- an anti -reflective coating 16 may be present.
- the underlying layer in this case the intrinsic layer, may be surface treated 17.
- Fig. 3a shows a typical cross-section comprising a crystalline silicon substrate 10, on both sides thereof an intrinsic a-Si:H layer 11, a p-doped 13 or n-doped layer 14 only partially provided on the intrinsic layer, respectively, a TCO layer 12 only partially covering the doped layer, and metal contacts 15 on the TCO-layer.
- Fig. 2b shows a perspective view of the top layers. The bottom layers are formed likewise. Optionally an anti -reflective coating 16 may be present. Before providing the ARC- layer the underlying layer, in this case the intrinsic layer, may be surface treated 17.
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Abstract
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL2031897A NL2031897B1 (en) | 2022-05-17 | 2022-05-17 | Localized passivated contacts for Solar Cells |
| PCT/NL2023/050266 WO2023224471A1 (en) | 2022-05-17 | 2023-05-15 | Localized passivated contacts for solar cells |
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| Publication Number | Publication Date |
|---|---|
| EP4526930A1 true EP4526930A1 (en) | 2025-03-26 |
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| EP23725464.4A Pending EP4526930A1 (en) | 2022-05-17 | 2023-05-15 | Localized passivated contacts for solar cells |
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|---|---|
| EP (1) | EP4526930A1 (en) |
| NL (1) | NL2031897B1 (en) |
| WO (1) | WO2023224471A1 (en) |
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| CN118899359A (en) * | 2024-07-15 | 2024-11-05 | 浙江爱旭太阳能科技有限公司 | Battery string, battery assembly, and photovoltaic system |
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| CN1026564C (en) | 1991-06-15 | 1994-11-16 | 中国石油化工总公司大庆石油化工总厂 | Welding method for carburized austenitic heat-resisting allay material |
| ES2759328T3 (en) * | 2014-07-01 | 2020-05-08 | Meyer Burger Germany Ag | Solar cell |
| US9761744B2 (en) * | 2015-10-22 | 2017-09-12 | Tesla, Inc. | System and method for manufacturing photovoltaic structures with a metal seed layer |
| WO2017143496A1 (en) * | 2016-02-22 | 2017-08-31 | Henkel Ag & Co. Kgaa | Electrically conductive composition and applications for said composition |
| US11674217B2 (en) * | 2016-03-29 | 2023-06-13 | Ulvac, Inc. | Method of manufacturing substrate with a transparent conductive film, manufacturing apparatus of substrate with transparent conductive film, substrate with transparent conductive film, and solar cell |
| CN108074989A (en) * | 2016-11-14 | 2018-05-25 | Lg电子株式会社 | Solar cell and its manufacturing method |
| CN106784041A (en) * | 2017-02-04 | 2017-05-31 | 江苏神科新能源有限公司 | A kind of silicon based hetero-junction solar cell and preparation method thereof |
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| WO2023224471A1 (en) | 2023-11-23 |
| NL2031897B1 (en) | 2023-11-24 |
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