EP4314889A1

EP4314889A1 - Time-of-flight demodulation circuitry and a time-of-flight demodulation method

Info

Publication number: EP4314889A1
Application number: EP22713639.7A
Authority: EP
Inventors: Takahisa Ueno; Michiel TIMMERMANS; Arastoo KHALILI; Hiroki Hagiwara; Alper ERCAN
Original assignee: Sony Depthsensing Solutions NV SA; Sony Semiconductor Solutions Corp
Current assignee: Sony Depthsensing Solutions NV SA; Sony Semiconductor Solutions Corp
Priority date: 2021-03-25
Filing date: 2022-03-10
Publication date: 2024-02-07
Also published as: WO2022200055A1

Abstract

The present disclosure generally pertains to time-of-flight demodulation circuitry, configured to: apply a first demodulation voltage to a first diffusion region in a III-V semiconductor material; apply a second demodulation voltage to a second diffusion region in the III-V semiconductor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are generated in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage, or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage.

Description

TIME-OF-FLIGHT DEMODULATION CIRCUITRY AND A TIME-OF- FLIGHT DEMODULATION METHOD

TECHNICAL FIELD

The present disclosure generally pertains to time-of-flight demodulation circuitry and a time-of- flight demodulation method.

TECHNICAL BACKGROUND

Generally, time-of-flight (ToF) image sensors are known. For example, in the field of indirect time- of-flight (iToF), a depth may be measured indirectly by measuring a phase-shift of modulated light which is reflected at a scene (e.g. an object) and which is then incident on the image sensor.

The modulated light is typically in the infrared range, such that an interference with visible light is minimized.

On a material-level, iToF sensors are typically based on silicon technology and may be read out with CAPDs (current-assisted photonic demodulators) , which modulate taps storing photoelectric charges in response to the incident light.

Although there exist techniques for performing a time-of-flight measurement, it is generally desira- ble to provide time-of-flight demodulation circuitry and a time-of-flight demodulation method.

SUMMARY

According to a first aspect, the disclosure provides time-of-flight demodulation circuitry, configured to: apply a first demodulation voltage to a first diffusion region in a III-V semiconductor mate- rial; apply a second demodulation voltage to a second diffusion region in the III-V semiconduc- tor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are generated in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion ele- ment, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage, or towards the second diffusion element, if the first demodulation voltage is such that it creates narrower depletion region than that of the second demodulation volt- age. According to a second aspect, the disclosure provides a time-of-flight demodulation method, com- prising: applying a first demodulation voltage to a first diffusion region in a III-V semiconductor ma- terial; applying a second demodulation voltage to a second diffusion region in the III-V semicon- ductor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are generated in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion ele- ment, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage, or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than than that of the second demodulation voltage.

Further aspects are set forth in the dependent claims, the following description and the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments are explained by way of example with respect to the accompanying drawings, in which:

Fig. 1 schematically illustrates a ToF portion according to the present disclosure which is coupled to ToF demodulation circuitry according to the present disclosure;

Fig. 2 depicts a layout of diffusion regions (diffusion pattern) according to the present disclosure;

Fig. 3 depicts a further embodiment of a ToF portion with a plurality of diffusion regions;

Fig. 4 depicts a plurality of different diffusion region patterns according to the present disclosure;

Fig. 5 depicts two further embodiments of diffusion region patterns by means of diffusion region grids;

Fig. 6 illustrates three further embodiments of diffusion region patterns according to the present dis- closure including two three time three grids and a diffusion element surrounded by another diffu- sion element ring;

Fig. 7 depicts a further embodiment of a ToF portion according to the present disclosure wherein the diffusion regions have different structures;

Fig. 8 depicts a side-view of the ToF portion of Fig. 7.

Fig. 9 depicts a further embodiment of ToF demodulation circuitry suitable for two-tap application; Fig. 10 depicts a timing diagram according to the present disclosure for applying demodulation volt- ages to a detector region and a dump region;

Fig. 11 depicts a further timing diagram according to the present disclosure for applying demodula- tion voltages to two detector regions;

Fig. 12 depicts an embodiment of a ToF demodulation method according to the present disclosure in a block diagram; and

Fig. 13 illustrates an embodiment of a ToF imaging apparatus according to the present disclosure.

DETAILED DESCRIPTION OF EMBODIMENTS

Before a detailed description of the embodiments starting with Fig. 1 is given, general explanations are made.

As mentioned in the outset, known time-of-flight (ToF) sensors are typically based on silicon tech- nology.

However, it has been recognized that silicon-based semiconductors may only be suitable for optical sensing when light with a wavelength up to roughly a thousand nanometers (SWIR (short wave- length infrared) is used since the material may become transparent for higher wavelengths.

As also mentioned in the outset, ToF measurements are typically carried out in the infrared wave- length range, such that it is desirable to provide ToF for higher wavelengths since a measurement accuracy may increase due to less ambient light (or radiation) in such wavelength ranges.

It has been recognized that III-V materials, such as InGaAs, may have light absorption properties which make them suitable to be used for imaging (or optical sensing) with a wavelength of up to roughly one-thousand seven-hundred nanometers (or more).

However, transferring silicon based iToF technology to III-V materials (e.g. CAPD, gate-type, etc.) may be difficult and/ or costly because processing options (e.g. diffusion, ion implantation, etc.) for III-V materials may be more limited than those for silicon. Furthermore, available device options may be limited and/ or may require significant research and development to optimize (e.g. with re- spect to device isolation, low leakage, MOS (metal oxide semiconductor) gates, or the like) to achieve a performance similar to silicon-based technology.

Therefore, some embodiments pertain to time-of-flight demodulation circuitry, configured to: apply a first demodulation voltage to a first diffusion region in a III-V semiconductor material; apply a second demodulation voltage to a second diffusion region in the III-V semiconductor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are present in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage, or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than the second demodulation voltage.

Circuitry may pertain to any entity or multitude of entities, which is adapted to control electric sig- nals, such as a CPU (central processing unit), FPGA (field-programmable gate array), microcontrol- ler, IC (integrated circuit), or the like.

A III-V semiconductor material may include (but is not limited to) elements of the third and fifth main group of the periodic table. The present disclosure is not limited to any element or any number of different elements which are used in a III-V semiconductor material. For example, the semicon- ductor material may include or be based on Indium (In), Gallium (Ga), and Arsenic (As). For exam- ple, a III-V semiconductor may be based on InGaAs (indium gallium arsenide).

However, as mentioned above, the present disclosure is not limited to any specific III-V semicon- ductor material. Hence, materials which are used may be based on any phosphide, arsenide, anti- monide, or the like, such as GaN (gallium nitride), AIN (aluminum nitride), InN (indium nitride),

BN (boron nitride), GaP (gallium phosphide), AlP (aluminum phosphide), InP (indium phosphide), InGaP (indium gallium phosphide), BP (boron phosphide), GaAs (gallium arsenide), AlAs (alumi- num arsenide), InAs (indium arsenide), BAs (boron arsenide), GaSb (gallium antimonide), AlSb (alu- minum antimoide), InSb (indium antimonide), or the like.

The first and the second diffusion regions may be based on diffusion terminals, which may be con- nectable to circuitry (e.g. readout circuitry, such as an ROIC (read-out integrated circuit)) and which may be provided into the III-V semiconductor material based on a doping of the III-V semiconduc- tor material.

Hence, the first and the second diffusion regions may be adapted such that a voltage can be applied to them.

For example, the III-V semiconductor material may correspond to an undoped substrate with a pre- determined concentration of electric carriers (to which it is referred to as n/i (n-type/ intrinsic) sub- strate, in some embodiments). The first diffusion region may then correspond to a region which is p+ (p-type) doped. The second diffusion region may also be a p+ doped region, however, generally, the first and the second diffusion regions may be doped differently. The III-V semiconductor material may further be doped in another region than the first and the sec- ond diffusion regions, and a doping may be different. Electric carriers (e.g. electron-hole-pairs) may be generated inside the semiconductor in response to light being incident on an illumination region, to which it may be referred to as light sensitive region.

The light sensitive region may be n+ doped without limiting the present disclosure in that regard. The incident light may be provided on any surface of the III-V semiconductor material (substrate), such as a back-surface (e.g. the opposite surface than the surface in which the diffusion regions are provided) or the front-surface (e.g. the same surface as the diffusion regions).

The doping may depend on what should be collected and measured. In the case of a collection and measurement of electrons as electric carriers, the diffusion regions may be n+ doped, whereas in the case of holes as electric carriers, the diffusion regions may be p+ doped.

However, the present disclosure is also not limited to the case that the diffusion regions are pro- vided in the same surface as they may be provided on opposite surfaces as well.

As discussed above, it may be possible to apply a voltage to the first and the second diffusion re- gions (i.e. at least to one of them). The voltage may be based on a demodulation signal, as it is gener- ally known in the field of time-of-flight, such that an unnecessary description thereof is omitted.

However, it should be pointed out that according to the present disclosure, different voltages may be applied to the first and the second diffusion regions, i.e. a first demodulation voltage may be ap- plied to the first diffusion region and a second demodulation voltage may be applied to the second diffusion region.

Generally, in order for the first depletion region to be larger than the second depletion region, the first demodulation voltage may be chosen to be larger than the second demodulation voltage. How- ever, the present disclosure is not limited to this case since the first demodulation voltage may be smaller than the second demodulation voltage, but a structure of respective diffusion regions to which the first and the second demodulation voltages is applied may be different, such that the first demodulation voltage may cause a larger depletion region.

The first and the second demodulation voltages may be based on the same demodulation signal, but the first demodulation voltage may have a different phase than the second demodulation voltage (in the case of alternating voltages). However, the first demodulation voltage may be based on a different demodulation signal than the second demodulation voltage. For example, the first demodulation voltage may be a constant volt- age and the second demodulation voltage may be an alternating voltage, such as based on a sine/ co- sine-function, a rectangular function, a triangular function, or the like.

Based on the applied demodulation voltages, the electric carriers (or charges), which are generated in the III-V semiconductor material, may be pulled towards either the first or the second diffusion re- gion depending on the relative values of the first and the second demodulation voltages.

For example, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage, the electric carriers may be pulled towards the second demodulation region or vice versa.

Furthermore, a third voltage, which may be a reference voltage being applied to the substrate may be considered. The reference voltage may be different than the first and the second demodulation voltages, such that a potential gradient from the substrate to the diffusion regions is generated, such that the electric carriers are pulled towards the respective diffusion regions. However, this is not necessary in each embodiment.

According to the present disclosure, a modulated depletion pixel may be provided including diffu- sion regions, such that depletion regions may be controlled individually via applied electric signals.

The pixel may be based on a photodiode, for example.

However, the present disclosure is not limited to the case of a photodiode and the operation princi- ple of ToF demodulation circuitry with other devices is similar and lies in the discretion of the per- son skilled in the art. Furthermore, any type of photodiode may be envisaged, such as partially pinned or fully pinned, photo gates, or the like, or a combination.

In some embodiments, the first diffusion region is or includes a detection terminal and the second diffusion region is or includes a dump terminal.

The detection terminal may be connected to a ToF detection circuit, as it is generally known, and the dump terminal may be connected to a mix circuit, as it is generally known.

The detection circuit and the mix circuit may further be interconnected.

In some embodiments, the first diffusion region and the second diffusion region are provided in a predetermined pattern.

The regions may be coherent/integral or may be based on multiple sub-regions and the regions may be purely defined via the respective demodulation voltages. For example, each region in the III-V semiconductor material to which the first demodulation voltage is applied may correspond to the first diffusion region and each region to which the second demodulation voltage is applied may cor- respond to the second diffusion region.

For example, the pattern may be a maze-like structure (which may be regular or irregular) defined by the first and the second diffusion regions. For example, from a top-view of a backside of a ToF por- tion according to the present disclosure (which will be described further below), the first and the second diffusion regions may be provided as lengthy rectangles, wherein elements of the first diffu- sion region may be connected to each other (thereby providing coherent “walls” into the substrate) and elements of the second diffusion regions may be connected to each other (thereby providing other coherent “walls” into the substrate), but the first diffusion region and the second diffusion re- gion may not be connected. The first and second diffusion regions may be isolated from each other (e.g. with an isolation layer between the “walls”) or between the first and second diffusion regions, only the substrate may be present. In the maze-picture given above, the isolation or the substrate may correspond to a corridor of the maze.

In some embodiments, at least one of the first and the second diffusion regions may include multi- ple sub-regions (diffusion elements) which are not interconnected in the III-V semiconductor mate- rial. For example each sub-region may have a roughly rectangular shape of a surface, wherein the first diffusion region may include one (rectangular) doping region which may be surrounded by eight (or less or more) second diffusion sub-regions (which may also be rectangular doping regions).

In some embodiments, first and second diffusion sub-regions may be provided in an alternating or- der, thereby providing a checkerboard pattern. For example, first and second diffusion elements (or sub-regions) may be rectangular (or cuboid) doping regions extending into the substrate (from a top- view of the side which is doped, a rectangle may be seen). Hence, next to each dump region, a detec- tor region may be provided in a first direction and in a second direction which is orthogonal to the first direction, thereby providing a checkerboard pattern.

In some embodiments, a first diffusion region may be surrounded by an integral/ coherent (as dis- cussed above) second diffusion region.

Hence, in some embodiments the first diffusion region is surrounded by the second diffusion region or vice versa.

In some embodiments, the first diffusion region includes a plurality of first type diffusion elements, and the second diffusion region includes a plurality of second type diffusion regions or elements, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order, as discussed herein. In some embodiments, the first and the second diffusion regions are based on a p+ doping of the III-V semiconductor material, as discussed herein.

In some embodiments, a volume of the first or the second diffusion region is larger than a volume of the respective other diffusion region. For example, the diffusion regions may be three dimen- sional (wherein a volume may also refer to an area). As discussed above, the diffusion regions may extend into the substrate. Hence, different structures (and not only cuboids as in the example given above) may be envisaged, such as a trench structure, a (partly) globe structure, a cuboid with rounded edges, or the like. The first and the second diffusion regions may have the same or differ- ent structure. For example, both structures may be based on trenches, but with different shapes and volumes.

For example, the first/ second diffusion region may be of the same or a similar depth and/or struc- ture, or the first/ second diffusion region may extend deeper into the substrate than the respective other one.

Hence, according to the present disclosure, depletion regions may depend on a volume or size of the diffusion regions such that the depletion regions may be differendy large according to the volumes of the respective diffusion regions.

Generally, in some embodiments, a volume of the first or the second diffusion region or both is in- creased (compared to known diffusion regions) by means of implementing a trench structure, as dis- cussed herein.

In some embodiments, at least one of the first and the second demodulation voltages is based on an time-varying function, as discussed herein, such that, for example, the first/ second demodulation voltage oscillates in accordance with an oscillating function, or the like.

In some embodiments, one of the first and the second demodulation voltages is based on a constant function, as discussed herein, such that, for example, the first/ second demodulation voltage follows the constant function.

In some embodiments, at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is generated with respect to at least one of the first and the second diffusion regions.

The predetermined electric field may depend on a shape of the diffusion region or a pattern of the diffusion elements (which were discussed above). Thereby, it can be controlled how the charges are being pulled towards the respective diffusion elements and how many charges are pulled. For exam- pie, it may be desirable to completely drain the substrate of loose (or freely moveable) charges be- fore a ToF measurement is performed or before electric carriers are expected to be generated in re- sponse to modulated ToF light. H ence, the electric field which is applied in some embodiments may be adapted to drain the substrate (or at least a predetermined part of the substrate) of charges.

Furthermore, if a dump region/ terminal has a predetermined size, it may be possible that multiple detection terminals are provided for one dump terminal.

Some embodiments pertain to a time-of-flight demodulation method, including: applying a first de- modulation voltage to a first diffusion region in a III-V semiconductor material; applying a second demodulation voltage to a second diffusion region in the III-V semiconductor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that elec- tric carriers which are present in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element, if the first de- modulation voltage is such that it creates a wider depletion region than that of the second demodu- lation voltage, or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage, as discussed herein.

The time-of-flight demodulation method may be carried out with time-of-flight demodulation cir- cuitry according to the present disclosure.

In some embodiments, the first diffusion region includes a detection terminal and wherein the sec- ond diffusion region includes a dump terminal, as discussed herein. In some embodiments, the first diffusion region and the second diffusion region are provided in a predetermined pattern, as dis- cussed herein. In some embodiments, the first diffusion region is surrounded by the second diffu- sion region, as discussed herein. In some embodiments, the first diffusion region includes a plurality of first type diffusion elements, and the second diffusion region includes a plurality of second type diffusion regions, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order, as discussed herein. In some embodiments, the first and the second diffusion regions are based on a p+ doping of the III-V semiconductor material, as dis- cussed herein. In some embodiments, a volume of the first or the second diffusion region is larger than a volume of the respective other diffusion region, as discussed herein. In some embodiments, at least one of the first and the second demodulation voltages is based on a time-varying function, as discussed herein. In some embodiments, one of the first and the second demodulation voltages is based on a constant function, as discussed herein. In some embodiments, at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is generated with respect to at least one of the first and the second diffusion region, as discussed herein.

The methods as described herein are also implemented in some embodiments as a computer pro- gram causing a computer and/ or a processor to perform the method, when being carried out on the computer and / or processor. In some embodiments, also a non-transitory computer-readable record- ing medium is provided that stores therein a computer program product, which, when executed by a processor, such as the processor described above, causes the methods described herein to be per- formed.

Some embodiments pertain to a time-of-flight portion including: a III-V semiconductor material in- cluding a first and a second diffusion region, wherein charges which are present in the III-V semi- conductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element in response to a first demodulation voltage being applied to the first diffusion element being such that it creates a wider depletion region than that of a second demodulation voltage being applied to the second diffusion element, or towards the second diffu- sion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage, as discussed herein.

The time-of-flight portion may be coupled or may include ToF demodulation circuitry according to the present disclosure.

In some embodiments, the first diffusion region includes a detection terminal and wherein the sec- ond diffusion region includes a dump terminal, as discussed herein. In some embodiments, the first diffusion region and the second diffusion region are provided in a predetermined pattern, as dis- cussed herein. In some embodiments, the first diffusion region is surrounded by the second diffu- sion region, as discussed herein. In some embodiments, the first diffusion region includes a plurality of first type diffusion elements, and wherein the second diffusion region includes a plurality of sec- ond type diffusion regions, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order, as discussed herein. In some embodiments, the first and the second diffusion regions are based on a p+ doping of the III-V semiconductor material, as discussed herein. In some embodiments, a volume of the first or the second diffusion region is larger than a volume of the respective other diffusion region, as discussed herein. In some embodi- ments, at least one of the first and the second demodulation voltages is based on a time-varying function, as discussed herein. In some embodiments, one of the first and the second demodulation voltages is based on a constant function, as discussed herein. In some embodiments, at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is generated with respect to at least one of the first and the second diffusion region.

Returning to Fig. 1, there is schematically illustrated a ToF portion 1 according to the present disclo- sure which is coupled to ToF demodulation circuitry 2 according to the present disclosure.

The ToF portion 1 includes a substrate 2 including InGaAs, a region 3 which is an n+ doped region of the substrate 2, a first diffusion region 4 (also referred to as detection terminal, in this embodi- ment), a second diffusion region 5 (also referred to as dump terminal, in this embodiment), and a backside terminal 6. The first and second diffusion regions 4 and 5 are implemented based on a p+ doping of the substrate 2.

An electric field 7 around the first diffusion region 4 and an electric field 8 around the second diffu- sion region 5 are depicted for illustrational purposes. The electric fields 7 and 8 emerge when a volt- age is applied to the respective diffusion region 4 or 5.

Generally, the concepts of the present disclosure are applicable to any number of first and second diffusion regions and for simplicity, in this embodiment, only one first diffusion region 4 and one second diffusion region 5 is depicted. However, in the case of an image sensor, multiple ToF por- tions and ToF demodulation circuitry may be envisaged.

If the light-sensitive region 3 is illuminated with light of a predetermined wavelength, electron-hole pairs are generated in the substrate 2 (via photo-electric effect). The generated electrons are collected by the backside terminal 6, whereas the generated holes are collected selectively by the diffusion re- gions 4 and 5, depending on the (bias) voltages applied to each of the diffusion regions 4 and 5.

By lowering the voltage of the second diffusion region 5 (i.e. the dump terminal), the electric field 8 extends (wherein the electric fields are also referred to as depletion regions) and thereby the holes preferentially go towards the dump terminal 5 rather than the detector terminal 4 due to the electric field 8.

It is generally known that such processes may be based on statistical distributions (since they are quantum effects), such that “preferentially” refers to a probability with which the holes are pulled towards the respective terminal 4 or 5, wherein the probability may depend on the demodulation voltage and the electric field (and the shape of the respective terminal).

Conversely, biasing the dump terminal 5 to a higher voltage than the detector terminal 4, the deple- tion region 8 (electric field) of the dump terminal 5 is decreased, such that the holes preferentially flow towards the detector terminal. Above, the case is described that die voltage of the dump terminal 5 is controlled. However, it is also possible to modulate the voltage of the detector terminal 4 accordingly. In this embodiment, an alternating signal is applied to the dump terminal which has a predetermined phase-shift with re- spect to an emitted reference light signal (from a modulated light source used for carrying out an iToF measurement, as it is generally known).

For applying a voltage and thereby generating an electric field, the ToF portion 1 is coupled to the ToF demodulation circuitry 2 via the first and second diffusion regions 4 and 5 by means of corre- sponding connectors 9 and 10.

The connector 9 couples the first diffusion region 4 to a detector circuit 11 (short: DET) (or readout circuit) in the ToF demodulation circuitry and the connector 10 couples the second diffusion region 5 to a mixer circuit 12 (short: MIX) (or driver circuit), which are configured to apply respective de- modulation voltages to the respective diffusion regions 4 or 5, as discussed herein.

DET 11 is further connected to readout circuitry (via additional circuitry 13) (the readout circuitry not being depicted) and to a terminal of MIX 12 (in parallel to the connection to the readout cir- cuitry). Furthermore, MIX 12 (in particular the terminal of MIX 12 which is interconnected with DET 11) is connected to a dump circuitry via further additional circuitry 14. DET 11 and MIX 12 can be biased independently, such that different demodulation voltages can be applied to them.

A dashed line surrounding DET 11 and MIX 12 as well as the additional circuitry 13 indicates a unit cell on a circuit wafer. Thus, the detector and dump driver circuits 11 and 12 are assumed to be on a separate semiconductor wafer. However, in some embodiments, they are be provided on the same wafer as the ToF portion.

The signal which is collected by the detector terminal 4 is read out in DET 11 with known readout techniques.

As indicated above, the ToF portion may be illuminated from a back-side or a front side. In this em- bodiment, the ToF portion 1 is illuminated on the back-side, but the present disclosure is not lim- ited to that case. Furthermore, the backside terminal 6 can also be implemented from the frontside (thereby providing a frontside terminal).

As generally known, but not depicted, additional optical elements may be provided, such as one or more micro-lenses, ARC(s) (anti-reflective coating(s)), QE-improvement (QE: quantum efficiency) structure(s), and the like.

In summary, Fig. 1 depicts a photodiode-based implementation of the present disclosure for de- scribing an operation of a ToF portion (also referred to as modulated depletion pixel) according to the present disclosure. However, as mentioned above, the present disclosure is not limited to the case of a photodiode.

In Fig. 1, the pixel collects holes, however, as discussed above, electrons may be collected in some embodiments. In this case, the polarities of the doping regions may be swapped, i.e. the diffusion regions may be n+ doped and the substrate region may be p+ doped. If the polarity of the ToF por- tion is different, bias voltages applied to the readout circuit and the driver circuit may be adapted ac- cordingly.

The further explanation of embodiments is given with respect to the alternative of collecting holes (i.e. the diffusion regions which are depicted are p+ doped). However, the case of collecting elec- trons is envisaged in the present disclosure, as well.

Fig. 2 depicts a layout 20 of diffusion regions (also referred to as diffusion pattern) according to the present disclosure, i.e. doping regions on a substrate are depicted in a top view of a doped side of a ToF portion.

The doping regions have a maze-like structure, as discussed herein, including a first diffusion region 21 serving as a detector terminal and a second diffusion region 22 (indicated with a dashed line) serving as a dump terminal, as discussed herein. The dashed line 22 further indicates the top view of the pixel border. In this embodiment, the pixel has a width and a height of ten micrometers each.

As can be taken from Fig. 2, in this embodiment, the first and second diffusion regions 21 and 22 are each an integral region and the second diffusion region 22 surrounds the first diffusion region 21. The first and second diffusion regions extend regularly into the substrate (not depicted)

In this embodiment, an additional n-type layer is used on the front-side (on which the diffusion re- gions 21 and 22 are provided) to achieve a better isolation between the diffusion regions 21 and 22. The additional n-type layer can be contacted and biased to provide isolation and improve a band- width, but the present disclosure is not limited in that regard.

Fig. 3 depicts, in a side-view, a further embodiment of a ToF portion 30 including an InGaAs sub- strate 31, a substrate region 32 (which is an n+ doped region of the substrate 31) and a plurality of diffusion regions 33 (which are based on a p+ doping of the substrate 31), wherein the plurality of diffusion regions 33 are arranged side by side.

Fig. 4 depicts a plurality of different diffusion region patterns 40 according to the present disclosure in a top view, wherein detector terminals are surrounded by dump terminals. A surface of the detec- tor terminals is generally smaller than the surface of dump terminals, but the present disclosure is not limited in that regard. In total, fourteen different layouts are shown next to each other. The implementations of Fig. 4 may be suitable for improving a contrast, bandwidth, isolation, or the like. Furthermore, shared diffusion nodes are provided between pixels (each pixel is defined based on one detector terminal) to provide fill-factor and pixel scalability. These diffusions between the pixels do not have to be shared. For example, to support IQ mosaicking, it would be beneficial to keep dump diffusion nodes from neighboring pixels separate, without limiting the present disclosure in that regard.

Fig. 5 depicts two further embodiments of diffusion region patterns by means of diffusion region grids in a top view, wherein for simplicity, only the diffusion regions are shown, wherein the diffu- sion regions include a plurality of diffusion region elements which are not connected to each other.

On the left, diffusion region grid 50 is shown, depicting an array of 3x3 unit pixels. The center unit pixel is indicated by a dashed box. Each unit pixel includes three diffusion regions or elements 51: one diffusion in a center which acts as detector, two diffusion regions on the sides which act as dumps. In this embodiment, the dump diffusions are shared by their horizontal neighbors.

Diffusion region grid 55 on the right also depicts an array of 3x3 unit pixels. The center unit pixel is indicated by a dashed box. Each unit pixel includes five diffusion regions or elements 56: one diffu- sion region in a center which acts as a detector, and one dump diffusion region on each pixel bound- ary.

Compared to the diffusion grid 50, this layout is more complex, but achieves a higher modulation contrast due to electrical fields being created in both directions (horizontally and vertically), instead of only horizontally as in the diffusion grid 50.

Fig. 6 schematically illustrates three further embodiments of diffusion region patterns in a top view.

The top-left diffusion region pattern 60 has a grid structure based on a three times three grid, wherein each grid point is a corresponding diffusion region element and wherein the grid points are provided as separate diffusion elements which are not connected to each other. The pattern 60 has eight dump terminals Du surrounding a detector terminal De which is arranged in the middle of the dump terminal Du. The present disclosure is not limited to 3 x 3 and may be adapted to N x N grid according to the circumstances.

The top-right diffusion region pattern 63 is also based on a three times three grid, wherein detector terminals De and dump terminals Du are arranged in an alternating order, that is De Du De in the first row, Du De Du in the second row, and De Du De in the third row. As indicated above, the present disclosure is not limited to 3 x 3 and may be adapted accordingly to an N x N grid. On the bottom, diffusion pattern 66 is shown, which is similar to the pattern 60, but is not arranged in a grid. Instead, an integral dump terminal Du is provided, which surrounds a detector terminal De. The basic structure of the terminals is rectangular, but between the detector terminal De and Du, an n-type layer is provided which isolates the two terminals.

The embodiments of Fig. 6 provide different contrast, bandwidth, and isolation purposes and diffu- sion elements can generally have different sizes, spacing and/or fill factors, but the elements do not necessarily need to have an identical bias or shape (as shown with the dump ring surrounding the detector of diffusion pattern 66).

Fig. 7 depicts a schematic diagram of a further embodiment of a ToF portion 70 (in a side view of), which is different than the ToF portion 1 of Fig. 1 in that a structure, and thereby the volume, of a same perspective as in Fig. 1.

The dump terminal 71 is provided, such that it can generate an electric field 73, which can influence one or more detector terminals 72 (wherein the multiple detector terminals are not depicted and not necessarily part of the same pixel, but may be on the right of the dump terminal 71 in this diagram, which is indicated by an electric field 74).

Hence, in the ToF portion 70, different junction profiles are utilized for the different terminals. The different junction profiles can be manufactured by using different masks and processing, for exam- ple, and may be suitable to improve contrast and/ or bandwidth, if desired. Generally, by providing diffusion regions with independent size and/ or bias and/ or junction profiles, the electric field of pixels can be influenced and thereby a bandwidth of the pixels.

The remaining parts of Fig. 7 correspond to those described under reference of Fig. 1, such that a repetitive description thereof is omitted.

The profile of the dump terminal 71 is also called a trench. This profile may also be applied to the detector terminal 71, in some embodiment, or only to one of the two terminals.

Furthermore, different trench depth and layout patterns may be considered for the detector and dump terminals, depending on how the electric fields should be implemented, wherein a desired contrast and a desired speed may be considered. In such embodiments, p+ doping regions may be implemented, for example, via patterned diffusion following a trench etch module.

Moreover, trench regions may be implemented per pixel or may be implemented as stripes or other shapes and/ or may be shared between different pixels. Fig. 8 depicts a further side-view of the ToF portion 70, thereby further showing a size difference of the dump terminal 71 and the detector terminal 72, which are displayed on the bottom of Fig. 8 (which is a frontside of the ToF portion and which is on an opposite side than an illuminated back- side region).

In Fig. 9, a further embodiment of ToF demodulation circuitry 80 is shown. The elements which are not described in the following have already been described under reference of Fig. 1 to which it is referred to hereby and a repetitive description is omitted.

In Figs. 1 and 7, one-tap operation has been described. However, the present disclosure is also ap- plicable to two-tap (or more) operation.

Accordingly, the ToF demodulation circuitry 80 of Fig. 9 includes a further connection and a further additional circuitry 81 at DUMP 12 from which charges can be read out, as well, such that a two-tap operation is possible.

However, other implementations of two-tap operation may also be envisaged. For example, DET 11 and MIX 12 may be combined with each other on the same PFE (pixel front-end) circuit. For exam- ple, a capacitive transimpedance amplifier based integrator with capacitively coupled mix clocks could perform both the mixing and charge collection functions.

In Fig. 10, a timing diagram 90 is depicted showing VDUMP which is a demodulation voltage which is applied to a dump terminal and VDET which is a demodulation voltage which is applied to a de- tector terminal. Potential differences between VDUMP and VDET are called Vpush and Vpull, wherein Vpush is the potential difference, if VDUMP is higher than VDET and Vpull is the poten- tial difference when VDUMP is lower than VDET.

At Vpush, electric carriers are “pushed” away from the dump terminal, such that they are pulled to- wards the detector terminal. At Vpull, electric carriers are “pulled” towards the dump terminal.

For simplicity, Vpush and Vpull are depicted equal to each other, but the present disclosure is not limited to this case. The voltages are also not limited to any sign or polarity, such as positive or nega- tive and may depend on the polarity of the electric carriers. For example, voltages may include or be based on an alternating voltage, such as based on a sine/ cosine-function, a rectangular function, a triangular function, or the like.

Furthermore, a backside voltage VBS is depicted which is higher than VDUMP and VDET, scuh

Fig. 11 depicts a timing diagram 100 in the case of two detector terminals. Hence, a first demodula- tion voltage VDETl is applied to a first detector terminal and a second demodulation voltage VDET2 is applied to a second detector terminal. The voltages VDET1 and VDET2 are based on sine-functions which are phase-shifted with respect to each other. As indicated herein, voltages may be an alternating voltage, such as based on a sine/ cosine-function, a rectangular function, a triangu- lar function, or the like.

Furthermore, a backside voltage VBS is displayed which is higher than VDET1 and VDET2.

Fig. 12 depicts, in a block diagram, an embodiment of a ToF demodulation method 110 according to the present disclosure.

At 111, a first demodulation voltage is applied to a first diffusion region in a III-V semiconductor material, as discussed herein. In particular, a constant bias is applied to a detector terminal.

At 112, a second demodulation voltage is applied to a second diffusion region in the III-V semicon- ductor material, as discussed herein. In particular, an oscillating (as an embodiment of time-varying) voltage is applied to a dump terminal.

The first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are generated in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element, if the first demodulation voltage is such that it creates a wider depletion region than that of the second de- modulation voltage or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage, as dis- cussed herein.

Referring to Fig. 13, there is illustrated an embodiment of a time-of-flight (ToF) imaging apparatus 120, which can be used for depth sensing or providing a distance measurement, in particular for the technology as discussed herein, wherein the ToF imaging apparatus 120 is configured as an iToF camera. The ToF imaging apparatus 120 has image sensor circuitry 127, which is configured to carry out a iToF depth measurement and which forms a control of the ToF imaging apparatus 120 (and it includes, not shown, corresponding processors, memory and storage, as it is generally known to the skilled person).

The ToF imaging apparatus 120 has a modulated light source 121 and it includes light emitting ele- ments (based on laser diodes), wherein in the present embodiment, the light emitting elements are narrow band laser elements.

The light source 121 emits light, i.e. modulated light, as discussed herein, to a scene 122 (region of interest or object), which reflects the light. The reflected light is focused by an optical stack 123 to a light detector 124. The light detector 124 is implemented based on multiple ToF portions according to the present dis- closure, and based on a micro lens array 126 which focuses the light reflected from the scene 121 to an imaging portion 125 (to each pixel of the image sensor circuitry 127).

The light emission time and modulation information is fed to the image sensor circuitry or control 127 including a time-of-flight measurement unit 128 (which includes time-of-flight demodulation circuitry according to the present disclosure), which also receives respective information from the imaging portion 125, when the light is detected which is reflected from the scene 122. On the basis of the modulated light received from the light source 121, the time-of-flight measurement unit 128 computes a phase shift of the received modulated light which has been emitted from the light source 121 and reflected by the scene 122 and on the basis thereon it computes a distance d (depth infor- mation) between the imaging portion 125 and the scene 122.

The depth information is fed from the time-of-flight measurement unit 128 to a 3D image recon- struction unit 129 of the image sensor circuitry 127, which reconstructs (generates) a 3D image of the scene 122.

It should be recognized that the embodiments describe methods with an exemplary ordering of method steps. The specific ordering of method steps is however given for illustrative purposes only and should not be construed as binding. For example, the ordering of 111 and 112 in the embodi- ment of Fig. 12 may be exchanged.

Please note that the division of the control 127 into units 128 and 129 is only made for illustration purposes and that the present disclosure is not limited to any specific division of functions in spe- cific units. For instance, the control 127 could be implemented by a respective programmed proces- sor, field programmable gate array (FPGA) and the like.

All units and entities described in this specification and claimed in the appended claims can, if not stated otherwise, be implemented as integrated circuit logic, for example on a chip, and functionality provided by such units and entities can, if not stated otherwise, be implemented by software.

In so far as the embodiments of the disclosure described above are implemented, at least in part, us- ing software-controlled data processing apparatus, it will be appreciated that a computer program providing such software control and a transmission, storage or other medium by which such a com- puter program is provided are envisaged as aspects of the present disclosure.

Note that the present technology can also be configured as described below.

(1) Time-of-flight demodulation circuitry, configured to: apply a first demodulation voltage to a first diffusion region in a III-V semiconductor mate- rial; apply a second demodulation voltage to a second diffusion region in the III-V semiconduc- tor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are present in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage.

(2) The time-of-flight demodulation circuitry of (1), wherein the first diffusion region includes a detection terminal and wherein the second diffusion region includes a dump terminal.

(3) The time-of-flight demodulation circuitry of (1) or (2), wherein the first diffusion region and the second diffusion region are provided in a predetermined pattern. (4) The time-of-flight demodulation circuitry of anyone of (1) to (3), wherein the first diffusion region is surrounded by the second diffusion region.

(5) The time-of-flight demodulation circuitry of anyone of (1) to (4), wherein the first diffusion region includes a plurality of first type diffusion elements, and wherein the second diffusion region includes a plurality of second type diffusion regions, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order.

(6) The time-of-flight demodulation circuitry of anyone of (1) to (5), wherein the first and the second diffusion regions are based on a p+ doping of the III-V semiconductor material.

(7) The time-of-flight demodulation circuitry of anyone of (1) to (6), wherein a volume of the first or the second diffusion region is larger than a volume of the respective other diffusion region. (8) The time-of-flight demodulation circuitry of anyone of (1) to (7), wherein at least one of the first and the second demodulation voltages is based on a time-varying function.

(9) The time-of-flight demodulation circuitry of anyone of (1) to (8), wherein one of the first and the second demodulation voltages is based on a constant function.

(10) The time-of-flight demodulation circuitry of anyone of (1) to (9), wherein at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is gen- erated with respect to at least one of the first and the second diffusion region.

(11) A time-of-flight demodulation method, comprising: applying a first demodulation voltage to a first diffusion region in a III-V semiconductor ma- terial; applying a second demodulation voltage to a second diffusion region in the III-V semicon- ductor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are present in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage.

(12) The time-of-flight demodulation method of (11), wherein the first diffusion region includes a detection terminal and wherein the second diffusion region includes a dump terminal.

(13) The time-of-flight demodulation method of (11) or (12), wherein the first diffusion region and the second diffusion region are provided in a predetermined pattern. (14) The time-of-flight demodulation method of anyone of (11) to (13), wherein the first diffu- sion region is surrounded by the second diffusion region.

(15) The time-of-flight demodulation method of anyone of (11) to (14), wherein the first diffu- sion region includes a plurality of first type diffusion elements, and wherein the second diffusion re- gion includes a plurality of second type diffusion regions, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order.

(16) The time-of-flight demodulation method of anyone of (11) to (15), wherein the first and the second diffusion regions are based on a p+ doping of the III-V semiconductor material.

(17) The time-of-flight demodulation method of anyone of (11) to (16), wherein a volume of the first or the second diffusion region is larger than a volume of the respective other diffusion region. (18) The time-of-flight demodulation method of anyone of (11) to (17), wherein at least one of the first and the second demodulation voltages is based on a time-varying function.

(19) The time-of-flight demodulation method of anyone of (11) to (18), wherein one of the first and the second demodulation voltages is based on a constant function.

(20) The time-of-flight demodulation method of anyone of (11) to (19), wherein at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is generated with respect to at least one of the first and the second diffusion region. (21) A computer program comprising program code causing a computer to perform the method according to anyone of (11) to (20), when being carried out on a computer,

(22) A non-transitory computer-readable recording medium that stores therein a computer pro- gram product, which, when executed by a processor, causes the method according to anyone of (11) to (20) to be performed.

(23) A time-of-flight portion comprising: a III-V semiconductor material including a first and a second diffusion region, wherein charges which are present in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion element in response to a first demodulation voltage being applied to the first diffusion element being such that it creates a wider depletion region than that of a second demodulation voltage being applied to the second diffusion element, or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation voltage.

(24) The time-of-flight portion of (23), wherein the first diffusion region includes a detection ter- minal and wherein the second diffusion region includes a dump terminal.

(25) The time-of-flight portion of (23) or (24), wherein the first diffusion region and the second diffusion region are provided in a predetermined pattern.

(26) The time-of-flight portion of anyone of (23) to (25), wherein the first diffusion region is sur- rounded by the second diffusion region. (27) The time-of-flight portion of anyone of (23) to (26), wherein the first diffusion region in- cludes a plurality of first type diffusion elements, and wherein the second diffusion region includes a plurality of second type diffusion regions, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order.

(28) The time-of-flight portion of anyone of (23) to (27), wherein the first and the second diffu- sion regions are based on a p+ doping of the III-V semiconductor material.

(29) The time-of-flight portion of anyone of (23) to (28), wherein a volume of the first or the sec- ond diffusion region is larger than a volume of the respective other diffusion region.

(30) The time-of-flight portion of anyone of (23) to (29), wherein at least one of the first and the second demodulation voltages is based on a time-varying function. (31) The time-of-flight portion of anyone of (23) to (30), wherein one of the first and the second demodulation voltages is based on a constant function. (32) The time-of-flight demodulation circuitry of anyone of (23) to (31), wherein at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is generated with respect to at least one of the first and the second diffusion region.

Claims

1. Time-of- flight demodulation circuitry, configured to: apply a first demodulation voltage to a first diffusion region in a III-V semiconductor mate- rial; apply a second demodulation voltage to a second diffusion region in the III-V semiconduc- tor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are generated in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion ele- ment, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage, or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation volt- age.

2. The time-of-flight demodulation circuitry of claim 1, wherein the first diffusion region in- cludes a detection terminal and wherein the second diffusion region includes a dump terminal.

3. The time-of-flight demodulation circuitry of claim 1, wherein the first diffusion region and the second diffusion region are provided in a predetermined pattern.

4. The time-of-flight demodulation circuitry of claim 1, wherein the first diffusion region is sur- rounded by the second diffusion region.

5. The time-of-flight demodulation circuitry of claim 1, wherein the first diffusion region in- cludes a plurality of first type diffusion elements, and wherein the second diffusion region includes a plurality of second type diffusion regions, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order.

6. The time-of-flight demodulation circuitry of claim 1, wherein the first and the second diffu- sion regions are based on a p+ doping of the III-V semiconductor material.

7. The time-of-flight demodulation circuitry of claim 1, wherein a volume of the first or the second diffusion region is larger than a volume of the respective other diffusion region.

8. The time-of-flight demodulation circuitry of claim 1, wherein at least one of the first and the second demodulation voltages is based on a time-varying function.

9. The time-of-flight demodulation circuitry of claim 1, wherein one of the first and the second demodulation voltages is based on a constant function.

10. The time-of-flight demodulation circuitry of claim 1, wherein at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is generated with respect to at least one of the first and the second diffusion region.

11. A time-of-flight demodulation method, comprising: applying a first demodulation voltage to a first diffusion region in a III-V semiconductor ma- terial; applying a second demodulation voltage to a second diffusion region in the III-V semicon- ductor material, wherein the first demodulation voltage is applied with respect to the second demodulation voltage such that electric carriers which are generated in the III-V semiconductor material in response to light being incident on the III-V semiconductor material are pulled towards the first diffusion ele- ment, if the first demodulation voltage is such that it creates a wider depletion region than that of the second demodulation voltage, or towards the second diffusion element, if the first demodulation voltage is such that it creates a narrower depletion region than that of the second demodulation volt- age.

12. The time-of-flight demodulation method of claim 11, wherein the first diffusion region in- cludes a detection terminal and wherein the second diffusion region includes a dump terminal.

13. The time-of-flight demodulation method of claim 11, wherein the first diffusion region and the second diffusion region are provided in a predetermined pattern.

14. The time-of-flight demodulation method of claim 11, wherein the first diffusion region is surrounded by the second diffusion region.

15. The time-of-flight demodulation method of claim 11, wherein the first diffusion region in- cludes a plurality of first type diffusion elements, and wherein the second diffusion region includes a plurality of second type diffusion regions, wherein the first type diffusion elements and the second type diffusion elements are provided in an alternating order.

16. The time-of-flight demodulation method of claim 11, wherein the first and the second diffu- sion regions are based on a p+ doping of the III-V semiconductor material.

17. The time-of-flight demodulation method of claim 11, wherein a volume of the first or the second diffusion region is larger than a volume of the respective other diffusion region.

18. The time-of-flight demodulation method of claim 11, wherein at least one of the first and the second demodulation voltages is based on a time-varying function.

19. The time-of-flight demodulation method of claim 11, wherein one of the first and the sec- ond demodulation voltages is based on a constant function.

20. The time-of-flight demodulation method of claim 11, wherein at least one of the first and the second demodulation voltages is applied such that a predetermined electric field is generated with respect to at least one of the first and the second diffusion region.