EP4173123A1 - Power output stage for a device for supplying energy to an electrical load - Google Patents
Power output stage for a device for supplying energy to an electrical loadInfo
- Publication number
- EP4173123A1 EP4173123A1 EP21735208.7A EP21735208A EP4173123A1 EP 4173123 A1 EP4173123 A1 EP 4173123A1 EP 21735208 A EP21735208 A EP 21735208A EP 4173123 A1 EP4173123 A1 EP 4173123A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- output stage
- current
- power output
- designed
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 90
- 238000005259 measurement Methods 0.000 claims abstract description 58
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- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 10
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- IOVCWXUNBOPUCH-UHFFFAOYSA-M Nitrite anion Chemical compound [O-]N=O IOVCWXUNBOPUCH-UHFFFAOYSA-M 0.000 claims description 2
- 229910002601 GaN Inorganic materials 0.000 abstract description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 abstract description 2
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- 239000004593 Epoxy Substances 0.000 description 1
- ULFUTCYGWMQVIO-PCVRPHSVSA-N [(6s,8r,9s,10r,13s,14s,17r)-17-acetyl-6,10,13-trimethyl-3-oxo-2,6,7,8,9,11,12,14,15,16-decahydro-1h-cyclopenta[a]phenanthren-17-yl] acetate;[(8r,9s,13s,14s,17s)-3-hydroxy-13-methyl-6,7,8,9,11,12,14,15,16,17-decahydrocyclopenta[a]phenanthren-17-yl] pentano Chemical compound C1CC2=CC(O)=CC=C2[C@@H]2[C@@H]1[C@@H]1CC[C@H](OC(=O)CCCC)[C@@]1(C)CC2.C([C@@]12C)CC(=O)C=C1[C@@H](C)C[C@@H]1[C@@H]2CC[C@]2(C)[C@@](OC(C)=O)(C(C)=O)CC[C@H]21 ULFUTCYGWMQVIO-PCVRPHSVSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/4811—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode having auxiliary actively switched resonant commutation circuits connected to intermediate DC voltage or between two push-pull branches
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0009—Devices or circuits for detecting current in a converter
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
- H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/4815—Resonant converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/8252—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Definitions
- Power output stage for a device for supplying energy to an electrical
- the invention is based on a power output stage for a device for supplying energy to an electrical load according to the preamble of the independent patent claim 1.
- the present invention also relates to a corresponding device for supplying energy to an electrical load with such a power output stage and a method for determining a voltage-free Switching time for a power output stage.
- Three-phase brushless DC motors are usually controlled by a power output stage, which is preferably designed as a B6 inverter based on silicon power semiconductors, preferably with a field-oriented control.
- a bridge driver is used in addition to the actual semiconductor power switches, which switches the semiconductor power switches on and off.
- an energy supply device which has an energy module and a capacitor.
- the energy module has inverting circuits and is designed to supply electrical energy to an electrical machine.
- the capacitor is arranged adjacent to the energy module and is set up to limit a voltage change due to the ripple current at the input of the inverting circuits.
- the inverting circuits and the capacitor are overmolded with a monolithic insulating epoxy and encapsulated by this, so that voltage isolation is provided between the power module and the capacitor.
- a generic power output stage for a device for supplying energy to an electrical load is known from DE 10 2015 208 150 A1.
- the power output stage comprises a power switching device, which comprises at least one half-bridge and is based on gallium nitride-on-silicon technology, and a control circuit for the power switching device.
- Semiconductor power switches of the at least one half-bridge are designed as gallium-nitrite semiconductors on a front side of a silicon substrate.
- the power output stage for a device for supplying energy to an electrical load with the features of independent claim 1 and the device for supplying energy to an electrical load with the features of independent claim 15 and the method for determining a voltage-free switching time for a power output stage with the features of the independent claims 18 and 19 each have the advantage that an ARCP module (ARCP: Auxiliary Resonant Commutated Pole) determines dynamic working points, which enable smooth switching, even if an average voltage of a divided intermediate circuit is determined by many parameters (load point, intermediate circuit voltage, dynamics, Temperature etc.) varies and thus a "charging time" of an inductance or choke coil changes. This ensures that the correct dead times for switching the semiconductor power switches on and off are taken.
- ARCP module Auxiliary Resonant Commutated Pole
- Auss approximate forms of the present invention a hard turn-on with a high voltage jump avoided and a soft switch-on implemented at a virtually voltage-free switching point.
- a great advantage of the ARCP module is that, by eliminating the switching losses in the at least one half-bridge, its switching frequency can be increased significantly.
- the passive components such as the capacitors of the intermediate circuit capacitance or any sine or edge filters that may be present, can be made significantly smaller and cheaper.
- the semiconductor area can be reduced due to the lower power loss.
- Embodiments of the present invention provide a power output stage for a device for supplying energy to an electrical load, with a power switching device which comprises at least one half-bridge and is based on gallium nitride-on-silicon technology, and a control circuit for the power switching device.
- Semiconductor power switches of the at least one half-bridge are designed as gallium-nitrite semiconductors on a front side of a carrier substrate.
- control circuit for the at least one half-bridge each comprises an ARCP module, which has two auxiliary switches and a choke coil and is designed to switch the semiconductor power switches of the corresponding half-bridge at a voltage-free switching time, the control circuit being carried out to switch the voltage-free switching time by a to determine adaptive delay chain and / or by means of an integrated current measurement.
- a method for determining a voltage-free switching point in time for a power output stage is proposed with the following steps: receiving a switching command and switching on the first or second auxiliary switch as a function of the received switching command. Determine and activate a delay period. Switching off the corresponding of the two semiconductor power switches of the at least one half bridge and activating a dead time measurement with a predetermined stop value, which corresponds to a maximum dead time span when the first delay time span has expired. Measuring a node voltage across the first semiconductor power switch and switching on the other of the two semiconductor power switches of the at least one half-bridge and stopping the dead time measurement when the measured node voltage corresponds to a predetermined voltage threshold value or the dead time measurement has reached the stop value.
- the switched-on auxiliary switch remains switched on after the other of the two semiconductor power switches of the at least one half-bridge has been switched on for the duration of the delay period and is switched off after the delay period has expired.
- the first auxiliary switch can be switched on to switch off the first semiconductor power switch and to switch on the second semiconductor power switch, and the second auxiliary switch can be switched on to switch off the second semiconductor power switch and to switch on the first semiconductor power switch.
- the power switching device and the control circuit based on gallium nitride-on-silicon technology can be designed as a monolithic circuit module, with at least the individual active components of the monolithic circuit module being able to be arranged on a common carrier substrate.
- at least the two auxiliary switches are integrated into the monolithic circuit module and arranged with the semiconductor power switches of the respective half-bridge on the common carrier substrate.
- a common carrier substrate preferably a silicon substrate.
- three half bridges of a B6 bridge with a corresponding control circuit for supplying energy to a three-phase motor can be arranged on the common carrier substrate.
- any other number of half bridges required to supply the electrical load can also be arranged on the common carrier substrate.
- protection functions such as an overcurrent protection function, an excess temperature protection function, etc., can also be applied to the common carrier substrate.
- control lines that normally have to be routed to a bridge driver circuit are not required, and no modulation from a higher-level control device is required. All fast signals and their switching edges therefore do not "leave" the monolithic circuit module. This can be expected to have a positive effect on the EMC behavior. Due to the small number of contacts required, a particularly compact implementation is possible, since contact pads can hardly fall below a minimum size. In addition, the proposed construction enables EMC interference to be reduced, which can spread in the system through jumping potentials at the individual half bridges via corresponding coupling capacities with a heat sink.
- a cooling surface of the power switching device can either be connected directly to ground, if possible, or in the monolithic circuit module it can be capacitively connected to ground directly via coupling capacitors in a defined manner. Additional interference suppression capacitors or Y capacitors as well as contacting elements (eg SMD springs) are thus superfluous.
- a conductive thermal paste can be used; these are available with much higher thermal conductivities than insulating pastes.
- capacitors of an intermediate circuit capacitance can be designed as silicon capacitors and arranged on the front and / or rear of the carrier substrate.
- these silicon capacitors are formed using deep trench technology on the back of the common carrier substrate in order to buffer the supply voltage. Due to the high possible switching frequencies, the silicon capacitors in deep trench technology can also be used in low-voltage inverters with a voltage of less than 60V for smaller outputs of a few kilowatts to represent an intermediate circuit.
- the intermediate circuit capacitance which is designed as silicon capacitors
- the silicon capacitors on the rear side of the common carrier substrate can be electrically contacted with the semiconductor power switches on the front side by means of plated-through holes through the carrier substrate.
- simple electrical contacting is also possible. This enables a structure without plated-through holes in the carrier substrate.
- the monolithic circuit module can be embedded in a multilayer printed circuit board or arranged on the multilayer printed circuit board.
- capacitors of the intermediate circuit capacitance can be arranged as silicon capacitors on separate carrier substrates and, like the monolithic circuit module, embedded in the multilayer circuit board or arranged on the multilayer circuit board.
- the capacitors of the intermediate circuit capacitance can be designed as multilayer ceramic capacitors in chip design (MLCC: Multi Layer Ceramic Capacitor) and embedded in the multilayer printed circuit board or arranged on the multilayer printed circuit board.
- the two auxiliary switches designed as gallium-nitrite semiconductors can become one bidirectional blocking auxiliary switches are summarized and formed on the front of the Trä gersubstrats.
- the auxiliary switch is designed to block bidirectionally, the required semiconductor area can be halved compared to a classic ARCP module, in which two anti-parallel switches are used as auxiliary switches.
- the choke coil can be designed without a core as a conductor track in the carrier substrate. This is made possible by the high switching frequencies. Since no core materials are required, a complex structure of the choke coil can be avoided.
- the choke coil can be designed without a core as a conductor path of the multi-layer circuit board of the power output stage. This means that the choke coil, like the capacitors of the intermediate circuit capacitance, can be embedded in the multilayer circuit board or arranged on the multilayer circuit board in which the monolithic circuit module is embedded or on which the monolithic circuit module is arranged.
- the control circuit can include a current control that is designed to receive at least one measurement current, which presents a corresponding current output current re, and at least one reference current as an analog signal, and to compare them with one another and depending on the comparison To generate and output at least a corresponding switching signal.
- the at least one measurement current can preferably be recorded within the monolithic circuit module.
- the control circuit can include a driver stage which is designed to receive the at least one switching signal from the current regulator, to process it and to output it to the power switching device. Due to the high switching frequencies, other control methods such as direct switching methods are possible, please include.
- the current control for each of the half bridges of the power switching device can therefore include a comparator which is designed to switch off the corresponding half bridge when the measurement current exceeds the corresponding reference current, and switch on the corresponding half bridge when the measurement current falls below the corresponding reference current.
- a comparator which is designed to switch off the corresponding half bridge when the measurement current exceeds the corresponding reference current, and switch on the corresponding half bridge when the measurement current falls below the corresponding reference current.
- the required reference current is thus set on average.
- the individual comparators can be sampled and / or executed with hysteresis.
- the digital output signal of the comparators can then be used directly as a switching status command for the individual semiconductor power switches.
- the respective reference signal is an analog signal which directly specifies the current in the electrical load or in the individual stator windings of the three-phase motor. It can be specified by a central control unit and contains a maximum of the machine frequencies (including explicitly applied harmonics).
- the degrees of freedom for controlling the electrical load are still in the control device, but the fast current dynamics are shifted to the monolithic circuit module, which can significantly reduce the demands on the dynamics and computing power of the control device and lead to a cost advantage.
- the fast hardware comparators can be used to obtain a very dynamic current regulator with a high bandwidth, which can also make inexpensive use of the increased actuator bandwidth that is created by increasing the switching frequency. If the current control were to continue to be carried out in the control unit, a more powerful control unit would automatically be required to increase the bandwidth of the current control, which would incur additional costs.
- the monolithic circuit module can include an electrical interface which is designed to receive signals from external components and / or assemblies.
- the electrical interface can receive a supply voltage potential, a ground potential and the at least one reference current .
- the power switching device can be designed, for example, as a B6 inverter with three half bridges. A cooling surface of the B6 inverter can be connected to ground directly or via at least one coupling capacitor, which has a defined capacitance.
- the electrical interface can be designed to receive a supply voltage potential and a ground potential of the energy supply and the at least one reference current from the control device.
- the electrical load can be designed as a three-phase brushless DC motor, the half-bridges of the B6 inverter each being connectable to a phase of the three-phase brushless DC motor.
- the delay time span can be determined by an adaptive delay chain, which can be specified by a number of delay steps with identical time spans.
- the number of delay steps of the delay time span can be increased by one when the dead time measurement has reached the predetermined stop value or the maximum dead time span.
- the number of delay steps of the delay time span can be reduced by one if the dead time measurement has not reached a predetermined minimum dead time span.
- the number of delay steps of the delay time span can otherwise remain the same.
- the delay time span can be determined by an integrated current measurement. After switching on the first or second auxiliary switch, a time measurement to determine the delay time span and a measurement of a current through a corresponding one of the two semiconductor power switches of the at least one half-bridge can be activated, whereby the measured current can be compared with a predetermined threshold value. The time measurement can be stopped and the measurement result can be specified as the elapsed delay period when the measured current exceeds the specified threshold value.
- FIG. 1 shows a schematic block diagram of an exemplary embodiment of a device according to the invention for supplying energy to an electrical load with an exemplary embodiment of a power output stage according to the invention.
- FIG. 2 shows a schematic circuit diagram of a control circuit for a half bridge of the power output stage according to the invention from FIG. 1.
- FIG. 3 shows a schematic circuit diagram of an ARCP module for a half-bridge of the power output stage according to the invention from FIG. 1.
- FIG. 4 shows a schematic and perspective illustration of the power output stage from FIG. 1 designed as a monolithic circuit module.
- FIG. 5 shows a schematic flow diagram of a first exemplary embodiment of a method according to the invention for determining a voltage-free switching point in time for the power output stage according to the invention from FIG. 1.
- FIG. 6 shows a schematic flow diagram of a second exemplary embodiment of a method according to the invention for determining a voltage-free switching point in time for the power output stage according to the invention from FIG. 1.
- the illustrated embodiment comprises a device 1 according to the invention for supplying energy to an electrical load 3, each with a power supply 5, a control device 7 and a power output stage 10 according to the invention.
- the illustrated embodiment of the power output stage 10 according to the invention for the device 1 for supplying energy to an electrical load 3 comprises a power switching device 12 which comprises at least one half bridge 12.1 and is based on the gallium nitride -Silicon technology is executed, and a control circuit 15 for the power switching device 12, wherein semiconductor power switches TI, T2 of the at least one half bridge 12.1 are formed as a gallium-nitrite semiconductor on a front side of a carrier substrate SiS.
- control circuit 15 comprises an ARCP module 16B for each of the at least one half-bridge 12.1, which has two auxiliary switches T3, T4 and a choke coil 16.2 and is designed to switch the semiconductor power switches TI, T2 of the corresponding half-bridge 12.1 at a voltage-free switching time, wherein the control circuit 15 is designed to determine the voltage-free switching time by an integrated current measurement and / or by an adaptive delay chain.
- the power switching device 12 and the control circuit 15 are designed as a monolithic circuit module based on gallium nitride-on-silicon technology.
- the individual active components of the monolithic circuit module are arranged on a common SiS carrier substrate.
- the electrical load 3 is designed in the illustrated embodiment of the device 1 as a three-phase brushless DC motor 3A.
- the power switching device 12 is designed as a B6 inverter 12A with three half bridges 12.1, the half bridges 12.1 of the B6 inverter 12A each being connected to a phase U, V, W of the three-phase brushless DC motor 3A.
- a cooling surface of the B6 inverter 12A is connected to ground GND directly or via at least one coupling capacitor, which has a defined capacitance.
- the power switching device 12 can also have fewer or more than three half bridges 12.1.
- the device 1 to supply energy to an electrical load 3, also supply an electrical load 3 other than a three-phase direct current motor 3A with energy.
- capacitors CI, C2 of an intermediate circuit capacitance 14 for buffering a supply voltage UBat in the illustrated embodiments are each arranged on the carrier substrate SiS.
- the intermediate circuit capacitance 14 is also integrated into the monolithic circuit module in the illustratedariessbei.
- the monolithic circuit module is embedded in a multilayer printed circuit board or arranged on the multilayer printed circuit board.
- the capacitors CI, C2 of the intermediate circuit capacitance 14 can be arranged on separate carrier substrates and embedded in the multilayer printed circuit board or arranged on the multilayer printed circuit board.
- the capacitors CI, C2 of the intermediate circuit capacitance 14 can play in these mecanicsbei directly embedded in the multilayer circuit board or arranged on the multilayer circuit board.
- the control circuit 15 comprises a current control 18 which is designed to include at least one measurement current Im (U, V, W, which represents a corresponding current output current lo (U, V, W), and to receive at least one reference current Ir (U, V, W) as an analog signal and to compare it with one another and to generate and output at least one corresponding switching signal as a function of the comparison
- Power switching device 12 has a comparator 18.1, which is designed to switch off the corresponding half-bridge 12.1 when the measurement current Im (U, V, W exceeds the corresponding reference current Ir (U, V, W), and to switch on the corresponding half-bridge 12.1 when the measurement current Im (U, V, W) falls below the corresponding reference current Ir (U, V, W)
- the current regulator 18 is t the comparator 18.1 clocked by a clock signal TS.
- control circuit 15 in the illustrated embodiment includes a driver stage 16 which includes a gate control 16A and is designed to supply the at least one switching signal from the current regulator 18 or the corresponding comparator 18.1 receive, process and give trainees to the two semiconductor power switches TI, T2 of the corresponding half-bridge 12.1 of the power switching device 12.
- the monolithic circuit module comprises an electrical interface 13 which is designed to receive signals from external components and / or assemblies.
- the electrical interface 13 receives the supply voltage potential UBat and a ground potential GND from the energy supply 5 and the at least one reference current Ir (U, V, W) from the control device 7.
- the control unit 7 evaluates output signals from a sensor system DWM which, in the exemplary embodiment shown, detects the angle of rotation of the three-phase DC motor 3A and generates the corresponding output signals.
- the intermediate circuit capacitance 14 in the illustrated embodiment of the power output stage 10 is divided and comprises two capacitors CI, C2, which each as silicon capacitors in deep trench technology on the back of the common Trä gersubstrates SiS are designed to buffer the supply voltage UBat.
- the silicon capacitors CI, C2 are electrically contacted by means of vias, not shown, through the carrier substrate SiS with the power switching device 12B.
- the monolithic circuit module is embedded in a multilayer printed circuit board or arranged on the multilayer printed circuit board.
- the capacitors CI, C2 of the intermediate circuit capacitance 14 can be used as Silicon capacitors are formed on separate carrier substrates and embedded in the multilayer printed circuit board or are arranged on the multilayer printed circuit board.
- the capacitors CI, C2 of the intermediate circuit capacitance 14 can alternatively be formed as multilayer ceramic capacitors in chip design (MLCC: Multi Layer Ceramic Capacitor) and embedded directly in the multilayer circuit board or arranged on the multilayer circuit board.
- MLCC Multi Layer Ceramic Capacitor
- the ARCP module 16 is designed as part of the driver stage 16 and is integrated into the monolithic circuit module.
- the two auxiliary switches T3, T4 are combined as gallium nitrite semiconductors to form a bidirectional blocking auxiliary switch 16.1 and formed with the semiconductor power switches TI, T2 of the individual half bridges 12.1 B on the front of the carrier substrate SiS.
- the choke coil 16.2 is designed without a core as a conductor track in the SiS carrier substrate.
- the inductor 16.2 is coreless and forms a conductor path of the multilayer printed circuit board.
- the first exemplary embodiment of the method 100 shown in FIG. 5 for determining a voltage-free switching time for the power output stage 10 described above is based on an adaptive delay chain.
- the method 100 is started in a step S100, for example by starting the vehicle.
- step S110 there is a wait until a switching command for one of the two auxiliary switches T3, T4 is received.
- step S120 it is then checked whether a first switching command, which for example represents a transition from a first to a second logic state, or whether a second switching command has been received, which for example represents a transition from the second to the first logic state. If the first switching command was recognized in step S120, the method is continued with step S130.
- step S230 the method is continued with step S230.
- step S130 the first auxiliary switch T3 is switched on or switched on as a function of the received first switching command. As a result, a coil current IL increases through the choke coil 16.2.
- step S140 a delay period TV is activated, which is predetermined by a number X of delay steps with identical periods of time, and the coil current IL through the choke coil 16.2 continues to rise.
- the current IL through the choke coil 16.2 is greater than the corresponding output current lo (U, V, W) and a corresponding current IT1 through the corresponding, here the first semiconductor power switch TI, of the two semiconductor power switches TI, T2 of the at least one half bridge 12.1 is greater than zero and a node voltage US across the first semiconductor switch TI corresponds to a ground potential GND. Therefore, the first semiconductor power switch TI is switched off or switched off in step S150 and a dead time measurement with a predetermined stop value is activated, wel cher corresponds to a maximum value for a dead time period TS.
- step S160 This increases the node voltage US across the first semiconductor power switch TI, which is measured in step S160 and compared with a first voltage threshold value.
- This first voltage threshold value corresponds, for example, approximately to the supply voltage potential UBat or is selected to be somewhat lower than the supply voltage potential UBat.
- step S170 the other, here the second semiconductor power switch T2, of the two semiconductor power switches TI, T2 of the at least one half bridge 12.1 is switched on or switched on and the dead time measurement is stopped when the measured node voltage US corresponds to the specified first voltage threshold value or the dead time measurement has reached the specified stop value or the maximum dead time TS.
- a voltage drop across the second semiconductor power switch T2 is ideally zero.
- step S170 the number X of the delay steps of the delay time span VT is increased by one when the dead time measurement has reached the predetermined stop value or the maximum dead time span TS.
- the number X of the delay steps of the first delay time span VT1 is reduced by one if the elapsed time span is less than a minimal nimaler value for the dead time period TS, the number X of delay steps of the delay period TV is otherwise kept constant. This means that the delay period TV1 is not changed if the stopped period of the dead time measurement lies between the minimum value and the maximum value of the dead period TS.
- step S180 After the second semiconductor power switch T2 has been switched on, the delay period TV is activated in step S180. After the delay time span TV has elapsed, the switched-on first auxiliary switch T3 is switched off or switched off in step S190. This means that after the second semiconductor power switch T2 has been switched on, the first auxiliary switch T3 remains switched on for the duration of the delay time span TV so that the coil current IL can be reduced through the choke coil 16.2. The method 100 is then continued with step S110 and the receipt of the next switching command is waited for.
- step S230 the second auxiliary switch T4 is switched on or switched on as a function of the received second switching command. As a result, the coil current IL drops through the choke coil 16.2.
- step S240 the delay period TV is activated and the coil current IL through the choke coil 16.2 continues to decrease. After the delay period TV has elapsed, the current IL through the choke coil 16.2 is greater than the corresponding output current lo (U, V, W) and a corresponding current IT2 through the corresponding, here the second semiconductor power switch T2, the two semiconductor power switches TI, T2 is at least a half bridge 12.1 is less than zero.
- the second semiconductor power switch T2 is therefore switched to blocking or off in step S250 and the dead time measurement is activated with the predetermined stop value, which corresponds to the maximum value for the dead time period TS.
- the node voltage US drops across the first semiconductor power switch TI, which is measured in step S260 and compared with a second voltage threshold value.
- This second voltage threshold value corresponds approximately to the ground potential GND or is selected to be somewhat higher than the ground potential GND.
- step S270 the other, here the first semiconductor power switch TI, of the two semiconductor power switches TI, T2 of the at least one half bridge 12.1 is switched on or switched on and the dead time measurement is stopped when the measured node voltage US corresponds to the specified second voltage threshold value or the dead time measurement corresponds to the specified value Has reached the stop value.
- a voltage drop across the first semiconductor power switch TI is ideally equal to zero.
- the first semiconductor power switch TI is de-energized and can be turned on or switched on without loss.
- the number X of the delay steps of the delay period VT is increased by one when the dead time measurement has reached the predetermined stop value.
- the number X of delay steps of the first delay time span VT1 is reduced by one if the elapsed time span is less than the minimum value for the dead time span TS, the number X of delay steps of the delay time span TV being otherwise kept constant. This means that the delay time span TV is not changed if the stopped time duration of the time measurement is between the minimum value and the maximum value of the dead time span TS.
- the delay period TV is activated in step S280.
- the switched-on second auxiliary switch T4 is switched off in step S290. This means that the second auxiliary switch T4 remains switched on for the duration of the delay period TV after the first semiconductor power switch TI has been switched on. Then the process 100 is continued with step S110 and the receipt of the next switching command is awaited.
- the illustrated in Fig. 6 second embodiment of the method 200 for determining a voltage-free switching time for the power output stage 10 described above is based on an integrated current measurement.
- the method 200 is started in a step S300, for example by starting the vehicle.
- step S310 there is a wait until a switching command for one of the two auxiliary switches is received.
- step S320 it is then checked whether a first switching command, which for example represents a transition from a first to a second logic state, or whether a second switching command has been received, which for example represents a transition from the second to the first logic state . If the first switching command was recognized in step S320, the method is continued with step S330. If the second switching command was recognized in step S320, the method is continued with step S430.
- step S330 the first auxiliary switch T3 is switched on or switched on as a function of the received first switching command and a time measurement for determining the delay time span TV is activated or started.
- a coil current IL rises through the choke coil 16.2 and a current IT1 through the corresponding, here the first semiconductor power switch TI of the two semiconductor power switches TI, T2 of the at least one half bridge 12.1 is measured in step S340.
- step S350 the first semiconductor power switch TI is switched off or switched off and the dead time measurement is activated with a predetermined stop value, which corresponds to the maximum value for the dead time period TS, and the time measurement is stopped and the measurement result is specified as the elapsed delay time period VT when the current IT1 exceeds a specified current threshold through the first semiconductor power switch TI.
- a predetermined stop value which corresponds to the maximum value for the dead time period TS
- the time measurement is stopped and the measurement result is specified as the elapsed delay time period VT when the current IT1 exceeds a specified current threshold through the first semiconductor power switch TI.
- step S360 the node voltage US across the first semiconductor power switch TI is measured and compared with the first voltage threshold value which, for example, corresponds approximately to the supply voltage potential UBat or is selected to be somewhat lower than the supply voltage potential UBat.
- step S370 the other, here the second semiconductor power switch T2, the two semiconductor power switches TI, T2 of the at least one half bridge 12.1 is switched on or switched on and the dead time measurement is stopped when the measured node voltage US corresponds to the specified first voltage threshold value or the dead time measurement has reached the specified stop value.
- a voltage drop across the second semiconductor power switch T2 is ideally equal to zero. As a result, the second semiconductor power switch T2 is de-energized and can be turned on or switched on without loss.
- step S380 After the second semiconductor power switch T2 has been switched on, the delay time span TV determined by the time measurement is activated in step S380. After the delay period TV has elapsed, the switched-on first auxiliary switch T3 is switched off or switched to a blocking state in step S390. This means that the first auxiliary switch T3 remains switched on for the duration of the delay period TV after switching on the second semiconductor power switch T2, so that the coil current IL through the choke coil 16.2 can break down. The method 200 is then continued with step S310 and the receipt of the next switching command is waited for.
- step S430 the second auxiliary switch T4 is switched on or switched on as a function of the received second switching command and the time measurement for determining the delay period TV is activated or started.
- a coil current IL through the choke coil 16.2 drops and a current through the corresponding, here the second semiconductor power switch T2 of the two semiconductor power switches TI, T2 of the at least one half bridge 12.1 is measured in step S440.
- step S450 the second semiconductor power switch T2 is switched off or switched off and the dead time measurement is activated with the specified stop value, which corresponds to the maximum value for the dead time TS, and the time measurement is stopped and the measurement result is specified as the elapsed delay time VT when the current by the second semiconductor power switch T2 exceeds the predetermined current threshold value.
- the current IL through the Dros selspule 16.2 is greater than the corresponding output current lo (U, V, W).
- step S460 the node voltage US is measured across the first semiconductor power switch TI and compared with the second voltage threshold value, which, for example, corresponds approximately to the ground potential GND or is selected to be somewhat greater than the ground potential GND.
- step S470 the other, here the first semiconductor power switch TI, of the two semiconductor power switches TI, T2 of the at least one half bridge 12.1 is switched on or switched on when the measured node voltage US corresponds to the specified second voltage threshold value or the dead time measurement has reached the specified stop value .
- a voltage drop across the first semiconductor power switch TI is ideally equal to zero.
- the first semiconductor power switch TI is de-energized and can be turned on or switched on without loss.
- the delay time span TV determined by the time measurement is activated in step S480.
- the switched-on second auxiliary switch T4 is switched off or switched off in step S490. This means that after the first semiconductor power switch TI has been switched on, the second auxiliary switch T4 remains switched on for the duration of the delay period TV. Then the procedure 200 continued with step S310 and waited for the receipt of the next switching command.
- the delay time span VT can be implemented, for example, with a switched shift register.
- the dead time TS can be implemented, for example, with a monostable multivibrator.
- the two described exemplary embodiments of the method can in principle be implemented in NMOS logic.
- the first exemplary embodiment of the method 100 is less sensitive to parameter spreads due to its adaptive nature, but requires a total of more logic elements than the second exemplary embodiment of the method 200.
- the second exemplary embodiment of the method 200 can, however, only be used if the current measurement is sufficiently accurate.
- the two methods 100, 200 can also be combined if, for example, the current measurement alone is not sufficiently accurate, but can still be used to support or verify the setting of the adaptive delay chain.
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Abstract
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DE102020207886.6A DE102020207886A1 (en) | 2020-06-25 | 2020-06-25 | Power output stage for a device for supplying energy to an electrical load |
PCT/EP2021/066429 WO2021259758A1 (en) | 2020-06-25 | 2021-06-17 | Power output stage for a device for supplying energy to an electrical load |
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EP4173123A1 true EP4173123A1 (en) | 2023-05-03 |
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JP (1) | JP7535604B2 (en) |
CN (1) | CN115943546A (en) |
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JP2000184738A (en) | 1998-12-15 | 2000-06-30 | Shihen Tech Corp | Partial resonance pwm inverter device |
JP2001160522A (en) | 1999-12-02 | 2001-06-12 | Mitsubishi Electric Corp | Air-core coil and producing method for circuit board with the air-core coil |
JP4785268B2 (en) | 2000-12-15 | 2011-10-05 | イビデン株式会社 | Multilayer printed wiring board with built-in semiconductor elements |
JP4156258B2 (en) | 2002-03-28 | 2008-09-24 | 本田技研工業株式会社 | Resonant type inverter |
JP4552466B2 (en) | 2004-03-12 | 2010-09-29 | 株式会社日立製作所 | AC motor control device, 2-chip inverter and one-chip inverter. |
JP5446539B2 (en) | 2008-08-27 | 2014-03-19 | サンケン電気株式会社 | Resonant inverter device |
JP5493783B2 (en) | 2009-12-02 | 2014-05-14 | 日新電機株式会社 | Three-phase inverter device |
DE102015208150A1 (en) | 2015-05-04 | 2016-11-10 | Robert Bosch Gmbh | Method for producing an electronic circuit device and electronic circuit device |
WO2017015641A1 (en) * | 2015-07-22 | 2017-01-26 | Indice Semiconductor Inc. | Resonant system controller and cycle-by-cycle predictive soft switching |
US9954409B2 (en) | 2015-07-27 | 2018-04-24 | Ford Global Technologies, Llc | Power supply device |
US10256812B2 (en) | 2016-07-08 | 2019-04-09 | Infineon Technologies Austria Ag | Half bridge coupled resonant gate drivers |
FR3063190B1 (en) | 2017-02-17 | 2019-04-12 | Centre National De La Recherche Scientifique | LOW VOLTAGE POWERED ELECTRIC MACHINE AND MULTICELLULAR TRACTION CHAIN THEREFOR |
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CN115943546A (en) | 2023-04-07 |
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