EP3918477A4 - Processing computational models in parallel - Google Patents

Processing computational models in parallel Download PDF

Info

Publication number
EP3918477A4
EP3918477A4 EP20749721.5A EP20749721A EP3918477A4 EP 3918477 A4 EP3918477 A4 EP 3918477A4 EP 20749721 A EP20749721 A EP 20749721A EP 3918477 A4 EP3918477 A4 EP 3918477A4
Authority
EP
European Patent Office
Prior art keywords
parallel
computational models
processing computational
processing
models
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP20749721.5A
Other languages
German (de)
French (fr)
Other versions
EP3918477A1 (en
Inventor
Byoung Joo Lee
Je Min Woo
Jin Jong Lee
Jung Sig Jun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Inc
Original Assignee
LG Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Electronics Inc filed Critical LG Electronics Inc
Priority claimed from PCT/KR2020/001449 external-priority patent/WO2020159269A1/en
Publication of EP3918477A1 publication Critical patent/EP3918477A1/en
Publication of EP3918477A4 publication Critical patent/EP3918477A4/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Biophysics (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Mathematical Physics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)
EP20749721.5A 2019-02-01 2020-01-31 Processing computational models in parallel Pending EP3918477A4 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201962799797P 2019-02-01 2019-02-01
KR1020190163982A KR20200096102A (en) 2019-02-01 2019-12-10 Processing computational models in parallel
PCT/KR2020/001449 WO2020159269A1 (en) 2019-02-01 2020-01-31 Processing computational models in parallel

Publications (2)

Publication Number Publication Date
EP3918477A1 EP3918477A1 (en) 2021-12-08
EP3918477A4 true EP3918477A4 (en) 2022-08-10

Family

ID=72048159

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20749721.5A Pending EP3918477A4 (en) 2019-02-01 2020-01-31 Processing computational models in parallel

Country Status (2)

Country Link
EP (1) EP3918477A4 (en)
KR (1) KR20200096102A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102559658B1 (en) * 2020-12-16 2023-07-26 한국과학기술원 Scheduling method and apparatus thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005111843A2 (en) * 2004-05-11 2005-11-24 Massively Parallel Technologies, Inc. Methods for parallel processing communication
US20110191782A1 (en) * 2010-02-01 2011-08-04 Samsung Electronics Co., Ltd. Apparatus and method for processing data
US8370495B2 (en) * 2005-03-16 2013-02-05 Adaptive Computing Enterprises, Inc. On-demand compute environment
WO2016048345A1 (en) * 2014-09-26 2016-03-31 Hewlett Packard Enterprise Development Lp Computing nodes
US9396023B1 (en) * 2014-12-30 2016-07-19 Qlogic, Corporation Methods and systems for parallel distributed computation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005111843A2 (en) * 2004-05-11 2005-11-24 Massively Parallel Technologies, Inc. Methods for parallel processing communication
US8370495B2 (en) * 2005-03-16 2013-02-05 Adaptive Computing Enterprises, Inc. On-demand compute environment
US20110191782A1 (en) * 2010-02-01 2011-08-04 Samsung Electronics Co., Ltd. Apparatus and method for processing data
WO2016048345A1 (en) * 2014-09-26 2016-03-31 Hewlett Packard Enterprise Development Lp Computing nodes
US9396023B1 (en) * 2014-12-30 2016-07-19 Qlogic, Corporation Methods and systems for parallel distributed computation

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
FARZIN HADDADPOUR ET AL: "Straggler-Resilient and Communication-Efficient Distributed Iterative Linear Solver", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 16 June 2018 (2018-06-16), XP080891274 *
See also references of WO2020159269A1 *
SONGZE LI ET AL: "Near-Optimal Straggler Mitigation for Distributed Gradient Methods", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 27 October 2017 (2017-10-27), XP080832216 *

Also Published As

Publication number Publication date
EP3918477A1 (en) 2021-12-08
KR20200096102A (en) 2020-08-11

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