EP3907847B1

EP3907847B1 - Cell balancing apparatus, battery apparatus including the same, and cell balancing method

Info

Publication number: EP3907847B1
Application number: EP20890183.5A
Authority: EP
Inventors: Chang Hyun Sung
Original assignee: LG Energy Solution Ltd
Current assignee: LG Energy Solution Ltd
Priority date: 2019-11-18
Filing date: 2020-10-20
Publication date: 2025-01-08
Anticipated expiration: 2040-10-20
Also published as: HUE070054T2; KR102821612B1; US20250392139A1; KR20210060208A; EP3907847A4; CN113348583B; ES3007219T3; EP3907847A1; JP7440186B2; US20220085623A1; JP2022518922A; US12424856B2; WO2021101083A1; CN113348583A

Description

[Technical Field]

The described technology relates to a cell balancing apparatus, a battery apparatus including a cell balancing apparatus, and a cell balancing method.

[Background Art]

Inside a battery pack, a plurality of battery cells are connected in series or in parallel. Voltage deviation between the battery cells may cause over-discharge or over-charge of the battery cells, and also reduce lifetime of the battery cells. A cell balancing circuit is designed in a battery management system (BMS) to improve the voltage deviation.
As the cell balancing circuit, a passive cell balancing circuit that maintains a balance between battery cells by consuming energy of a battery cell with a relatively high voltage as heat of resistance may be used. In this case, there is a problem in that it is difficult to increase a balancing current in accordance with the trend of increasing the capacity of the battery cell because the balancing current is limited due to heat through a resistor. To address this issue, an active cell balancing circuit has been proposed that transfers the energy of a battery cell with a relatively high voltage to a battery cell with a relatively low voltage. However, since many elements are required to implement the active cell balancing circuit, there is a problem that the cost of the cell balancing circuit is increased.
An example of balancing circuits can be found for instance in DE 10 2008 043611 A1 , CN 204 947 676 U or US 2012/046892 A1 .

[Disclosure]

[Technical Problem]

An embodiment provides a battery apparatus and a cell balancing method of the battery apparatus, for reducing the cost of a cell balancing circuit.

[Technical Solution]

The present disclosure provides systems as defined by the independent claims 1 and 9. Preferred embodiments are defined in the appended dependent claims.

[Advantageous Effects]

According to one embodiment, the cost can be reduced by reducing the number of elements in a cell balancing circuit.

[Description of the Drawings]

FIG. 1 is a drawing showing a battery apparatus according to an embodiment.
FIG. 2 is a drawing showing an example of a balancing circuit of a battery management system not covered by the present invention.
FIG. 3 is a drawing showing signal timing and current of a balancing circuit shown in FIG. 2.
FIG. 4 and FIG. 5 are drawings showing a current path of a balancing circuit shown in FIG. 2.
FIG. 6 is a diagram showing cell voltages of an outermost battery cell and an inner battery cell during discharge.
FIG. 7 is a diagram showing cell voltages of an outermost battery cell and an inner battery cell during charging.
FIG. 8 is a drawing showing an example of a balancing circuit of a battery management system according of an embodiment.
FIG. 9 is a drawing showing signal timing and current of a balancing circuit shown in FIG. 8.
FIG. 10 and FIG. 11 are drawings showing a current path of a balancing circuit shown in FIG. 8.

[Mode for Invention]

The drawings and the following detailed description are to be regarded as illustrative in nature and not restrictive, the scope of the present invention being defined by the appended claims.
Like reference numerals designate like elements throughout the specification.
When it is described that an element is "connected" to another element, it should be understood that the element may be directly connected to the other element or connected to the other element through a third element. On the other hand, when it is described that an element is "directly connected" to another element, it should be understood that the element is connected to the other element through no third element.
As used herein, a singular form may be intended to include a plural form as well, unless the explicit expression such as "one" or "single" is used.
FIG. 1 is a drawing showing a battery apparatus according to an embodiment.
Referring to FIG. 1, a battery apparatus 100 has a structure that can be electrically connected to an external device 10. When the external device 10 is a load, the battery apparatus 100 is discharged by operating as a power supply that supplies power to the load 10. When the external device 10 is a charger, the battery apparatus 100 is charged by receiving external power through the charger 10.
The external device 10 operating as the load may be, for example, an electronic device, a mobility apparatus, or an energy storage system (ESS). The mobility apparatus may be, for example, an electric vehicle, a hybrid vehicle, or a smart mobility.
The battery apparatus 100 includes a battery pack 110, a battery management system (BMS) 120, and switches 131 and 132.
The battery pack 110 includes a plurality of battery cells (not shown) that are electrically connected. In some embodiments, the battery cell may be a rechargeable battery. The battery pack 110 may include a battery module in which a predetermined number of battery cells are connected in series. In some embodiments, a predetermined number of battery modules may be connected in series or in parallel in the battery pack 110 to supply desired power.
The battery pack 110 is connected to the battery management system 120 through wiring. The battery management system 120 may collect and analyze various information related to the battery cells including information on the battery cells to control charging and discharging of the battery cells, cell balancing, a protection operation, and also control operations of the switches 131 and 132.
The battery management system 120 includes a cell balancing circuit 121 and a processing circuitry 122. The cell balancing circuit 121 corresponds to the battery module of battery pack 110. In some embodiments, when the battery pack 110 includes a plurality of battery modules, a plurality of cell balancing circuits 121 corresponding to the plurality of battery modules respectively may be provided. The cell balancing circuit 121 performs cell balancing between an outer battery cell and an inner battery cell among a plurality of battery cells connected in series. The cell balancing circuit 121 performs the cell balancing under control of the processing circuitry 122 when the cell balancing is required.
The switches 131 and 132 are connected between the battery pack 110 and the external device 10 to control electrical connection between the battery pack 110 and the external device 10. For example, the switch 131 may be connected between a positive output terminal PV(+) to which a positive voltage of the battery pack 110 is output and a positive link terminal DC(+) to be connected to the external device 10, and the switch 132 may be connected between a negative output terminal PV(-) to which a negative voltage of the battery pack 110 is output and a negative link terminal DC(-) to be connected to the external device 10. In some embodiments, the switches 131 and 132 may be transistors or relays.
The processing circuitry 122 controls an operation of the cell balancing circuit 121 and operations of the switches 131 and 132. The processing circuitry 122 may be a circuit including a processor, and the processor may be, for example, a micro controller unit (MCU). In addition, the processing circuitry 122 may further include a driver that controls a switching operation of the cell balancing circuit 122 according to the control of the processor.
In some embodiments, the battery management system 120 may further include a cell voltage monitoring circuit (not shown). The processing circuitry 122 may determine whether balancing is required based on a voltage of the battery cell detected by the cell voltage monitoring circuit.
Hereinafter, a cell balancing circuit of a battery management system not covered by the present invention is described with reference to FIG. 2 to FIG. 5.
FIG. 2 is a drawing showing an example of a balancing circuit of a battery management system, and FIG. 3 is a drawing showing signal timing and current of a balancing circuit shown in FIG. 2, and FIG. 4 and FIG. 5 are drawings showing a current path of a balancing circuit shown in FIG. 2. In FIG. 2 to FIG. 5, for convenience, the number of battery cells included in a battery module and connected in series is assumed to be six, but is not limited to six.
Referring to FIG. 2, a cell balancing circuit 200 includes a transistor SW1, inductors L1 and L2, and diodes D1 and D2.
A first terminal of the inductor L1 is connected to a contact between an outermost battery cell C1 in a positive electrode direction among a plurality of battery cells C1, C2, C3, C4, C5, and C6, and a battery cell C2 adjacent to the outermost battery cell C1, i.e., a negative electrode of the outermost battery cell C1 and a positive electrode of the adjacent battery cell C2. The diode D1 is connected between a positive electrode of the outermost battery cell C1 and a second terminal of the inductor L1. Specifically, a cathode of diode D1 is connected to the positive electrode of the outermost battery cell C1, and an anode of diode D1 is connected to the second terminal of the inductor L1.
A first terminal of the inductor L2 is connected to a contact between an outermost battery cell C6 in a negative electrode direction among the plurality of battery cells C1 to C6 and a battery cell C5 adjacent to the outermost battery cell C6, i.e., a positive electrode of the outermost battery cell C6 and a negative electrode of the adjacent battery cell C5. The diode D2 is connected between a negative electrode of the outermost battery cell C6 and a second terminal of the inductor L2. Specifically, an anode of diode D2 is connected to the negative electrode of the outermost battery cell C6, and a cathode of diode D2 is connected to the second terminal of the inductor L2.
The transistor SW1 is connected between the second terminal of inductor L1 (i.e., the anode of the diode D1) and the second terminal of inductor L2 (i.e., the cathode of the diode D2). Specifically, a first terminal of the transistor SW1 is connected to the second terminal of the inductor L1, and a second terminal of the transistor SW1 is connected to the second terminal of the inductor L2. The transistor SW1 may be turned on or off in response to a control signal that is transferred to its control terminal from a processing circuitry (122 of FIG. 1), for example, a driver of the processing circuitry 122. The transistor SW1 may be a metal-oxide semiconductor field-effect transistor (MOSFET). In this case, the transistor SW1 may have a body diode. As shown in FIG. 2, the transistor SW1 may be an n-channel transistor, for example an NMOS transistor. In this case, the transistor SW1 has a drain, a source and a gate as the first terminal, the second terminal and the control terminal, respectively.
Referring to FIG. 3 and FIG. 4, when balancing is required, the transistor SW1 is turned on in response to a control signal from a processing circuitry (122 of FIG. 1) at t₀. Then, a current path I₁ is formed through the inner battery cells C2 to C5 among the plurality of battery cells, the inductor L1, the transistor SW1, and the inductor L2. Currents I_L1 and I_L2 flowing through the inductors L1 and L2 gradually increase by voltages of the inner battery cells C2 to C5, and a current I_C2-C5 flowing through the inner battery cells C2 to C5 also gradually increases. That is, during a period from t₀ to t₁, energy of the inner battery cells C2 to C5 may be injected into the inductors L1 and L2.
Next, referring to FIG. 3 and FIG. 5, the transistor SW1 is turned off at t₁ so that a current path I₂ is formed through the inductor L1, the diode D1, and the outermost battery cell C1 in the positive electrode direction, and a current path I₃ is formed through the inductor L2, the outermost battery cell C6 in the negative electrode direction, and the diode D2. Accordingly, the currents I_L1 and I_L2 flowing through the inductors L1 and L2 are supplied to the outermost battery cells C1 and C6, so the currents I_L1 and I_L2 flowing through the inductors L1 and L2 gradually decrease, and currents I_C1 and I_C6 flowing through the outermost battery cells C1 and C6 also gradually decrease. That is, energy injected into the inductors L1 and L2 during the period from t₁ to t₂ is supplied to the outermost battery cells C1 and C6, so the outermost battery cells C1 and C6 can be charged. Here, t₂ may be a time point when the currents I_L1 and I_L2 flowing through the inductors L1 and L2 become zero.
Next, the processing circuitry 122 may repeat an operation (t₀ to t₁) of injecting the currents I_L1 and I_L2 into the inductors L1 and L2 and an operation of (t₁ to t₂) of charging the outermost battery cells C1 and C6 with the current flowing through the inductors L1 and L2 until the balancing is complete.
Although it is shown in FIG. 2 that the diodes D1 and D2 are used as active elements to form the current paths among the outermost battery cells C1 and C6 and the inductors L1 and L2, other active elements may be used instead of the diodes D1 and D2. Transistors may be used instead of the diodes D1 and D2. When the transistor SW1 is turned on, the transistors used instead of the diodes may be turned off, and when the transistor SW1 is turned off, the transistors used instead of the diodes may be turned on. The transistors used instead of the diodes may be maintained in the off-state regardless of the on/off of the transistor SW1. In this case, the currents injected into the inductors L1 and L2 may be transmitted to the outermost battery cells C1 and C6 through body diodes of the transistors, respectively.
When a battery apparatus (100 of FIG. 1) supplies energy to an external device (10 of FIG. 1), as shown in FIG. 6, the outermost battery cell may be first discharged because a temperature of the outermost battery cell in a battery module is low. Energy of the inner battery cells C2 to C6 can be transferred to the outermost battery cells through the inductors L1 and L2 to perform the balancing. In addition, the number of elements can be reduced compared to a conventional active cell balancing circuit that uses an inductor and a transistor for each battery cell, thereby reducing the cost of the cell balancing circuit.
When the battery apparatus 100 is charged through the external device 10 which is a charger, as shown in FIG. 7, the outermost battery cell can be first charged compared to the inner battery cell. In this case, the balancing may be performed by transferring the energy of the outermost battery cell to the inner battery cell. However, the cell balancing circuit shown in FIG. 2 may not transfer the energy of the outermost battery cell to the inner battery cell.
Hereinafter, a cell balancing circuit that can transfer energy of an outermost battery cell to an inner battery cell is described with reference to FIG. 8 to FIG. 11.
FIG. 8 is a drawing showing an example of a balancing circuit of a battery management system according to an embodiment, FIG. 9 is a drawing showing signal timing and current of a balancing circuit shown in FIG. 8, and FIG. 10 and FIG. 11 are drawings showing a current path of a balancing circuit shown in FIG. 8. In FIG. 8 to FIG. 11, for convenience, the number of battery cells included in a battery module and connected in series is assumed to be six, but is not limited to six.
Referring to FIG. 8, a cell balancing circuit 800 includes transistors SW1, SW2, and SW3, inductors L1 and L2, and diodes D3 and D4.
The transistor SW1 and the inductors L1 and L2 have a similar connection relationship with those of the cell balancing circuit 200 described with reference to FIG. 2.
A first terminal of the inductor L1 is connected to a contact between an outermost battery cell C1 in a positive electrode direction among a plurality of battery cells C1 to C6, and a battery cell C2 adjacent to the outermost battery cell C1, i.e., a negative electrode of the outermost battery cell C1 and a positive electrode of the adjacent battery cell C2. The transistor SW2 is connected between a positive electrode of the outermost battery cell C1 and a second terminal of the inductor L1. Specifically, a first terminal of transistor SW2 is connected to the positive electrode of the outermost battery cell C1, and a second terminal of transistor SW2 is connected to the second terminal of the inductor L1.
A first terminal of the inductor L2 is connected to a contact between an outermost battery cell C6 in a negative electrode direction among the plurality of battery cells C1 to C6 and a battery cell C5 adjacent to the outermost battery cell C6, i.e., a positive electrode of the outermost battery cell C6 and a negative electrode of the adjacent battery cell C5. The transistor SW3 is connected between a negative electrode of the outermost battery cell C6 and a second terminal of the inductor L2. Specifically, a first terminal of transistor SW2 is connected to the second terminal of inductor L2, and a second terminal of transistor SW2 is connected to the negative electrode of outermost battery cell C6.
The diode D3 is connected between a negative electrode of battery cell C5 adjacent to the outermost battery cell C6 in the negative electrode direction (i.e., the positive electrode of the outermost battery cell C6 and the first terminal of the inductor L2) and the second terminal of the inductor L1 (i.e., the second terminal of the transistor SW2). Specifically, an anode of diode D3 is connected to the negative electrode of the adjacent battery cell C5, and a cathode of diode D3 is connected to the second terminal of the inductor L1. The diode D4 is connected between a positive electrode of the battery cell C2 adjacent to the outermost battery cell C1 in the positive electrode direction (i.e., the negative electrode of outermost battery cell C1 and the first terminal of the inductor L2) and the second terminal of inductor L1 (i.e., the second terminal of transistor SW2). Specifically, a cathode of diode D4 is connected to the positive electrode of the adjacent battery cell C2, and an anode of diode D4 is connected to the second terminal of the inductor L2.
The transistor SW1 is connected between the second terminal of the inductor L1 (i.e., the second terminal of the transistor SW2 and the cathode of the diode D3) and the second terminal of the inductor L2 (i.e., the first terminal of the transistor SW3 and the anode of diode D4). Specifically, a first terminal of the transistor SW1 is connected to the second terminal of the inductor L1, and a second terminal of the transistor SW1 is connected to the second terminal of the inductor L2.
The transistors SW1, SW2, and SW3 may be turned on or off in response to control signals that are transferred to their control terminals from a processing circuitry (122 of FIG. 1), for example, a driver of the processing circuitry 122. In some embodiments, the transistors SW1, SW2, and SW3 may be metal-oxide semiconductor field-effect transistors (MOSFETs). In this case, the transistors SW1, SW2, and SW3 may have body diodes. In one embodiment, as shown in FIG. 8, the transistors SW1, SW2, and SW3 may be n-channel transistors, for example, NMOS transistors. In this case, each of the transistors SW1, SW2, and SW3 has a drain, a source and a gate as the first terminal, the second terminal and the control terminal, respectively.
Referring to FIG. 9 and FIG. 10, when balancing is required to transfer energy of the outermost battery cells C1 and C6 to the inner battery cells C2 to C5, the transistors SW2 and SW3 are turned on in response to a control signal from a processing circuitry (122 of FIG. 1) at t₀. Then, a current path I₁ is formed through the outermost battery cell C1 in the positive electrode direction, the transistor SW2 and the inductor L1, and a current path I₂ is formed through the outermost battery cell C6 in the negative electrode direction, the inductor L2, and the transistor SW3. Currents I_L1 and I_L2 flowing through the inductors L1 and L2 gradually increase by voltages of the outermost battery cells C1 and C6, and currents I_C1 and I_C6 flowing through the outermost battery cells C1 and C6 also gradually increase. That is, the energy of the outermost battery cells C1 and C6 may be injected into the inductors L1 and L2 during a period from t₀ to t₁.
Next, referring to FIG. 9 and FIG. 11, the transistor SW2 and SW3 are turned off at t₁ so that a current path I₃ is formed through the inductor L1, the inner battery cells C2 to C5, and the diode D3, and a current path I₄ is formed through the inductor L2, the diode D4, and the inner battery cells C2 to C5. The currents I_L1 and I_L2 flowing through the inductors L1 and L2 are supplied to the inner battery cells C2 to C5, so the currents I_L1 and I_L2 flowing through the inductors L1 and L2 gradually decrease, and a current I_C2-C5 flowing through the inner battery cells C2 to C5 also gradually decreases. That is, the energy injected into the inductors L1 and L2 during the period from t₁ to t₂ is supplied to the inner battery cells C2-C5, so the inner battery cells C2 to C5 can be charged. Here, t₂ may be a time point when the currents I_L1 and I_L2 flowing through the inductors L1 and L2 become zero.
Next, the processing circuitry 122 may repeat an operation (t₀ to t₁) of injecting the currents I_L1 and I_L2 into the inductors L1 and L2 and an operation (t₁ to t₂) of charging the outermost battery cells C1 and C6 with the currents flowing through the inductors L1 and L2 until the balancing is complete.
On the other hand, when balancing is required to transfer energy of the inner battery cells C2 to C5 to the outermost battery cells C1 and C6, the balancing may be performed by repeating an operation of turning on and an operation of turning off the transistor SW1 as described with reference to FIG. 3 to FIG. 5.
Specifically, as shown in FIG. 2, the processing circuitry 122 first turns on the transistor SW1 to form a current path through the inner battery cells C2 to C5, the inductor L1, the transistor SW1, and the inductor L2. Accordingly, energy of the inner battery cells C2 to C5 can be injected into the inductors L1 and L2.
Next, the processing circuitry 122 turns off the transistor SW1 to form a current path through the inductor L1, the transistor SW2 and the outermost battery cell C1 in the positive electrode direction, and a current path through the inductor L2, the outermost battery cell C6 in the negative electrode direction, and the transistor SW3. Accordingly, the energy injected into the inductors L1 and L2 are supplied to the outermost battery cells C1 and C6, so the outermost battery cells C1 and C6 can be charged.
In some embodiments, the two current paths for supplying the energy to the outermost battery cells C1 and C6 may be formed through the body diode of transistor SW2 and the body diode of transistor SW3, respectively. In one embodiment, the transistors SW2 and SW3 may be turned off when the transistor SW1 is turned on, and the transistors SW2 and SW3 may be turned on when the transistor SW1 is turned off. In another embodiment, the transistors SW2 and SW3 may be maintained in the off-state regardless of on/off of the transistor SW1.
As described above, according to another embodiment, as in a case where the battery apparatus (100 of FIG. 1) is charged, when the voltage of the outermost battery cell is higher than the voltage of the inner battery cell, the energy of the outermost battery cell can be transferred to the inner battery cell to perform the balancing. In addition, as in a case where the battery apparatus 100 supplies energy to an external device (10 of FIG. 1), when the voltage of the outermost battery cell is lower than the voltage of the inner battery cell, the energy of the inner battery cell can be transferred to the outermost battery cell to perform the balancing.
The foregoing description and drawings are provided to better illustrate the teachings of the invention, but the scope of the present invention is defined by the appended claims.

Claims

A battery apparatus comprising a cell balancing apparatus (200), a processing circuitry (122) and a battery module, the battery module comprising:
a first battery cell (C1), a plurality of second battery cells (C2,..., C5), and a third battery cell (C6) connected in series, wherein the first battery cell and the third battery cell are outermost battery cells of the battery module and the plurality of second battery cells are inner battery cells of the battery module, wherein the first battery cell is an outermost battery cell in a positive electrode direction, and the third battery cell is an outermost battery cell in a negative electrode direction;

the cell balancing apparatus comprising:
a first inductor (L1) having a first terminal connected to a negative electrode of the first battery cell (C1);

a second inductor (L2) having a first terminal connected to a positive electrode of the third battery cell (C6);

a first transistor (SW1) connected between a second terminal of the first inductor and a second terminal of the second inductor, wherein the first transistor is configured to connect when turned on and disconnect when turned off the second terminal of the first inductor with the second terminal of the second inductor;

a second transistor (SW2) connected between the positive electrode of the first battery cell and the second terminal of the first inductor, wherein the second transistor is configured to connect when turned on and disconnect when turned off the positive electrode of the first battery cell with the second terminal of the first inductor;

a third transistor (SW3) connected between the second terminal of the second inductor and the negative electrode of the third battery cell, wherein the third transistor is configured to connect when turned on and disconnect when turned off the negative electrode of the third battery cell with the second terminal of the second inductor;

a first diode (D4) having a cathode connected to a negative electrode of the first battery cell (C1) and an anode connected to the second terminal of the inductor (L2); and

a second diode (D3) having a cathode connected to the second terminal of the first inductor (L1) and an anode connected to the positive electrode of the third battery cell (C6); and

wherein the processing circuitry (122) is configured to control an operation of turning on and an operation of turning off the first transistor, the second transistor and the third transistor, wherein the processing circuitry is configured to repeat the operation of turning on and the operation of turning off the second transistor and the third transistor during cell balancing for transferring energy of the first battery cell and the third battery cell to the plurality of second battery cells.
The battery apparatus of claim 1, wherein the processing circuitry is configured to repeat the operation of turning on and the operation of turning off the first transistor during cell balancing for transferring energy of the second battery cells to the first battery cell and third battery cell.
The battery apparatus of claim 2, wherein each of the second transistor and the third transistors has a body diode.
The battery apparatus of claim 2 or 3, wherein the processing circuitry is configured to transfer energy of the second battery cells to the first battery cell and the third battery cell by:
in a first period, injecting a current into the first inductor and the second inductor through a first current path (11) formed through the second battery cells, the first inductor, and the second inductor; and

in a second period, transferring the current injected into the first inductor to the first battery cell through a second current path (12) formed through the first inductor and the first battery cell, and transferring the current injected into the second inductor to the third battery cell through a third current path (13) formed through the second inductor and the third battery cell.
The battery apparatus of the combination of Claims 3 and 4, wherein the first transistor (SW1) is configured to form the first current path, the body diode of the second transistor (SW2) is configured to form the second current path, and the body diode of the third transistor (SW3) is configured to form the third current path.
The battery apparatus of claim 4, wherein the first transistor (SW1) is configured to form the first current path, the second transistor (SW2) is configured to form the second current path, and the third transistor (SW3) is configured to form the third current path.
The battery apparatus of any one of claims 1 to 4, wherein the processing circuitry is configured to transfer energy of the first battery cell and the third battery cell to the second battery cells by:
in a third period, injecting a current into the first inductor through a fourth current path (11) formed through the first battery cell and the first inductor, and injecting a current into the second inductor through a fifth current path (I2) formed through the third battery cell and the second inductor; and

in a fourth period, transferring the current injected into the first inductor to the second battery cells through a sixth current path (I3) formed through the first inductor and the second battery cells, and transferring the current injected into the second inductor to the second battery cells through a seventh current path (14) formed through the second inductor and the second battery cells.
The battery apparatus of claim 7, wherein the first transistor is configured to form the fourth current path, the second transistor is configured to form the fifth current path, the first diode (D4) is configured to form the seventh current path, and the second diode (D3) is configured to form the sixth current path.
A cell balancing method of the battery apparatus according to anyone of claims 4 to 8, the cell balancing method comprising:
in response to voltages of the first battery cell and the third battery cell being lower than voltages of the second battery cells, transferring energy of the second battery cells to the first battery cell and the third battery cell; and

in response to the voltages of the first battery cell and the third battery cell being higher than the voltages of the second battery cells, transferring energy of the first battery cell and the third battery cell to the second battery cells.