EP3714521A1

EP3714521A1 - Protection circuit for a shunt resistor and instrumentation device

Info

Publication number: EP3714521A1
Application number: EP17870634.7A
Authority: EP
Inventors: Dieter DORNBERGER; Rainer KUHNE; Michael Schadel
Original assignee: Framatome SA
Current assignee: Areva NP SAS
Priority date: 2017-11-21
Filing date: 2017-11-21
Publication date: 2020-09-30
Also published as: KR102525868B1; KR20200090844A; WO2019102247A1

Abstract

The present invention relates to a protection circuit (20) for a shunt resistor comprising: an input terminal (6a) and an output terminal (22), wherein the output terminal is adapted to be connected to a shunt resistor, a normally closed switch (V7) electrically connected between the input terminal (6a) and the output terminal (22), a timing circuit (24) adapted to alternately opening and closing the switch in case of an overvoltage, wherein the timing circuit is powered via the input terminal.

Description

Protection circuit for a shunt resistor and instrumentation device

The present invention concerns a protection circuit for a shunt resistor comprising: an input terminal and an output terminal, wherein the output terminal is adapted to be connected to a shunt resistor.

Further, the present invention concerns an instrumentation device comprising such a protection circuit.

Measured values of analog transducer are often provided as analog current signals. These analog transducers are connected to analog input components of an instrumentation and control system. Such input components often comprise a shunt resistor and an operational amplifier connected in parallel. These shunt resistors are often protected by additional passive or active protection circuits, for example using a TVS diode, varistor or a thermal fuse. Active protection circuits often comprise a combination of a Z-diode and a thyristor, as overcurrents may cause a permanent damage in the form of a change in the shunt resistance

DE 101 17 892 A1 discloses a limiting circuit for limiting an overvoltage. A shunt resistor is arranged in series with a normally open switch. The measured current about the shunt resistor is used to control the switch. In case of an overcurrent, the switch is cyclically switched by the timing circuit, which may include a voltage controlled oscillator. The shunt resistor is not protected by the switch.

US 2006/0158810 A1 discloses a current surge limiter circuit with a disable function. For that purpose, the circuit includes a current sensor, which senses and controls current flow through a transistor (normally open).

Object of the invention is to provide an improved protection circuit for a shunt resistor, in which the usage of a small and cheap shunt resistor is enabled.

According to one aspect, a protection circuit for a shunt resistor comprising: an input terminal and an output terminal, wherein the output terminal is adapted to be connected to a shunt resistor, a normally closed switch electrically connected between the input terminal and the output terminal, a timing circuit adapted to alternately opening and closing the switch in case of an overvoltage, wherein the timing circuit is powered via the input terminal..

Further embodiments may relate to one or more of the following features, which may be combined in any technical feasible combination:

- the normally closed switch is a field effect transistor, in particular a n-channel field effect transistor, for example a depletion mode n-channel field effect transistor;

- the timing circuit is electrically connected in parallel to the normally closed switch; - the timing circuit includes an RC circuit and a bistable device, the bistable device being electrically connected to the RC circuit, in particular to enable charging and discharging of a capacitor of the RC circuit, wherein the output of the bistable device is electrically connected to the output terminal;

- the bistable device includes an comparator comprising a positive power supply terminal and a negative power supply terminal, wherein positive power supply terminal and the negative power supply terminal are connected in parallel to the capacitor of the RC circuit;

- a reference voltage is applied to the inverting input of the comparator, wherein the reference voltage is provided by the comparator itself;

- the comparator is not provided with an external power supply;

- the comparator includes a push pull output stage;

- the protection circuit further comprises an activation switch adapted to open the normally closed switch in case of an overvoltage and, in particular, to activate the timing circuit;

- the activation switch is a transistor, in particular a bipolar junction transistor;

- the gate of the transistor is controlled via a voltage divider adapted to be connected in parallel to the shunt resistor;

- a first diode, is connected between the gate of the normally closed switch and the one of the terminals, in particular the collector, of the activation switch, wherein in particular the cathode of the diode connected to the terminal of the activation switch;

- a resistor is coupled between the gate and the source of the normally closed switch; and/or

- a second diode is connected between the gate of the normally closed switch and the timing circuit, in particular to a terminal of the capacitor.

According to another aspect, an instrumentation device is provided comprising a shunt resistor and an amplifier connected in parallel to the shunt resistor, characterized in that the instrumentation device further includes a protection circuit according to one of the preceding claims, wherein the output of the protection circuit is electrically connected to the shunt resistor wherein, in particular it comprises a second operational amplifier, the inputs of the second operational amplifier are connected in parallel to the shunt resistor.

Further advantages, features, aspects and details are evident from the dependent claims, the description and the drawings.

So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be read by reference to embodiments. The accompanying drawings relate to embodiments of the invention and are described in the following:

Figure 1 shows schematically a instrumentation circuit; and

Figure 2 shows schematically a protection circuit for a shunt resistor.

Figure 1 shows schematically an instrumentation circuit 1 . The circuit comprises an transducer 3, for example an analog transducer 3, which provides a measurement value as an analog current signal, where the amount of current corresponds to the measured value. For example, these analog current signals are transmitted in a signal range between 0 to 20 mA or between 4 mA and 20 mA. . For example the analog transducer is used for measuring temperature, pressure, level etc.

The transducer 3 is connected in series to an analog input 5 of an instrumentation device. The analog input 5 comprises two input terminals 6a and 6b. For example, the analog input 5 includes a shunt resistor 7 and an operational amplifier 9. The inputs 1 1 of the operational amplifier 9 are connected in parallel to the shunt resistor 7. In other words, the operational amplifier 9 amplifies the voltage difference between the two contacts of the shunt resistor 7.

According to embodiments, the accuracy of the analog input 5 is mainly determined by the shunt resistor 7. Thus, the shunt resistor 7 is a very sensitive part and must therefore be protected against damages caused by overload. For example, the shunt resistor 7 has a temperature coefficient of less than 5 ppm/K, in particular less than 2 ppm/K (parts per million per Kelvin). The temperature coefficient is defined for the defined operating temperature range of the resistor. In an embodiment, the shunt resistor 7 is a 30 Ohms resistor. The line current or input current applied to the input terminal 6a flowing through the shunt resistor 7 causes a voltage drop which is fed to the amplifier circuitry, for example the operational amplifier 9.

Figure 2 shows a protection circuit 20, in particular an active protection circuit, according to an embodiment. The protection circuit 20 is electrically connected between the input terminals 6a, 6b of the analog input 5 and the shunt resistor 7. For that purpose, the protection circuit 20 includes two output terminals 22, 23 which are electrically connected to the shunt resistor 7. The first output terminal 22 is electrically connected to the first terminal of the shunt resistor 7 and the second output terminal 23 is electrically connected to the second terminal of the shunt resistor 7.

The protection circuit 20 comprises a normally closed switch V7, for example a depletion mode FET (field effect transistor), in particular an n-channel FET. A depletion mode FET, in particular the switch V7, is conductive between the drain and the source without requiring a gate voltage. One of the terminals of the normally closed switch, in particular the drain of the FET is connected to the input terminal 6a. The second terminal of the switch V7, in particular the source is connected to the first output terminal 22 of the protection circuit and thus to the shunt resistor 7 (or R7). In other words, the input line current is routed via the switch V7 and the shunt resistor 7.

The switch V7 is in particular controlled by an activation switch V8, which is, for example, a transistor, in particular a bipolar transistor, a resistor R6 connected between the gate and the source of the switch V7, and a resistor series comprising resistors R5 and R8, which are a voltage divider for controlling the base of the activation switch V8. In other words the base of the activation switch V8 or the activation terminal of the activation switch V8 is electrically connected between the resistors R5 and R8. The resistor series R5 and R8 is connected electrically in parallel to the shunt resistor 7 (or R7) and to the first and second output terminals 22, 23 of the protection circuit. The terminals of the activation switch V8, in particular the emitter and collector are connected between the gate of the switch V7 and the second input terminal 6b/the second output terminal 23. In other words, the emitter is electrically connected to the second input terminal 6b and the second output terminal 23 and the collector is electrically connected to the gate of the switch V7, in particular via a diode.

According to an example, the resistance of R5 is 16 kQ and the resistance of R8 is 12 kQ. According to an embodiment, the resistor R6 has a resistance of 100 kQ. In other embodiments, the resistances may have also other values, which may be determined. For example, the voltage drop of R7 is derived from the input current. The maximum voltage drop of R7 defines the voltage protection threshold. With the resistors R5 and R8 the voltage protection threshold is set. This value depends on the power dissipation of the shunt resistor.

In case of an overvoltage, for example if the voltage at the input terminal 6a is higher than a reference voltage, the normally closed switch V7 is adapted to be opened and thus the shunt resistor 7 protected.

The protection circuit 20 further comprises a timing circuit 24. The timing circuit 24 is also adapted to control the switching of the switch V7 as it will be explained later, in particular as long as the overvoltage persists. The repetition rate of the timing circuit 24 depends on the overvoltage applied to the input terminal 6a. The timing circuit 24 is electrically connected to the input terminal 6a and to the output terminal 22. In other words, the timing circuit is electrically connected in parallel to the normally closed switch Ml. The timing circuit 24 comprises a resistance R1 and a capacitor C24 forming an RC circuit in a series connection. According to an embodiment, the resistor R1 has a resistance of 47 kD and the capacitor has a capacitance of 10 pF. The capacitor C24 has a positive terminal, electrically connected to the resistance R1 and a negative terminal. The values of the resistance R1 and the capacitor C24 are selected to tune the repetition rate of the timing circuit 24, as the repetition rate depends at least in part on the charging rate of the capacitor C24, as it will be explained later. The RC circuit, in particular the resistor R1 of the RC circuit, is electrically connected to the input terminal 6a.

Further, the timing circuit 24 comprises a comparator circuit comprising a comparator N7 and having a push-pull output stage and a dedicated voltage reference output 25, and generates, when active, a hysteresis. According to an embodiment, the voltage reference output 25 provides a voltage U_COmpref of 1 ,242 V. In other embodiments, the voltage reference output 25 provides voltages U_COmpref between 0,5V and 2,5 V, in particular between 1 V and 1 ,5V. The voltage reference output 25 is connected or reference voltage U_COmpRef is applied to the inverting input of the comparator N7. According to an embodiment, the device implementing the comparator N7 of TEXAS INSTRUMENTS INCORPORATED, Dallas, TLV3012AIDCKR. The hysteresis depends on resistors R2, R3 and R4 of the operational amplifier circuit. In other words, the comparator circuit acts a bistable device switching between two defined output voltages or states, namely a low state and a high state. The comparator N7 includes a push pull output stage having two field effect transistors (FET)

The output 30 of the comparator N7 is connected to the output terminal 22 of the active protection circuit 20.

The positive power supply terminal 26 of the comparator N7 is connected to the positive terminal of the capacitor C24 and via the resistance R1 to the input terminal 6a. In other words, the comparator N7 is powered by the input current in case of a high voltage, in particular a voltage drop via the capacitor C24.

The negative power supply terminal 28 of the comparator N7 is connected to the negative terminal of the capacitor C24.

Generally, the comparator N7 only needs a few micro amperes of supply current.

Further, the protection circuit 20 includes two Schottky diodes V2 and V3. The diode V2 is electrically connected between the gate of the switch V7 and the negative terminal of the capacitor C24. The diode V3 is connected between the gate of the switch V7 and the collector of the transistor or a contact of the switch V8.

In the following, the operation of the protection circuit 20 will be explained in more detail. In the normal operation, which means that the input current applied to input terminal 6a is below 20 mA and the voltage difference between the input terminals 6a and 6b is approximately 0,6 V, the gate of the switch V7 will be held on source level of the source of the switch V7 by resistance R6. Further, the base voltage or control voltage of the switch V8 is below to 0,6 V. Further, the timing circuit 24 including the comparator N7 is not active, as the current directly passes from the input terminal 6a to the shunt resistor 7.

In case of an overvoltage or overcurrent situation, for example, when the input current at the input terminal 6a reaches about 40 mA, the base voltage or control voltage between the resistors R5 and R8 increases and the switch or transistor V8 will have an increased current flow between the collector and the emitter. In other words, when the voltage via R8 reaches 0,7 V, the transistor V8 will be conductive. Then, the gate level of the switch V7 will be lower than the source level and the switch V7 will be non-conductive. In other words the contacts of the switch V7 will open and thus counteracting a further increase of the line current between the drain and source. The reference voltage for activating the switch V7 depends on the resistors R5, R8 and the shunt resistor 7.

In case the switch or transistor V7 is partially opened or open, the drain-source voltage of the switch V7 will increase and the capacitor C24 is charged via the resistor R1. From the negative terminal of the capacitor C24 the current will flow to the negative supply terminal 28 of the comparator N7 and from its output terminal 30 to the source of the switch V7, in particular via the push pull output stage of the comparator N7.

The output of the comparator N7 will initially be in the low state. When the voltage across the capacitor C24, i.e. between the positive and negative terminal of the capacitor C24, reaches an upper threshold, for example about 4,5 V, the voltage resulting from the network of resistance R2 through resistance R4 connected to the non-inverting input will reach the reference voltage U_COmpref, for example of 1 ,242 V, connected to the inverting input.

Then, the output at the output terminal 30 will switch to high state. A hysteresis is established by the resistance R3. In high state of comparator N7 the positive terminal of the capacitor C24 will be connected via the output 30 to the source of the transistor V7. As a consequence, the negative terminal of the capacitor C24 will apply a negative voltage to the gate via the diode V2. The diode V3 is required to decouple that voltage from switch V8. The capacitor C24 will then be discharged mainly by the current through the resistance R6, in particular via the positive power supply terminal 26, the push-pull output stage (which is in a high stage) of the comparator N7, the output 30 of the comparator N7, the resistance R6 and the diode V2. When the voltage has decreased to a lower threshold, for example about 3V, which is still sufficient to keep the line current cut off by the switch V7, the output of the comparator N7 will switch back to the low state. Then, the capacitor C24 can be charged again while the line or input current can flow temporarily to the shunt resistor 7. In such a case, the switch V7 will be conductive, but the current will be limited (cut off). This means the circuit is interrupted for short time intervals and the current is limited.

When the overvoltage is no longer present normal operation will now be resumed.

The mentioned upper and lower threshold voltages can be calculated as following:

In case the comparator reference voltage being 1 ,242 V, the resistance R2 having 1 MW, the resistance R3 having 2 MW, and the resistance R4 having 475 kW, the upper threshold voltage is 4,478 V and the lower threshold voltage is 2,985 V. The voltages are calculated with respect to the second input terminal 6b and the second output terminal 23.

It should be noted that the resistances may be also different to the resistances mentioned above. Then, the time period between the opening and the closing of the switch is different. The resistances of the protection circuit and the capacitance are chosen to enable a sufficient protection of the shunt resistor 7.

The higher the drain-source voltage of the switch or transistor V7 the shorter will be the time required to get up from 3 V to 4,5 V at the positive terminal of the capacitor C24 again. The discharge time is constant.

In other words, the protection circuit 20 cut the line current applied to the input terminal 6a for short time intervals, to avoid thermal destruction of the shunt resistor 7. For example, the repetition rate for switching on and off the switch V7 is between 100 ms and 400 ms, in case of an ongoing overvoltage.

The average power dissipation of the transistor V7 will not increase with the drain- source voltage because higher peak power will be compensated by shorter pulse duration. The worst case will occur at a drain-source voltage only just insufficient to trigger a current cutoff interval. As there will be a small voltage drop at the resistor R1 , the critical drain-source voltage can be, according to the above example, up to about 5 V causing a worst case power dissipation of about 275 mW in the transistor V7. In other words, in some embodiments, no heat sink is required. For example, in case the thermal resistance of the switch or transistor V7 at minimal PCB footprint is 1 15 K/W, the maximum junction temperature is 150 °C, ambient temperature is 75 ⁰ C allows up to 652 mW power dissipation. In worst case at high temperature the current may rise up to about 55 mA.

According to the invention, the transistor is a field effect transistor (FET), in particular a depletion mode FET that is able to withstand voltages of up to more than 100 V. Most of the other components of the circuit according to the invention do not have to tolerate high voltage, which leads to a compact and easy protection solution of voltages up to about 100V. Thus, it is possible to use smaller and cheaper shunt resistors, which is the most expensive component in typical noncomplex, high precision 0/4 to 20mA input stages.

According to the invention, an active overvoltage and/or overcurrent protection circuit is provided, which is powered by the overload itself and completely transparent to the signal during normal operation.

For example, it is possible to protect ultra-precise shunt-based instrumentation and control inputs by inducing only minimal leakage current.

Claims

1 Protection circuit (20) for a shunt resistor comprising:

an input terminal (6a) and an output terminal (22), wherein the output terminal is adapted to be connected to a shunt resistor,

a normally closed switch (V7) electrically connected between the input terminal (6a) and the output terminal (22),

a timing circuit (24) adapted to alternately opening and closing the switch in case of an overvoltage, wherein the timing circuit is powered via the input terminal.

2- Protection circuit for a shunt resistor according to claim 1 , wherein the normally closed switch (V7) is a field effect transistor, in particular a n-channel field effect transistor, for example a depletion mode n-channel field effect transistor.

3.- Protection circuit for a shunt resistor according to claim 1 or 2, wherein the timing circuit is electrically connected in parallel to the normally closed switch (V7).

4. -Protection circuit according to one of the preceding claims, wherein the timing circuit (24) includes an RC circuit (R1 , C24) and a bistable device (R2, R3, R4, N7), the bistable device being electrically connected to the RC circuit, in particular to enable charging and discharging of a capacitor (C24) of the RC circuit, wherein the output of the bistable device is electrically connected to the output terminal (22).

5.- Protection circuit according to claim 4, wherein the bistable device includes an comparator (N7) comprising a positive power supply terminal (26) and a negative power supply terminal (28), wherein positive power supply terminal (26) and the negative power supply terminal (28) are connected in parallel to the capacitor (C24) of the RC circuit.

6.- Protection circuit according to claim 5, wherein a reference voltage is applied to the inverting input of the comparator (N7), wherein the reference voltage is provided by the comparator (N7) itself.

7. Protection circuit according to claim 5 or 6, wherein the comparator is not provided with an external power supply.

8.- Protection circuit according to one of the claims 5 to 7, wherein the comparator (N7) includes a push pull output stage.

9.- Protection circuit according to one of the preceding claims, further comprising an activation switch (V8) adapted to open the normally closed switch (V7) in case of an overvoltage and, in particular, to activate the timing circuit (24).

10.- Protection circuit according to claim 9, wherein the activation switch (V8) is a transistor, in particular a bipolar junction transistor.

1 1 .- Protection circuit according to claim 10, wherein the gate of the transistor (V8) is controlled via a voltage divider adapted to be connected in parallel to the shunt resistor (7).

12.- Protection circuit according to one of the claims 9 to 1 1 , when depending on claim 2, wherein a first diode (V3), is connected between the gate of the normally closed switch (V7) and the one of the terminals, in particular the collector, of the activation switch, wherein in particular the cathode of the diode connected to the terminal of the activation switch (V8).

13.- Protection circuit according to one of the claims 2 to 10, wherein a resistor is coupled between the gate and the source of the normally closed switch (V7).

14.- Protection circuit according to one of the claims 2 to 12, wherein a second diode (V2) is connected between the gate of the normally closed switch (V7) and the timing circuit (24), in particular to a terminal of the capacitor (C24).

15.-lntrumentation device comprising a shunt resistor (7) and an amplifier (9) connected in parallel to the shunt resistor, characterized in that the instrumentation device further includes a protection circuit (20) according to one of the preceding claims, wherein the output of the protection circuit is electrically connected to the shunt resistor (7) wherein, in particular it comprises a second operational amplifier (9), the inputs (1 1 ) of the second operational amplifier (9) are connected in parallel to the shunt resistor (7).