EP3656045A1 - High voltage generation circuit and method - Google Patents

High voltage generation circuit and method

Info

Publication number
EP3656045A1
EP3656045A1 EP18834510.2A EP18834510A EP3656045A1 EP 3656045 A1 EP3656045 A1 EP 3656045A1 EP 18834510 A EP18834510 A EP 18834510A EP 3656045 A1 EP3656045 A1 EP 3656045A1
Authority
EP
European Patent Office
Prior art keywords
voltage
multiplier
terminal
direct current
generation circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP18834510.2A
Other languages
German (de)
French (fr)
Other versions
EP3656045A4 (en
Inventor
Saijun Mao
Yi Liao
Stewart Blake BRAZIL
Yunzheng CHEN
Xinhong HAN
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Baker Hughes ESP Inc
Original Assignee
GE Oil and Gas ESP Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GE Oil and Gas ESP Inc filed Critical GE Oil and Gas ESP Inc
Publication of EP3656045A1 publication Critical patent/EP3656045A1/en
Publication of EP3656045A4 publication Critical patent/EP3656045A4/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M11/00—Power conversion systems not covered by the preceding groups
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/06—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • H02M7/10—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode arranged for operation in series, e.g. for multiplication of voltage
    • H02M7/103—Containing passive elements (capacitively coupled) which are ordered in cascade on one source
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/53—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
    • H03K3/57—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/007—Plural converter units in cascade
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/1557—Single ended primary inductor converters [SEPIC]

Definitions

  • This disclosure relates generally to the field of voltage generating, and more particularly to a high voltage generation circuit and a high voltage generation method.
  • a conventional high voltage generation circuit usually includes a voltage multiplier for multiplying to a higher voltage.
  • the voltage multiplier includes a plurality of super capacitors which are connected in series.
  • voltage unbalance of the super capacitors would be caused.
  • a high voltage generation circuit comprises a battery for providing a first direct current voltage, a first inductance connected in series with the battery, a power switch and a voltage multiplier.
  • the power switch is configured for converting the first direct current voltage to a pulse voltage.
  • the voltage multiplier is configured for multiplying the pulse voltage to a second direct current voltage.
  • the second direct current voltage is higher than the first direct current voltage.
  • the voltage multiplier comprises super capacitors which are connected in series.
  • a high voltage generation method comprises: providing a first direct current voltage; converting the first direct current voltage, by a power switch, to a pulse voltage; and multiplying the pulse voltage, by a voltage multiplier comprising super capacitors connected in series, to a second direct current voltage, the second direct current voltage being higher than the first direct current voltage.
  • FIG. 1 is a schematic diagram of a high voltage generation circuit in accordance with a first embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a high voltage generation circuit in accordance with a second embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a high voltage generation circuit in accordance with a third embodiment of the present disclosure.
  • FIG. 4 is a flow chart of an exemplary high voltage generation method in accordance with an embodiment of the present disclosure.
  • connection and “coupled” are not restricted to physical or mechanical connections or couplings, and can include electrical connections or couplings, whether direct or indirect.
  • Terms indicating specific locations such as “top”, “bottom”, “left”, and “right”, are descriptions with reference to specific accompanying drawings. Embodiments disclosed in the present disclosure may be placed in a manner different from that shown in the figures. Therefore, the location terms used herein should not be limited to locations described in specific embodiments.
  • FIG. 1 illustrates a schematic diagram of a high voltage generation circuit 100 in accordance with a first embodiment of the present disclosure.
  • the high voltage generation circuit 100 of the first embodiment may include a battery Vin, a first inductance Li, a power switch Si and a voltage multiplier M.
  • the battery Vin can provide a first direct current (DC) voltage.
  • the first inductance Li is connected in series with the battery Vin.
  • the power switch S i can convert the first DC voltage from the battery Vin to a pulse voltage.
  • the power switch Si may be for example a transistor Si.
  • a drain electrode d and a source electrode s of the transistor Si is coupled with the voltage multiplier M, and the source electrode s of the transistor Si is grounded.
  • One terminal of the first inductance Li is connected with a positive terminal of the battery Vin and the other terminal of the first inductance Li is the drain electrode d of the transistor S i.
  • the source electrode s of the transistor Si is connected to a negative terminal of the battery Vin.
  • the voltage multiplier M can multiply the pulse voltage to a second DC voltage.
  • the second DC voltage is higher than the first DC voltage.
  • the first DC voltage is a low voltage
  • the second DC voltage is a high voltage.
  • the voltage multiplier includes super capacitors which are connected in series.
  • the voltage multiplier M may include at least two multiplier stages Mi-M n cascaded. Each of the at least two multiplier stages Mi-M n has one of the super capacitors connected in series. Each of the at least two multiplier stages Mi-M n has a first terminal 1, a second terminal 2 and a third terminal 3. For a first multiplier stage Mi, the first terminal 1 and the second terminal 2 of the first multiplier stage Mi are respectively connected with the drain electrode d and the source electrode s of the transistor Si.
  • the first terminal 1 and the second terminal 2 of one multiplier stage are respectively connected with the first terminal 1 and the third terminal 3 of a previous multiplier stage, and the third terminal 3 of the one multiplier stage is connected to the second terminal 2 of a next multiplier stage.
  • the first terminal 1 and the second terminal 2 of the second multiplier stage M2 are respectively connected with the first terminal 1 and the third terminal 3 of the first multiplier stage Mi, and the third terminal 3 of the second multiplier stage M2 is connected to the second terminal 2 of the third multiplier stage M3.
  • the first terminal 1 and the second terminal 2 of the third multiplier stage M3 are respectively connected with the first terminal 1 and the third terminal 3 of the second multiplier stage M 2 , and the third terminal 3 of the third multiplier stage M3 is connected to the second terminal 2 of the fourth multiplier stage.
  • the first terminal 1 and the second terminal 2 of the n th multiplier stage M n are respectively connected with the first terminal 1 and the third terminal 3 of the (n-l) th multiplier stage.
  • Each of the at least two multiplier stages Mi-M n may include a first capacitor, a second capacitor, a first diode and a second diode.
  • the first capacitor and the first diode are connected in series between the first terminal 1 and the third terminal 3, the second diode is coupled between a connection point of the first capacitor and the first diode and the second terminal 2, and the second capacitor is coupled between the second terminal 2 and the third terminal 3.
  • the first capacitor Ci and the first diode D2 of the first multiplier stage Mi are connected in series between the first terminal 1 and the third terminal 3 of the first multiplier stage Mi, the second diode Di of the first multiplier stage Mi is coupled between a connection point of the first capacitor Ci and the first diode D2 and the second terminal 2 of the first multiplier stage Mi, and the second capacitor C s i of the first multiplier stage Mi is coupled between the second terminal 2 and the third terminal 3 of the first multiplier stage Mi.
  • the first capacitor C2 and the first diode D4 of the second multiplier stage M2 are connected in series between the first terminal 1 and the third terminal
  • the second diode D3 of the second multiplier stage M2 is coupled between a connection point of the first capacitor C2 and the first diode D4 and the second terminal 2 of the second multiplier stage M 2
  • the second capacitor C S 2 of the second multiplier stage M2 is coupled between the second terminal 2 and the third terminal 3 of the second multiplier stage M 2 .
  • the first capacitor C3 and the first diode D6 of the third multiplier stage M3 are connected in series between the first terminal 1 and the third terminal 3 of the third multiplier stage M3, the second diode D5 of the third multiplier stage M3 is coupled between a connection point of the first capacitor C3 and the first diode D6 and the second terminal 2 of the third multiplier stage M3, and the second capacitor C S 3 of the third multiplier stage M3 is coupled between the second terminal 2 and the third terminal 3 of the third multiplier stage M3.
  • the first capacitor Cn and the first diode Om of the n th multiplier stage M n are connected in series between the first terminal 1 and the third terminal 3 of the ⁇ ⁇ multiplier stage Mn, the second diode D 2n -i of the n th multiplier stage M n is coupled between a connection point of the first capacitor Cn and the first diode D2n and the second terminal 2 of the n th multiplier stage M n , and the second capacitor C S n of the n th multiplier stage M n is coupled between the second terminal 2 and the third terminal 3 of the n th multiplier stage Mn.
  • the second capacitor Csi-Csn of each multiplier stage Mi-Mn is the super capacitor.
  • the high voltage generation circuit 100 of the present disclosure use a single switch based voltage multiplier to achieve a high voltage output and achieve cell balancing for the super capacitor Csi-Csn of each multiplier stage Mi-M n .
  • the high voltage generation circuit 100 of the present disclosure can have long life time, low power consumption, compact size and low cost.
  • FIG. 2 illustrates a schematic diagram of a high voltage generation circuit 200 in accordance with a second embodiment of the present disclosure.
  • the high voltage generation circuit 200 of the second embodiment may further include a resonant circuit 40.
  • the resonant circuit 40 is coupled between the power switch Si and the voltage multiplier M, and can convert the pulse voltage to a resonant voltage. Under this circumstance, the voltage multiplier M can multiply the resonant voltage to the second DC voltage.
  • the resonant circuit 40 includes the first inductance Li, a third capacitor Cpi, a fourth capacitor Cs and a second inductance Ls.
  • the third capacitor CPI is connected in parallel with the power switch S ⁇ .
  • the fourth capacitor Cs and the second inductance Ls are connected in series between the third capacitor CPI and the voltage multiplier M.
  • the high voltage generation circuit 200 of the present disclosure can achieve a high voltage output and achieve cell balancing for the super capacitor Csi-Csn of each multiplier stage Mi-Mn.
  • the high voltage generation circuit 200 of the present disclosure can have long life time, low power consumption, compact size and low cost.
  • FIG. 3 illustrates a schematic diagram of a high voltage generation circuit 300 in accordance with a third embodiment of the present disclosure.
  • the high voltage generation circuit 300 of the third embodiment may further include an isolated transformer T.
  • the isolated transformer T is coupled between the resonant circuit 40 and the voltage multiplier M.
  • the transformer T has a primary winding Wi coupled with the resonant circuit 40 and a secondary winding W ⁇ 2 coupled with the voltage multiplier M.
  • the high voltage generation circuit 300 may further include a fifth capacitor CP2.
  • the fifth capacitor CP2 is coupled in parallel between the secondary winding W2 of the transformer T and the voltage multiplier M.
  • the high voltage generation circuit 300 of the present disclosure can achieve a high voltage output and achieve cell balancing for the super capacitor C s i-C S n of each multiplier stage Mi-Mn.
  • the high voltage generation circuit 300 of the present disclosure can have long life time, low power consumption, compact size and low cost.
  • FIG. 4 illustrates a flow chart of an exemplary high voltage generation method in accordance with an embodiment of the present disclosure.
  • the high voltage generation method in accordance with an embodiment of the present disclosure may include the steps as follows.
  • a first direct current voltage may be provided, for example by a battery Vin.
  • the first direct current voltage may be converted to a pulse voltage by a power switch S i, for example a transistor.
  • the pulse voltage may be multiplied to a second DC voltage by a voltage multiplier M comprising super capacitors connected in series.
  • the second DC voltage is higher than the first DC voltage.
  • the high voltage generation method of the present disclosure may further include a block B4 after block B2 and before block B3.
  • the pulse voltage may be converted to a resonant voltage, for example by a resonant circuit 40 (as shown in FIG. 2), and then the process goes to block B3.
  • the resonant voltage may be multiplied to the second DC voltage.
  • the high voltage generation method of the present disclosure may further include a block B5 after block B4 and before block B3.
  • the resonant voltage may be converted to a third AC voltage, for example by an isolated transformer T (as shown in FIG. 3), and then the process goes to block B3.
  • the third AC voltage may be multiplied to the second DC voltage. The value of the first DC voltage is less than the value of the third AC voltage and the value of the third AC voltage is less than the value of the second DC voltage.
  • the high voltage generation method of the present disclosure can achieve a high voltage output and have low power consumption.
  • steps of the high voltage generation method in accordance with embodiments of the present disclosure are illustrated as functional blocks, the order of the blocks and the separation of the steps among the various blocks shown in FIG. 4 are not intended to be limiting.
  • the blocks may be performed in a different order and a step associated with one block may be combined with one or more other blocks or may be sub-divided into a number of blocks.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

A high voltage generation circuit is disclosed, which includes a battery for providing a first direct current voltage, a first inductance connected in series with the battery, a power switch and a voltage multiplier. The power switch is configured for converting the first direct current voltage to a pulse voltage. The voltage multiplier is configured for multiplying the pulse voltage to a second direct current voltage. The second direct current voltage is higher than the first direct current voltage. The voltage multiplier includes super capacitors which are connected in series. A high voltage generation method is also disclosed.

Description

HIGH VOLTAGE GENERATION CIRCUIT AND METHOD
BACKGROUND
[0001] This disclosure relates generally to the field of voltage generating, and more particularly to a high voltage generation circuit and a high voltage generation method.
[0002] In many power generation systems, such as a downhole power generation system, it is required that a high direct current (DC) voltage is supplied to a load. Thus, such the power generation system usually needs a high voltage generation circuit to provide a desired voltage to the load.
[0003] A conventional high voltage generation circuit usually includes a voltage multiplier for multiplying to a higher voltage. The voltage multiplier includes a plurality of super capacitors which are connected in series. However, due to difference of the super capacitors, in the operation of the high voltage generation circuit, voltage unbalance of the super capacitors would be caused.
[0004] Therefore, in the view of the foregoing, a need how to achieve cell balancing for super capacitors in the condition of outputting a high voltage is becoming increasingly urgent.
BRIEF DESCRIPTION
[0005] In one aspect of embodiments of the present disclosure, a high voltage generation circuit is provided. The high voltage generation circuit comprises a battery for providing a first direct current voltage, a first inductance connected in series with the battery, a power switch and a voltage multiplier. The power switch is configured for converting the first direct current voltage to a pulse voltage. The voltage multiplier is configured for multiplying the pulse voltage to a second direct current voltage. The second direct current voltage is higher than the first direct current voltage. The voltage multiplier comprises super capacitors which are connected in series.
[0006] In another aspect of embodiments of the present disclosure, a high voltage generation method is provided. The high voltage generation method comprises: providing a first direct current voltage; converting the first direct current voltage, by a power switch, to a pulse voltage; and multiplying the pulse voltage, by a voltage multiplier comprising super capacitors connected in series, to a second direct current voltage, the second direct current voltage being higher than the first direct current voltage. DRAWINGS
[0007] These and other features, aspects, and advantages of the present disclosure will become better understood when the following detailed description is read with reference to the accompanying drawings in which like characters represent like parts throughout the drawings, wherein:
[0008] FIG. 1 is a schematic diagram of a high voltage generation circuit in accordance with a first embodiment of the present disclosure;
[0009] FIG. 2 is a schematic diagram of a high voltage generation circuit in accordance with a second embodiment of the present disclosure;
[0010] FIG. 3 is a schematic diagram of a high voltage generation circuit in accordance with a third embodiment of the present disclosure; and
[0011] FIG. 4 is a flow chart of an exemplary high voltage generation method in accordance with an embodiment of the present disclosure.
DETAILED DESCRIPTION
[0012] Embodiments of the present disclosure will be described hereinbelow with reference to the accompanying drawings. In the following description, well-known functions or constructions are not described in detail to avoid obscuring the disclosure in unnecessary detail.
[0013] Unless defined otherwise, technical and scientific terms used herein have the same meaning as is commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first", "second", and the like, as used herein do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms "a" and "an" do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced items. The term "or" is meant to be inclusive and mean either or all of the listed items. The use of "including," "comprising" or "having" and variations thereof herein are meant to encompass the items listed thereafter and equivalents thereof as well as additional items. The terms "connected" and "coupled" are not restricted to physical or mechanical connections or couplings, and can include electrical connections or couplings, whether direct or indirect. In addition, Terms indicating specific locations, such as "top", "bottom", "left", and "right", are descriptions with reference to specific accompanying drawings. Embodiments disclosed in the present disclosure may be placed in a manner different from that shown in the figures. Therefore, the location terms used herein should not be limited to locations described in specific embodiments.
[0014] First Embodiment of High Voltage Generation Circuit
[0015] FIG. 1 illustrates a schematic diagram of a high voltage generation circuit 100 in accordance with a first embodiment of the present disclosure. As shown in FIG. 1, the high voltage generation circuit 100 of the first embodiment may include a battery Vin, a first inductance Li, a power switch Si and a voltage multiplier M. The battery Vin can provide a first direct current (DC) voltage. The first inductance Li is connected in series with the battery Vin.
[0016] The power switch S i can convert the first DC voltage from the battery Vin to a pulse voltage. The power switch Si may be for example a transistor Si. A drain electrode d and a source electrode s of the transistor Si is coupled with the voltage multiplier M, and the source electrode s of the transistor Si is grounded. One terminal of the first inductance Li is connected with a positive terminal of the battery Vin and the other terminal of the first inductance Li is the drain electrode d of the transistor S i. The source electrode s of the transistor Si is connected to a negative terminal of the battery Vin.
[0017] The voltage multiplier M can multiply the pulse voltage to a second DC voltage. The second DC voltage is higher than the first DC voltage. Usually, the first DC voltage is a low voltage, and the second DC voltage is a high voltage. The voltage multiplier includes super capacitors which are connected in series.
[0018] The voltage multiplier M may include at least two multiplier stages Mi-Mn cascaded. Each of the at least two multiplier stages Mi-Mn has one of the super capacitors connected in series. Each of the at least two multiplier stages Mi-Mn has a first terminal 1, a second terminal 2 and a third terminal 3. For a first multiplier stage Mi, the first terminal 1 and the second terminal 2 of the first multiplier stage Mi are respectively connected with the drain electrode d and the source electrode s of the transistor Si. For a second multiplier stage M2 to a last multiplier stage Mn, the first terminal 1 and the second terminal 2 of one multiplier stage are respectively connected with the first terminal 1 and the third terminal 3 of a previous multiplier stage, and the third terminal 3 of the one multiplier stage is connected to the second terminal 2 of a next multiplier stage.
[0019] For example, the first terminal 1 and the second terminal 2 of the second multiplier stage M2 are respectively connected with the first terminal 1 and the third terminal 3 of the first multiplier stage Mi, and the third terminal 3 of the second multiplier stage M2 is connected to the second terminal 2 of the third multiplier stage M3. The first terminal 1 and the second terminal 2 of the third multiplier stage M3 are respectively connected with the first terminal 1 and the third terminal 3 of the second multiplier stage M2, and the third terminal 3 of the third multiplier stage M3 is connected to the second terminal 2 of the fourth multiplier stage. The first terminal 1 and the second terminal 2 of the nth multiplier stage Mn are respectively connected with the first terminal 1 and the third terminal 3 of the (n-l)th multiplier stage.
[0020] Each of the at least two multiplier stages Mi-Mn may include a first capacitor, a second capacitor, a first diode and a second diode. For each multiplier stages Mi-Mn, the first capacitor and the first diode are connected in series between the first terminal 1 and the third terminal 3, the second diode is coupled between a connection point of the first capacitor and the first diode and the second terminal 2, and the second capacitor is coupled between the second terminal 2 and the third terminal 3.
[0021] For example, the first capacitor Ci and the first diode D2 of the first multiplier stage Mi are connected in series between the first terminal 1 and the third terminal 3 of the first multiplier stage Mi, the second diode Di of the first multiplier stage Mi is coupled between a connection point of the first capacitor Ci and the first diode D2 and the second terminal 2 of the first multiplier stage Mi, and the second capacitor Csi of the first multiplier stage Mi is coupled between the second terminal 2 and the third terminal 3 of the first multiplier stage Mi. The first capacitor C2 and the first diode D4 of the second multiplier stage M2 are connected in series between the first terminal 1 and the third terminal
3 of the second multiplier stage M2, the second diode D3 of the second multiplier stage M2 is coupled between a connection point of the first capacitor C2 and the first diode D4 and the second terminal 2 of the second multiplier stage M2, and the second capacitor CS2 of the second multiplier stage M2 is coupled between the second terminal 2 and the third terminal 3 of the second multiplier stage M2. The first capacitor C3 and the first diode D6 of the third multiplier stage M3 are connected in series between the first terminal 1 and the third terminal 3 of the third multiplier stage M3, the second diode D5 of the third multiplier stage M3 is coupled between a connection point of the first capacitor C3 and the first diode D6 and the second terminal 2 of the third multiplier stage M3, and the second capacitor CS3 of the third multiplier stage M3 is coupled between the second terminal 2 and the third terminal 3 of the third multiplier stage M3. The first capacitor Cn and the first diode Om of the nth multiplier stage Mn are connected in series between the first terminal 1 and the third terminal 3 of the ηΛ multiplier stage Mn, the second diode D2n-i of the nth multiplier stage Mn is coupled between a connection point of the first capacitor Cn and the first diode D2n and the second terminal 2 of the nth multiplier stage Mn, and the second capacitor CSn of the nth multiplier stage Mn is coupled between the second terminal 2 and the third terminal 3 of the nth multiplier stage Mn. The second capacitor Csi-Csn of each multiplier stage Mi-Mn is the super capacitor.
[0022] The high voltage generation circuit 100 of the present disclosure use a single switch based voltage multiplier to achieve a high voltage output and achieve cell balancing for the super capacitor Csi-Csn of each multiplier stage Mi-Mn. The high voltage generation circuit 100 of the present disclosure can have long life time, low power consumption, compact size and low cost.
[0023] Second Embodiment of High Voltage Generation Circuit
[0024] FIG. 2 illustrates a schematic diagram of a high voltage generation circuit 200 in accordance with a second embodiment of the present disclosure. As shown in FIG. 2, different from the first embodiment, in the basis of the high voltage generation circuit 100 of FIG. 1, the high voltage generation circuit 200 of the second embodiment may further include a resonant circuit 40. The resonant circuit 40 is coupled between the power switch Si and the voltage multiplier M, and can convert the pulse voltage to a resonant voltage. Under this circumstance, the voltage multiplier M can multiply the resonant voltage to the second DC voltage.
[0025] The resonant circuit 40 includes the first inductance Li, a third capacitor Cpi, a fourth capacitor Cs and a second inductance Ls. The third capacitor CPI is connected in parallel with the power switch S ι. The fourth capacitor Cs and the second inductance Ls are connected in series between the third capacitor CPI and the voltage multiplier M.
[0026] Similarly, the high voltage generation circuit 200 of the present disclosure can achieve a high voltage output and achieve cell balancing for the super capacitor Csi-Csn of each multiplier stage Mi-Mn. The high voltage generation circuit 200 of the present disclosure can have long life time, low power consumption, compact size and low cost.
[0027] Third Embodiment of High Voltage Generation Circuit
[0028] FIG. 3 illustrates a schematic diagram of a high voltage generation circuit 300 in accordance with a third embodiment of the present disclosure. As shown in FIG. 3, different from the second embodiment, in the basis of the high voltage generation circuit 200 of FIG. 2, the high voltage generation circuit 300 of the third embodiment may further include an isolated transformer T. The isolated transformer T is coupled between the resonant circuit 40 and the voltage multiplier M. The transformer T has a primary winding Wi coupled with the resonant circuit 40 and a secondary winding W~2 coupled with the voltage multiplier M.
[0029] The high voltage generation circuit 300 may further include a fifth capacitor CP2. The fifth capacitor CP2 is coupled in parallel between the secondary winding W2 of the transformer T and the voltage multiplier M.
[0030] Similarly, the high voltage generation circuit 300 of the present disclosure can achieve a high voltage output and achieve cell balancing for the super capacitor Csi-CSn of each multiplier stage Mi-Mn. The high voltage generation circuit 300 of the present disclosure can have long life time, low power consumption, compact size and low cost.
[0031] High Voltage Generation Method
[0032] FIG. 4 illustrates a flow chart of an exemplary high voltage generation method in accordance with an embodiment of the present disclosure. The high voltage generation method in accordance with an embodiment of the present disclosure may include the steps as follows.
[0033] As shown in FIG. 4, in block B 1 , a first direct current voltage may be provided, for example by a battery Vin.
[0034] In block B2, the first direct current voltage may be converted to a pulse voltage by a power switch S i, for example a transistor.
[0035] In block B3, the pulse voltage may be multiplied to a second DC voltage by a voltage multiplier M comprising super capacitors connected in series. The second DC voltage is higher than the first DC voltage. Thus, a high voltage output can be achieved.
[0036] In an optional embodiment, the high voltage generation method of the present disclosure may further include a block B4 after block B2 and before block B3.
[0037] In block B4, the pulse voltage may be converted to a resonant voltage, for example by a resonant circuit 40 (as shown in FIG. 2), and then the process goes to block B3. In the embodiment including block B4, in block B3, the resonant voltage may be multiplied to the second DC voltage.
[0038] In another optional embodiment, the high voltage generation method of the present disclosure may further include a block B5 after block B4 and before block B3. [0039] In block B5, the resonant voltage may be converted to a third AC voltage, for example by an isolated transformer T (as shown in FIG. 3), and then the process goes to block B3. In the embodiment including block B4 and block B5, in block B3, the third AC voltage may be multiplied to the second DC voltage. The value of the first DC voltage is less than the value of the third AC voltage and the value of the third AC voltage is less than the value of the second DC voltage.
[0040] The high voltage generation method of the present disclosure can achieve a high voltage output and have low power consumption.
[0041] While steps of the high voltage generation method in accordance with embodiments of the present disclosure are illustrated as functional blocks, the order of the blocks and the separation of the steps among the various blocks shown in FIG. 4 are not intended to be limiting. For example, the blocks may be performed in a different order and a step associated with one block may be combined with one or more other blocks or may be sub-divided into a number of blocks.
[0042] While the disclosure has been illustrated and described in typical embodiments, it is not intended to be limited to the details shown, since various modifications and substitutions can be made without departing in any way from the spirit of the present disclosure. As such, further modifications and equivalents of the disclosure herein disclosed may occur to persons skilled in the art using no more than routine experimentation, and all such modifications and equivalents are believed to be within the spirit and scope of the disclosure as defined by the following claims.

Claims

WHAT IS CLAIMED IS:
1. A high voltage generation circuit, comprising: a battery for providing a first direct current voltage;
a first inductance connected in series with the battery;
a power switch for converting the first direct current voltage to a pulse voltage; and a voltage multiplier for multiplying the pulse voltage to a second direct current voltage, the second direct current voltage being higher than the first direct current voltage, wherein the voltage multiplier comprises super capacitors which are connected in series.
2. The high voltage generation circuit of claim 1 , wherein the power switch is a transistor, a drain electrode and a source electrode of the transistor is coupled with the voltage multiplier, and the source electrode of the transistor is grounded.
3. The high voltage generation circuit of claim 2, wherein the voltage multiplier comprises at least two multiplier stages cascaded, and each of the at least two multiplier stages has one of the super capacitors.
4. The high voltage generation circuit of claim 3, wherein each of the at least two multiplier stages has a first terminal, a second terminal and a third terminal, and wherein
for a first multiplier stage, the first terminal and the second terminal of the first multiplier stage are respectively connected with the drain electrode and the source electrode of the transistor; and
for a second multiplier stage to a last multiplier stage, the first terminal and the second terminal of one multiplier stage are respectively connected with the first terminal and the third terminal of a previous multiplier stage, and the third terminal of the one multiplier stage is connected to the second terminal of a next multiplier stage.
5. The high voltage generation circuit of claim 4, wherein each of the at least two multiplier stages comprises:
a first capacitor and a first diode which are connected in series between the first terminal and the third terminal;
a second diode coupled between a connection point of the first capacitor and the first diode and the second terminal; and a second capacitor coupled between the second terminal and the third terminal, wherein the second capacitor is the super capacitor.
6. The high voltage generation circuit of claim 1 , further comprising: a resonant circuit coupled between the power switch and the voltage multiplier and configured for converting the pulse voltage to a resonant voltage, wherein the voltage multiplier is configured for multiplying the resonant voltage to the second direct current voltage.
7. The high voltage generation circuit of claim 6, wherein the resonant circuit comprises: the first inductance;
a third capacitor connected in parallel with the power switch; and
a fourth capacitor and a second inductance connected in series between the third capacitor and the voltage multiplier.
8. The high voltage generation circuit of claim 7, further comprising:
an isolated transformer coupled between the resonant circuit and the voltage multiplier and having a primary winding coupled with the resonant circuit and a secondary winding coupled with the voltage multiplier.
9. The high voltage generation circuit of claim 8, further comprising:
a fifth capacitor coupled in parallel between the secondary winding of the transformer and the voltage multiplier.
10. A high voltage generation method, comprising:
providing a first direct current voltage;
converting the first direct current voltage, by a power switch, to a pulse voltage; and multiplying the pulse voltage, by a voltage multiplier comprising super capacitors connected in series, to a second direct current voltage, the second direct current voltage being higher than the first direct current voltage.
1 1. The power generation method of claim 10, further comprising: converting the pulse voltage, by a resonant circuit, to a resonant voltage, wherein the resonant voltage is multiplied to the second direct current voltage.
12. The power generation method of claim 11 , further comprising: converting the resonant voltage, by an isolated transformer, to a third alternating current voltage, wherein the third alternating current voltage is multiplied to the second direct current voltage, the value of the first direct current voltage is less than the value of the third alternating current voltage and the value of the third alternating current voltage is less than the value of the second direct current voltage.
EP18834510.2A 2017-07-19 2018-07-09 High voltage generation circuit and method Pending EP3656045A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710590945.7A CN109286310B (en) 2017-07-19 2017-07-19 High voltage generating circuit and method
PCT/US2018/041242 WO2019018148A1 (en) 2017-07-19 2018-07-09 High voltage generation circuit and method

Publications (2)

Publication Number Publication Date
EP3656045A1 true EP3656045A1 (en) 2020-05-27
EP3656045A4 EP3656045A4 (en) 2021-04-14

Family

ID=65016577

Family Applications (1)

Application Number Title Priority Date Filing Date
EP18834510.2A Pending EP3656045A4 (en) 2017-07-19 2018-07-09 High voltage generation circuit and method

Country Status (5)

Country Link
EP (1) EP3656045A4 (en)
CN (1) CN109286310B (en)
AR (1) AR112511A1 (en)
CA (1) CA3070394C (en)
WO (1) WO2019018148A1 (en)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19548986C2 (en) * 1995-12-28 1998-02-12 Siemens Ag Circuit arrangement for auxiliary voltage generation
DE10221128A1 (en) * 2002-05-13 2003-12-04 Conti Temic Microelectronic Circuit structure for raising voltage, has a resonance structure for an oscillator voltage and a voltage multiplier rectifier structure for a resonance alternating voltage
CN100483289C (en) * 2006-08-23 2009-04-29 深圳创维－Rgb电子有限公司 Step-up device
TW201328153A (en) * 2011-12-16 2013-07-01 Ind Tech Res Inst Micro-power rectifier and method thereof
CN103200755A (en) * 2012-01-06 2013-07-10 通用电气公司 Power generation system, X-ray emitter system and power generation system packaging
JP2014039395A (en) * 2012-08-15 2014-02-27 National Institute Of Advanced Industrial & Technology Semiconductor integrated circuit (energy conversion circuit)
CN204538731U (en) * 2015-02-17 2015-08-05 山东明大电器有限公司 A kind of bank of super capacitors equalizer circuit
JP6465358B2 (en) * 2015-07-22 2019-02-06 日本蓄電器工業株式会社 Voltage equalization circuit system

Also Published As

Publication number Publication date
CN109286310B (en) 2021-03-12
AR112511A1 (en) 2019-11-06
CA3070394C (en) 2022-12-13
EP3656045A4 (en) 2021-04-14
CN109286310A (en) 2019-01-29
CA3070394A1 (en) 2019-01-24
WO2019018148A1 (en) 2019-01-24

Similar Documents

Publication Publication Date Title
Schmitz et al. Generalized high step-up DC-DC boost-based converter with gain cell
EP3136114B1 (en) Method and device for detecting current of inductor of pfc circuit
EP3041122A1 (en) Control circuit, switching circuit, power conversion device, charging device, vehicle, and control method
WO2013086976A1 (en) Apparatus and method for fractional charge pumps
WO2016115998A1 (en) Digitalized double-excitation uninterrupted switching power supply
Schmitz et al. High step-up high efficiency dc-dc converter for module-integrated photovoltaic applications
EP2843817A2 (en) Photovoltaic inverter
Mira et al. Review of high efficiency bidirectional dc-dc topologies with high voltage gain
Kalahasthi et al. A single‐switch high‐gain DC–DC converter for photovoltaic applications
CN103986360B (en) High-frequency isolation type boost type three-level inverter
US9118257B2 (en) LLC single stage power factor correction converter
CN106356983B (en) Power supply conversion device
US20140268962A1 (en) Hybrid dc/ac inverter
CN112910220B (en) Power supply device and electronic apparatus
US20190181744A1 (en) Bus converter current ripple reduction
US8804376B2 (en) DC/DC converter with selectable coupling ratio and power inverter using the same
KR101463388B1 (en) Bidirectional semiconductor transformer using voltage doubler circuit structure
CN103312142A (en) AC power supply device
EP3719982B1 (en) Three-phase ac to dc power converter
CA3070394C (en) High voltage generation circuit and method
CN117411155A (en) Charging device, charging pile and charging system
WO2017000668A1 (en) Power supply circuit and method of auxiliary power supply
CN203574557U (en) Low-ripple DC voltage-doubler rectifier
CN102170540A (en) Input power supply voltage sampling and shutdown capacitance discharging circuit
Lin et al. Analysis and implementation of a zero‐voltage switching asymmetric pulse‐width modulation converter for high load current application

Legal Events

Date Code Title Description
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20200219

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

DAV Request for validation of the european patent (deleted)
DAX Request for extension of the european patent (deleted)
A4 Supplementary search report drawn up and despatched

Effective date: 20210316

RIC1 Information provided on ipc code assigned before grant

Ipc: H02M 3/07 20060101AFI20210310BHEP

Ipc: H02M 7/10 20060101ALI20210310BHEP

Ipc: H02M 11/00 20060101ALI20210310BHEP

Ipc: H02M 1/00 20060101ALN20210310BHEP

Ipc: H02M 3/155 20060101ALN20210310BHEP

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

17Q First examination report despatched

Effective date: 20220706

P01 Opt-out of the competence of the unified patent court (upc) registered

Effective date: 20230526