EP3493391A1 - Convertisseur de niveau sept à phase unique - Google Patents

Convertisseur de niveau sept à phase unique Download PDF

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Publication number
EP3493391A1
EP3493391A1 EP17204647.6A EP17204647A EP3493391A1 EP 3493391 A1 EP3493391 A1 EP 3493391A1 EP 17204647 A EP17204647 A EP 17204647A EP 3493391 A1 EP3493391 A1 EP 3493391A1
Authority
EP
European Patent Office
Prior art keywords
connection terminal
converter
voltage
semiconductor
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP17204647.6A
Other languages
German (de)
English (en)
Inventor
Gopal Mondal
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to EP17204647.6A priority Critical patent/EP3493391A1/fr
Publication of EP3493391A1 publication Critical patent/EP3493391A1/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels

Definitions

  • the present invention relates to an electrical converter and, more particularly, to a single phase seven level converter.
  • the objective of the present invention is to provide a single phase seven level converter with a reduced number of switches.
  • a single phase converter in accordance with the invention comprises a first, second, third and fourth DC connection terminal, a first and second electrical node and a first and second AC connection terminal. It further comprises a first to eighth semiconductor switch and a controlling means for controlling the semiconductor switches.
  • a first semiconductor switch is arranged between the first DC connection terminal and the first node
  • a second semiconductor switch is arranged between the second DC connection terminal and the first node
  • a third, fourth, fifth and sixth semiconductor switch are arranged as a full bridge and connected between the first and second node
  • a seventh semiconductor switch is arranged between the third DC connection terminal and the second node
  • an eighth semiconductor switch is arranged between the fourth DC connection terminal and the second node and a first half-bridge midpoint of the full bridge is connected to the first AC connection terminal and a second half-bridge midpoint of the full bridge is connected to the second AC connection terminal.
  • the converter is able to provide a seven level output thus reducing the harmonic content of the output voltage and therefore enabling the use of smaller filter elements.
  • the converter uses as few as eight switches and only four DC link terminals, i.e. three DC link series capacitors thus reducing the cost and size of the converter.
  • FIG. 1 shows an embodiment of the invention.
  • a converter 10 is built using a first to eighth switch 21...28 and three DC link capacitors 40a...c.
  • the converter 10 is arranged to work as an AC/DC converter, i.e. as a rectifier.
  • An AC voltage may be applied to AC connection terminals 11a, 11b.
  • the converter 10 converts the AC voltage to an approximated DC voltage across DC connection terminals 12a, 12b.
  • the DC voltage is spread over the three DC link capacitors 40a...c which are arranged in series between the DC connection terminals 12a, 12b.
  • the midpoint between the first and second DC link capacitor 40a, 40b forms upper DC node 42a while the midpoint between the second and third DC link capacitor 40b, 40c forms lower DC node 42b.
  • a first of the AC connection terminals 11a is connected to the midpoint of a first half-bridge 30 comprising the third and fourth switch 23, 24 connected in series.
  • a second of the AC connection terminals 11b is connected to the midpoint of a second half-bridge 32 comprising the fifth and sixth switch 25, 26 connected in series.
  • the upper terminals of the half-bridges 30, 32 are connected to form a first node 36a.
  • the lower terminals of the half-bridges 30, 32 are connected to form a second node 36b.
  • the half-bridges 30, 32 are thus arranged to form a full bridge 34.
  • the first switch 21 is arranged between the first node 36a and the upper DC connection terminal 12a.
  • the second switch 22 is arranged between the first node 36a and the upper DC node 42a.
  • the seventh switch 27 is arranged between the second node 36b and the lower DC node 42b.
  • the eighth switch 28 is arranged between the second node 36b and the lower DC connection terminal 12b.
  • the switches 21...28 are turned on and off to create ideally equal voltages V across each of the Dc link capacitors. The resulting voltage stress is different for different of the switches 21...28.
  • the voltage rating of the first, second, seventh and eighth switch 21, 22, 27, 28 should be equal to at least the voltage V.
  • the voltage rating of the remaining switches 23...26, i.e. the switches 23...26 of the full bridge 34 should be equal to at least three times the voltage V. If, for example, a DC voltage is 650 V is maintained by the converter 10 between the DC connection terminals 12a, 12b, the voltage rating of the switches 23...26 of the full bridge 34 should be at least 650 V while the voltage rating of the remaining switches 21, 22, 27, 28 should be at least ⁇ 217 V.
  • converter 10 also comprises a controller, e.g. in the form of a microprocessor.
  • the controller is connected to the switches and operates the switches 21...28 to enable converter 10 to act as a rectifier.
  • the controller when converter 10 acts as an inverter, i.e. as a DC/AC converter, the controller operates the switches to enable the inverter function.
  • converter 10 can differentiate between seven voltage levels at and between the maximum positive and maximum negative voltage. In other words, between the maximum positive and negative voltage five additional voltages can be addressed.
  • Figure 2 shows how the switches 21...28 are turned on and off based on the instantaneous voltage or level.
  • the voltage is referred to using the voltage V across one of the DC link capacitors 40a...c, i.e. one third of the total DC voltage.
  • the voltages vary between +3 ⁇ V and -3 ⁇ V.
  • the first, third, sixth and eighth switch 21, 23, 26, 28 have to be turned on with the remaining switches 22, 24, 25, 27 turned off.
  • Two of the voltages, namely +2 ⁇ V and -2 ⁇ V, levels 2 and 6, may be addressed using two different combinations of switches 21...28.
  • the controller can use these voltage levels and the different combinations of switches 21...28 to maintain a charge balance for the capacitors 40a...c.
  • the controller may choose one of the two possible combinations of switches 21...28 to either charge or discharge the capacitors 40a...c depending on their current charge state.
  • a balancing algorithm may be used to advantageously use the different current paths of levels 2 and 6 to balance the charge of capacitors 40a...c. Since the middle capacitor 40b is always in the current path the algorithm may need to deviate from the ideal switching state to keep the charges within prescribed margins.
  • FIG 3 shows a schematic diagram of a DC/DC converter 50 using converter 10 and an additional converter 52.
  • Converter 10 and the additional converter 52 are connected at their respective AC connection terminals.
  • additional converter 52 is built similarly to converter 10.
  • the outside connections of DC/DC converter are the DC connection terminals 12a, 12b of converter 10 and additional DC connection terminals 54a, 54b of the additional converter 52.
  • DC/DC converter 50 converts a DC voltage using an intermediate seven level AC voltage.
  • the power flow in the DC/DC converter 50 as well as in AC/DC converter 10 or in a DC/AC converter configuration may always be bi-directional. So all terminals 12a, 12b, 11a, 11b, 54a, 54b may be considered input terminals as well as output terminals.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
EP17204647.6A 2017-11-30 2017-11-30 Convertisseur de niveau sept à phase unique Withdrawn EP3493391A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP17204647.6A EP3493391A1 (fr) 2017-11-30 2017-11-30 Convertisseur de niveau sept à phase unique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP17204647.6A EP3493391A1 (fr) 2017-11-30 2017-11-30 Convertisseur de niveau sept à phase unique

Publications (1)

Publication Number Publication Date
EP3493391A1 true EP3493391A1 (fr) 2019-06-05

Family

ID=60515279

Family Applications (1)

Application Number Title Priority Date Filing Date
EP17204647.6A Withdrawn EP3493391A1 (fr) 2017-11-30 2017-11-30 Convertisseur de niveau sept à phase unique

Country Status (1)

Country Link
EP (1) EP3493391A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110535366A (zh) * 2019-07-01 2019-12-03 山东大学 一种七电平变换器及其飞跨电容电压控制方法、系统
WO2021108604A1 (fr) * 2019-11-27 2021-06-03 Wayne State University Onduleur à sept niveaux monophasés

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203537260U (zh) * 2013-10-17 2014-04-09 宁波绿凯节能科技有限公司 七电平单相逆变器电路
WO2015126264A1 (fr) * 2014-02-21 2015-08-27 Auckland Uniservices Limited Convertisseur multiniveau
WO2016146171A1 (fr) * 2015-03-17 2016-09-22 Siemens Aktiengesellschaft Redresseur de haut rendement pour systèmes monophasés

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203537260U (zh) * 2013-10-17 2014-04-09 宁波绿凯节能科技有限公司 七电平单相逆变器电路
WO2015126264A1 (fr) * 2014-02-21 2015-08-27 Auckland Uniservices Limited Convertisseur multiniveau
WO2016146171A1 (fr) * 2015-03-17 2016-09-22 Siemens Aktiengesellschaft Redresseur de haut rendement pour systèmes monophasés

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
BAIMEL DMITRY ET AL: "A new topology of cascaded multilevel inverter", PROCEEDINGS ELMAR-2013, CROATIAN SOCIETY ELECTRONICS IN MARINE - ELMAR, 25 September 2013 (2013-09-25), pages 137 - 140, XP032524528, ISSN: 1334-2630, [retrieved on 20131107] *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110535366A (zh) * 2019-07-01 2019-12-03 山东大学 一种七电平变换器及其飞跨电容电压控制方法、系统
CN110535366B (zh) * 2019-07-01 2020-06-09 山东大学 一种七电平变换器及其飞跨电容电压控制方法、系统
WO2021108604A1 (fr) * 2019-11-27 2021-06-03 Wayne State University Onduleur à sept niveaux monophasés

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