EP3329379A4 - Generating a timeout signal based on a clock counter associated with a data request - Google Patents

Generating a timeout signal based on a clock counter associated with a data request Download PDF

Info

Publication number
EP3329379A4
EP3329379A4 EP15899843.5A EP15899843A EP3329379A4 EP 3329379 A4 EP3329379 A4 EP 3329379A4 EP 15899843 A EP15899843 A EP 15899843A EP 3329379 A4 EP3329379 A4 EP 3329379A4
Authority
EP
European Patent Office
Prior art keywords
generating
signal based
data request
clock counter
counter associated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP15899843.5A
Other languages
German (de)
French (fr)
Other versions
EP3329379A1 (en
Inventor
Ayush Goyal
Phil Mitchell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MACOM Connectivity Solutions LLC
Original Assignee
MACOM Connectivity Solutions LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MACOM Connectivity Solutions LLC filed Critical MACOM Connectivity Solutions LLC
Publication of EP3329379A1 publication Critical patent/EP3329379A1/en
Publication of EP3329379A4 publication Critical patent/EP3329379A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • G06F11/0754Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0736Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
EP15899843.5A 2015-07-29 2015-07-29 Generating a timeout signal based on a clock counter associated with a data request Withdrawn EP3329379A4 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2015/042592 WO2017019052A1 (en) 2015-07-29 2015-07-29 Generating a timeout signal based on a clock counter associated with a data request

Publications (2)

Publication Number Publication Date
EP3329379A1 EP3329379A1 (en) 2018-06-06
EP3329379A4 true EP3329379A4 (en) 2019-06-12

Family

ID=57884957

Family Applications (1)

Application Number Title Priority Date Filing Date
EP15899843.5A Withdrawn EP3329379A4 (en) 2015-07-29 2015-07-29 Generating a timeout signal based on a clock counter associated with a data request

Country Status (4)

Country Link
EP (1) EP3329379A4 (en)
JP (1) JP2018522357A (en)
CN (1) CN108027786A (en)
WO (1) WO2017019052A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100153602A1 (en) * 2008-12-12 2010-06-17 Fujitsu Microelectronics Limited Computer system and abnormality detection circuit
EP2442231A1 (en) * 2010-09-29 2012-04-18 STMicroelectronics (Grenoble 2) SAS Reordering arrangement
US20130242749A1 (en) * 2012-03-16 2013-09-19 Infineon Technologies Ag Method and System for Timeout Monitoring
US20130262918A1 (en) * 2012-03-30 2013-10-03 Lsi Corporation Proxy Responder for Handling Anomalies in a Hardware System

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3263957B2 (en) * 1990-10-17 2002-03-11 富士通株式会社 Watch timer system
JPH1051490A (en) * 1996-07-31 1998-02-20 Nippon Telegr & Teleph Corp <Ntt> Method and device for dummy answering
JP2001014227A (en) * 1999-06-30 2001-01-19 Nec Corp Method and device for updating time-out time and machine-readable recording medium with program recorded thereon
US6496890B1 (en) * 1999-12-03 2002-12-17 Michael Joseph Azevedo Bus hang prevention and recovery for data communication systems employing a shared bus interface with multiple bus masters
US7051145B2 (en) * 2001-12-10 2006-05-23 Emulex Design & Manufacturing Corporation Tracking deferred data transfers on a system-interconnect bus
JP4507875B2 (en) * 2004-12-21 2010-07-21 日本電気株式会社 Multiplexer and legacy device multiplexing method
US7694051B2 (en) * 2007-03-22 2010-04-06 Moxa Technologies Co., Ltd. Method for calculating master/slave response time-out under continuous packet format communications protocol
JP5054558B2 (en) * 2008-02-14 2012-10-24 ルネサスエレクトロニクス株式会社 Multi-core LSI
US7900096B2 (en) * 2009-01-15 2011-03-01 International Business Machines Corporation Freeing a serial bus hang condition by utilizing distributed hang timers
EP2642399A1 (en) * 2010-11-15 2013-09-25 Fujitsu Limited Access method, and multi-core processor system
CN102281330B (en) * 2011-08-03 2014-04-02 深圳市科迪特信息技术有限公司 Data storage, communication access and control method for software as a service (SAAS) platform
JP6003350B2 (en) * 2012-07-30 2016-10-05 富士通株式会社 Monitoring device, information processing device, and monitoring method
US9160472B2 (en) * 2012-09-07 2015-10-13 National Instruments Corporation Clock synchronization over a switched fabric

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100153602A1 (en) * 2008-12-12 2010-06-17 Fujitsu Microelectronics Limited Computer system and abnormality detection circuit
EP2442231A1 (en) * 2010-09-29 2012-04-18 STMicroelectronics (Grenoble 2) SAS Reordering arrangement
US20130242749A1 (en) * 2012-03-16 2013-09-19 Infineon Technologies Ag Method and System for Timeout Monitoring
US20130262918A1 (en) * 2012-03-30 2013-10-03 Lsi Corporation Proxy Responder for Handling Anomalies in a Hardware System

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2017019052A1 *

Also Published As

Publication number Publication date
WO2017019052A1 (en) 2017-02-02
EP3329379A1 (en) 2018-06-06
CN108027786A (en) 2018-05-11
JP2018522357A (en) 2018-08-09

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Inventor name: MITCHELL, PHIL

Inventor name: GOYAL, AYUSH

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