EP3128372A1

EP3128372A1 - Electronic device, image forming apparatus and power supply control method for electronic device

Info

Publication number: EP3128372A1
Application number: EP15179996.2A
Authority: EP
Inventors: Mitsuhiko Otaki
Original assignee: Toshiba Corp; Toshiba Tec Corp
Current assignee: Toshiba Corp; Toshiba Tec Corp
Priority date: 2015-08-06
Filing date: 2015-08-06
Publication date: 2017-02-08
Anticipated expiration: 2035-08-06
Also published as: EP3128372B1

Abstract

An electronic device comprises: a first AC/DC circuit configured to supply a direct voltage to a plurality of units which act in a common action mode; a second AC/DC circuit configured to supply a direct voltage for the specific one of the units which acts in a power saving mode; a power storage device connected with the output terminal of the first AC/DC circuit; and a control unit configured to monitor the power storage of a power storage device, distinguish between the common action mode and the power saving mode and switch to the power saving mode at the moment the power storage of the power storage device is below the threshold when the common action mode is switched to the power saving mode.

Description

FIELD

Embodiments described herein relate to an electronic device such as an image forming apparatus and a power supply control method for reducing the power consumption of the electronic device acting in a power saving mode.

BACKGROUND

A scanner unit and a printer unit are arranged in an electronic device such as an image forming apparatus, the scanner unit reads an original, the image data of the read original is processed by an image processing unit, and then the image data is printed by the printer unit. In recent years, a digital multi-function peripheral is further provided with a public-line based FAX function in addition to a copy or scan function. The digital multi-function peripheral also has a plurality of functions, including a function of inputting print data from an external PC and printing and outputting the print data through the connection with a network and the cooperation with an external information processing apparatus (e.g. PC (Personal Computer)).
Various measures are taken to reduce the power consumption of such an image forming apparatus. On the other hand, it is a trend that the standards (e.g. international Energy Star standard) related to power consumption are becoming increasingly stricter, thus, a more effective power saving technology needs to be used in an image forming apparatus. Generally, an image forming apparatus which is enabled to act in a common action mode and a power saving mode acts in the power saving mode when not required to form an image.
That is, conventionally, when an image forming apparatus acts in a common action mode, a first power circuit (e.g. an AC/DC circuit) supplies power for each load. The output terminal of the first power circuit is connected with an electrolytic capacitor so as to stabilize an output voltage. Further, in the power saving mode, a second power circuit is arranged to supply power for a specific load. Moreover, the second power circuit supplies power when the common action mode is switched to the power saving mode.
However, as the switching from the common action mode to the power saving mode is carried out regardless of the power storage state (discharge state) of the electrolytic capacitor connected with the output terminal of the first power circuit (AC/DC) circuit, the power stored in the electrolytic capacitor prior to the switching cannot be effectively used.

DESCRIPTION OF THE DRAWINGS

Fig. 1 is a block diagram illustrating an electronic device (image forming apparatus) involved in an embodiment;
Fig. 2 is a block diagram illustrating the structures of a power supply unit and a control substrate according to an embodiment;
Fig. 3 is a diagram illustrating the actions of a voltage monitoring unit according to an embodiment;
Fig. 4 is a flowchart illustrating a mode control method according to an embodiment; and
Fig. 5 is a block diagram illustrating the structures of a power supply unit and a control substrate according to a second embodiment.

DETAILED DESCRIPTION

In accordance with an embodiment, an electronic device capable of acting in a common action mode and a power saving mode comprises:

a plurality of units acting in the common action mode;
a first AC/DC circuit configured to supply a first direct voltage to the plurality of units;
a power storage device connected with the output terminal of the first AC/DC circuit;
a second AC/DC circuit configured to supply a second direct voltage for the specific one of the units which acts in the power saving mode;
a switching circuit configured to switch between a first state in which the first direct voltage is supplied to the plurality of units in the common action mode and a second state in which the second direct voltage is supplied to the specific unit in the power saving mode;

A voltage monitoring unit configured to monitor the power voltage of the power storage device; and
a control unit configured to distinguish between the common action mode and the power saving mode and control the switching circuit to keep the current state of the switching circuit during the period in which the power storage of the power storage device is reduced to a preset threshold or switch the switching circuit to the second state when the power voltage of the power storage device is reduced to be below the threshold after the common action mode is switched to the power saving mode.
Preferably, the power storage device is a device which is connected with the output terminal of the first AC/DC circuit and can be charged and discharged.
Preferably, the power storage device is an electrolytic capacitor for stabilizing the first direct voltage.
The present invention relates to an image forming apparatus, comprising: a user-operable control panel; a plurality of units configured to act in the common action mode, including an image forming unit for forming an image on a sheet; a first AC/DC circuit configured to supply a direct voltage to the plurality of units; a power storage device connected with the output terminal of the first AC/DC circuit; a second AC/DC circuit configured to supply a direct voltage for the specific one of the units which acts in the power saving mode; a switching circuit configured to switch between a first state in which the first direct voltage is supplied to the plurality of units in the common action mode and a second state in which the second direct voltage is supplied to the specific unit in the power saving mode; a voltage monitoring unit configured to monitor the power storage of the power storage device; and a control unit configured to distinguish between the common action mode and the power saving mode and control the switching circuit to keep the current state of the switching circuit during the period in which the power storage of the power storage device is reduced to a preset threshold or switch the switching circuit to the second state when the power storage of the power storage device is reduced to be below the threshold after the common action mode is switched to the power saving mode.
Preferably, the power storage device is a device which is connected with the output terminal of the first AC/DC circuit and can be charged and discharged.
Preferably, the power storage device is an electrolytic capacitor for stabilizing the first direct voltage.
Preferably, the control unit carries out a control to recover to the common action mode from the power saving mode in response to the operation on the control panel.
Preferably, the specific units are a part of a CPU constituting the control unit and a drive unit for controlling the actions of the control panel.
The present invention further relates to a power supply control method for an electronic device capable of acting in a common action mode and a power saving mode, comprising: generating, by a first AC/DC circuit, a first direct voltage for a plurality of units which act in the common action mode; charging a power storage device with the first direct voltage; generating, by a second AC/DC circuit, a second direct voltage for the specific one of the plurality of units which acts in the power saving mode; switching the switching circuit between a first state in which the first direct voltage is supplied to the plurality of units in the common action mode and a second state in which the second direct voltage is supplied to the specific unit in the power saving mode; monitoring the power storage of the power storage device; and distinguishing, by a control unit, between the common action mode and the power saving mode and controlling, by the control unit, the switching circuit to keep the current state of the switching circuit during the period in which the power storage of the power storage device is reduced to a preset threshold or switch the switching circuit to the second state when the power storage of the power storage device is reduced to be below the threshold after the common action mode is switched to the power saving mode.
Preferably, the power storage device is a device which is connected with the output terminal of the first AC/DC circuit and can be charged and discharged with the first direct voltage.
Embodiments of the present invention are described below with reference to accompanying drawings in which the same parts are denoted by the same reference signs.

(First Embodiment)

Fig. 1 is a block diagram illustrating an electronic device (image forming apparatus) involved in the first embodiment. In Fig. 1, an image forming apparatus is shown as an example of an electronic device. The image forming apparatus shown in Fig. 1 functions as, for example, a Multi-Function Peripheral (MFP).
In Fig. 1, the MFP 10 comprises a control unit 11, a scanner unit 12, a printer unit 13, a control panel 14, a FAX unit 15 and a hard disk drive (HDD) serving as a memory unit. The MFP 10 further comprises a power supply unit 20 for supplying a supply voltage for each other unit of the MFP 10.
The control unit 11 comprises a CPU 101, a ROM 102, a RAM 103 and a communication interface (I/F) 104 connected with a network 300. The CPU 101 controls the whole actions of the MFP 10. The control program of the CPU 101 is stored in the ROM 102. The RAM 103 provides a temporary work area for the CPU 101. Further, a monitoring unit 111 which acts in the power saving mode is arranged in the CPU 101.
The communication interface (I/F) 104 is connected with an external device such as a PC via the network 300 to receive the image data sent from the PC. Further, the control unit 11 is connected with the scanner unit 12, the printer unit 13, the control panel 14, the FAX unit 15 and the HDD 16.
The control unit 11 compresses the image data read by the scanner unit 12 and stores the compressed image data in the HDD 16. Further, the image data received from the external device such as a PC is compressed and stored in the HDD 16. The control unit 11 reads the image data stored in the HDD 16, carries out an extension processing for the image data and then a specified image processing (e.g. gradation reproduction) and outputs the processed image data to the printer unit 13. The storage of image data in the HDD 16 and the reading of image data from the HDD 16 are both carried out under the control of the CPU 101.
The control panel 14 comprises a drive section 141, various operation keys 142, a display 143 composed of liquid crystal and the like, a backlight 144 of liquid crystal and a touch panel 145 integrated with the display 143. The drive section 141 drives the display 143 to display various contents thereon. Further, the drive section 141 controls the backlight 144 to control the brightness of the display 143. The operation keys 142 input various instructions such as 'print copies'.
The scanner unit 12 reads an original placed on an original table. The printer unit 13 including a photoconductive drum and a laser source scans and exposes the surface of the photoconductive drum with laser beams emitted from the laser source to generate an electrostatic latent image on the photoconductive drum. A charger, a developer and a transfer device are arranged around the photoconductive drum, and the electrostatic latent image on the photoconductive drum is developed by the developer to form a toner image on the photoconductive drum. The toner image is transferred onto a sheet by the transfer device.
A fixer 17 is also arranged in the printer unit 13. A sheet transferred with a toner image is conveyed towards the fixer 17. The fixer 17, in which a heat roller and a press roller are arranged opposite to each other, fixes the toner image formed on the sheet on the sheet by causing the sheet to pass through a space between the heat roller and the press roller.
The scanner unit 12 and the printer unit 13 which form an image on a sheet in response to an operation on the control panel 14 constitute an image forming unit. Further, the printer unit 13 may be of various other known structures, but not limited to the foregoing example. The FAX unit 15 which sends and receives data via a line 200 includes a FAX control unit 151 and a Network Control Unit (NCU) 152.
Further, the power supply unit 20 supplies various supply voltages for the other units in the MFP 10. The power supply unit 20 outputs a first output voltage V1 and a second output voltage V2 according to the common action mode and the power saving mode and supplies a supply voltage to a circuit in need of the supply voltage.
The image forming apparatus 10 carries out a control to supply a supply voltage to each unit in the common action mode (hereinafter referred to as a normal mode) to cause each unit to act normally. Further, in the power saving mode (hereinafter referred to as a sleep mode), only the minimum required circuits are supplied with a supply voltage.
In the normal mode, the output voltage V1 from the power supply unit 20 is supplied to the control unit 11, the scanner unit 12, the printer unit 13, the control panel 14 and the FAX unit 15. The output voltage V1 is also supplied to a mechanical system for conveying a sheet.
Further, in the sleep mode, the CPU 101 of the control unit 11 is in a sleep state, only the monitoring unit 111 is in an action state. That is, as the access from the network 300 and the reception of a FAX by the FAX unit 15 are monitored even in the sleep mode, the monitoring unit 111 is active even in the sleep mode.
The CPU 101 further comprises an internal timer. Moreover, the normal mode is switched to the sleep mode if no operation is carried out by the control panel 14 within a preset period of time in the normal mode.
In the sleep mode, only the backlight 144 in the control panel 14 is 'OFF', the drive section 141 and the other units are in an action state. That is, if the user operates the control panel 14 in the sleep mode, then the normal mode can be recovered to according to the operation of the user.
The control panel 14 functions as a User Interface (UI). The control panel 14 informs, via the control unit 11, the power supply unit 20 of the transfer to the sleep mode or a trigger for the recovery of the normal mode from the sleep mode.
In this way, the action mode of each of the CPU 101, the scanner unit 12, the printer unit 13, the control panel 14 and the FAX unit 15 can be optionally set by controlling the 'on/off' state of the unit.
Fig. 2 is a block diagram illustrating the structure of the power supply unit 20 and the structure of the control substrate 30 for controlling the supply of the supply voltage to each unit. Further, for the sake of convenience of description, the units in the control substrate 30 are represented by signs A-G.
For example, the unit A is the CPU 101, the unit B is the monitoring unit 111 in the CPU 101. Further, the unit C is the FAX unit 15, and the unit D is the drive section 141 of the control unit 14. The unit E is the scanner unit 12, the unit F is the printer unit 13. The unit G is the mechanical system for conveying a sheet. The image forming apparatus 10 may comprise other units the detailed structure of which is not described herein, but not limited to the units A-G.
As shown in Fig. 2, in the power supply unit 20, a main power switch 22, a low-voltage power supply 23 and an AC power supply 21 are connected in series. The voltage from the AC power supply 21 is supplied to the low-voltage power supply 23 by switching on the main power switch 22.
The low-voltage power supply 23 comprises a filter unit 24, a first AC/DC circuit 25, a second AC/DC circuit 26 and a power switch 27. The filter unit 24 removes unneeded noises. The first AC/DC circuit 25 and the second AC/DC circuit 26 convert an alternating voltage into a direct voltage. The power switch 27 carries out an 'ON • OFF' control for the supply of an alternating voltage to the first AC/DC circuit 25.
A direct voltage V1 is obtained from the first AC/DC circuit 25. Further, the output terminal of the first AC/DC circuit 25 is connected with an electrolytic capacitor 28 so as to stabilize the direct voltage V1. The electrolytic capacitor 28 constitutes a power storage device.
The direct voltage V1 is supplied to a first input terminal IN1 of the control substrate 30 as a first output voltage V1. A direct voltage V2 is obtained from the second AC/DC circuit 26 and supplied to a second input terminal IN2 of the control substrate 30 as a second output voltage V2.
The first input terminal IN1 is connected with a first switch 311 of a switching circuit 31. Further, the second input terminal IN2 is connected with a second switch 312 of the switching circuit 31. The first input terminal IN1 and the second input terminal IN2 are selectively connected with a first output terminal P1 and a second output terminal P2 by switching on/off the first switch 311 and the second switch 312. Consequentially, the output voltage V1 and the output voltage V2 are selectively supplied to the output terminal P1 and the output terminal P2.
The switching circuit 31 may be a mechanical switch such as a relay or an electronic switch such as a semiconductor element.
A voltage monitoring unit 32 is arranged on the control substrate 30 to monitor the power storage condition of the electrolytic capacitor 28. The voltage monitoring unit 32 consists of a comparator circuit 33 and a switch 34. A first input terminal of the comparator circuit 33 is supplied with the output voltage V1 which is the voltage between two terminals of the electrolytic capacitor 28. A reference voltage V0 is supplied to a second input terminal of the comparator circuit 33. The comparator circuit 33 generates an output signal when the output voltage V1 is below the reference voltage V0. That is, it is assumed that the reference voltage V0 is a threshold and the comparator circuit 33 generates an output signal when the output voltage V1 is below the threshold.
The switching circuit 31 switches the state of a switch according to a control signal 140 (described later). The switch 34 is configured to control the supply of the control signal 140 to the switching circuit 31. The switch 34 which is an electronic switch serving as a semiconductor device is switched on according to an output signal of the comparator circuit 33.
The output terminal P1 of the switching circuit 31 is connected with the units A-F. The output terminal P2 is connected with the units B and D. That is, in the normal mode, the control signal 140 is in a first state (e.g. at a zero level), and the switch 311 of the switching circuit 31 is 'ON' so that the output voltage V1 from the first AC/DC circuit 25 is supplied to the units A-F via the switch 311. Further, the output voltage V1 is only supplied to the mechanical system G when the first AC/DC circuit 25 acts.
That is, in the sleep mode, the control signal 140 is in a second state (e.g. at a high level), if the switch 34 is 'ON', then the switch 312 of the switching circuit 31 is 'ON' so that the output voltage V2 from the second AC/DC circuit 26 is supplied to the units B and D via the switch 312.
Further, as a UI functioning under the control of the CPU 101, the control panel 14 generates a control signal 140 in response to an operation of the user or the action of a timer. The control signal 140 is supplied to the power switch 27. Further, the control signal 140 is supplied to the switching unit 31 via the switch 34. The control signal 140 triggers the transfer from the normal mode to the sleep mode or the transfer from the sleep mode to the normal mode.
In the normal mode, the control signal 140 is at a zero level, the power switch 27 is 'ON', and the first AC/DC circuit 25 acts. The second AC/DC circuit 26 stops running. The first AC/DC circuit 25 acts to generate the output voltage V1, when the voltage V1 is above the reference voltage V0, no output signal is obtained from the comparator circuit 33, and the switch 34 is 'OFF'. In this case, the switch 311 of the switching circuit 31 is 'ON', and the switch 312 is 'OFF'.
Further, in the sleep mode, the first AC/DC circuit 25 stops acting and the second AC/DC circuit 26 acts. The output voltage V2 is supplied to the input terminal IN2, and the control signal 140 is at a high level.
On the other hand, the voltage V1 at the first input terminal of the comparator circuit 33 is gradually reduced as the electrolytic capacitor 28 discharges. The comparator circuit 33 generates an output signal to switch on the switch 34 when the output voltage V1 is below the reference voltage V0. Thus, the high-level control signal 140 is supplied to the switching unit 31. Consequentially, the switch 312 is 'ON', and the switch 311 is 'OFF'.
In the image forming apparatus involved in the embodiment, the output voltage V1 from the first AC/DC circuit 25 is supplied to the mechanical system G and the units A-F comprising a system and the image forming unit via the switching circuit 31 in the normal mode. Further, in the sleep mode, the switch 311 is 'ON' during the period in which the voltage between two terminals of the electrolytic capacitor 28 is higher than the threshold (reference voltage V0), thus, the voltage of the electrolytic capacitor 28 is supplied by the output terminal P1.
Further, if the voltage between two terminals of the electrolytic capacitor 28 is below the threshold (reference voltage V0), then the switch 311 of the switching circuit 31 is 'OFF', and the switch 312 is 'ON'. In this way, the output voltage V2 from the second AC/DC circuit 26 is only supplied to the units B and D related to a sleep mode control.
As stated above, when the first AC/DC circuit 25 stops acting, the output voltage V1 which depends upon the electrolytic capacitor 28 is reduced as time elapses. The output voltage V1 is monitored by the voltage monitoring unit 32 so that the state of the switch 31 is switched when the output voltage V1 is below the threshold voltage V0.
Thus, the control substrate 30 at a secondary side is substantially in a load-free state during the period of the switching from the output voltage V1 of the first AC/DC circuit 25 to the output voltage V2 of the second AC/DC circuit 26. That is, the image forming apparatus acts by means of the voltage of the electrolytic capacitor 28 during this period, the power consumption of the first AC/DC circuit 25 and the second AC/DC circuit 26 are approximate to zero watt, thus reducing power consumption.
Moreover, the special second AC/DC circuit 26 related to a sleep mode control is characterized in having loads which are specialized as units B and D. In the sleep mode, the units B and D are unchanged or slightly changed in load. Thus, matching with the units B and D serving as loads, the AC/DC circuit 26 is designed as a high-efficiency AC/DC circuit having the maximum power efficiency.
Fig. 3 is a diagram illustrating the actions of the voltage monitoring unit 32. In Fig. 3A, the vertical axis represents the output voltage V1, and the horizontal axis represents time. The period from T0 to T1 represents a normal mode. When the normal mode is switched to the sleep mode at the timing T1, the control signal 140 is changed from a low level to a high level, as shown in Fig. 3B. The switch 34 is switched off even if the control signal 140 is of high level, thus, the control signal 140 supplied to the switching circuit 31 is of zero level, and the switching circuit 31 keeps the current state rather than make a switching.
The output voltage V1 is gradually reduced in the sleep mode. If the output voltage V1 turns to be below the threshold (reference voltage V0) at the timing T2, then the switch 34 is switched on according to an output signal from the comparator circuit 33. Thus, the high-level control signal 140 is supplied to the switching unit 31, as shown in Fig. 3C. The switching circuit 31 switches on the switch 312 and switches off the switch 311 according to the control signal 140. That is, the actions carried out based on the output voltage V1 are not switched to those carried out based on the output voltage V2 immediately even when the mode is switched to the sleep mode, but switched until the period in which the voltage of the electrolytic capacitor 28 is reduced to a given value. Thus, the loads act during the period (T1-T2) according to the voltage of the electrolytic capacitor 28, consequentially, the power consumption of the first AC/DC circuit 25 and the second AC/DC circuit 26 are approximate to zero watt.
Further, although the switching circuit 31 and the voltage monitoring unit 32 are arranged at the side of the control substrate 30 in the embodiment shown in Fig. 2, the switching circuit 31 may also be arranged at the side of the low-voltage power supply 23.
Fig. 4 is a flowchart illustrating a mode control method according to an embodiment. Fig. 4 shows an example of the power supply from the power supply unit 20 under the control of the CPU 101.
In Fig. 4, in Act 1, the CPU 101 causes the image forming apparatus 10 to act in the normal mode. At this time, the output voltage V1 from the first AC/DC circuit 25 is supplied to loads (units A-G).
In Act 2, the CPU 101 determines whether or not to transfer to the sleep mode. For example, the CPU 101 tries to transfer to the sleep mode if no operation is carried out within a preset period of time after an operation is carried out in the control panel 14.
If the determination result of Act 2 is 'Yes', then the CPU 101 stops (switches off) the units A, C, E, F and G in Act 3. In Act 4, the CPU 101 switches off the second AC/DC circuit 25. Further, in Act 5, the CPU 101 transfers to the sleep mode and switches on the second AC/DC circuit 26.
In Act 6, the voltage monitoring unit 32 monitors the first output voltage V1. In Act 7, the voltage monitoring unit 32 determines whether or not the output voltage V1 is below the threshold (reference voltage V0) and switches on the switch 34 when the output voltage V1 is below the threshold so as to supply the control signal 140 to the switching circuit 31. In Act 8, the switching circuit 31 supplies the second output voltage V2 to loads (units B and D), thus, the switch 312 is switched to be connected with the second output terminal P2. At this time, the switch 311 is switched to disconnect the first input terminal IN1 from the first output terminal P1 so that the image forming apparatus acts in the sleep mode.
In the sleep mode, only the monitoring unit 111 of the CPU 101 is in an action state. The monitoring unit 111 monitors the condition of the access from the network 300 and the reception of a FAX by the FAX unit 15 even in the sleep mode.
Sequentially, in Act 11, the CPU 101 determines whether or not to recover to the normal mode. For example, if the control panel 14 is operated in the sleep mode, then the normal mode is recovered to according to the operation of the user. Further, the normal mode is recovered to when the image forming apparatus is accessed from an external PC via the network 300.
If the determination result of Act 11 is 'Yes', the CPU 101 switches on the first AC/DC circuit 25 in Act 12. The CPU 101 switches off the second AC/DC circuit 26. Further, in Act 13, the switching circuit 31 is controlled to connect the switch 311 with the first output terminal P1 and supply the output voltage V1 to loads (units A-F and G). That is, a switching is conducted to connect the switch 311 with the first output terminal P1. Further, the switch 312 is switched to disconnect the second input terminal IN2 from the second output terminal P2.
In Act 14, the CPU 101 switches on the units A, C, E, F and G. Moreover, in Act 15, the image forming apparatus 10 transfers to the normal mode. In Act 16, the electrolytic capacitor 28 is charged. After the Act 16, the flow returns to Act 1 to repeat the subsequent actions.
In the foregoing embodiment, the voltage of the electrolytic capacitor 28 is effectively used, thus reducing power consumption.

(Second Embodiment)

Fig. 5 is a block diagram illustrating the structures of the power supply unit 20 and the control substrate 30 of an electronic device (image forming apparatus) involved in the second embodiment. In the second embodiment, the electrolytic capacitor 28 serving as a power storage device is replaced by a device 29 which is higher than the electrolytic capacitor 28 in charging capacity and can be charged and discharged.
The device 29 which can be charged and discharged is, for example, a double electric layer capacitor, a lithium ion battery, a lithium ion capacitor, a nickel-cadmium battery, a nickel-metal hydride battery or a fuel cell.
The deployment of the device 29 which can be charged and discharged as a power storage device makes the first AC/DC circuit 25 and the second AC/DC circuit 26 in a load-free state in the sleep mode, which prolongs a load-free period and therefore reduces power consumption. Thus, in the second embodiment, the voltage of the device 29 which can be charged and discharged is effectively used, thus reducing power consumption.
Moreover, the present invention may have various applications, but not limited to the foregoing embodiments. For example, not limited to be applied to an image forming apparatus, the foregoing power supply unit 20 or control substrate 30 may be applied to other electronic devices which function in a normal mode and a sleep mode.
Further, in the foregoing embodiments, the units B and D (or C) act in the sleep mode, however, other units may act in the sleep mode. That is, the unit acting in a sleep mode is determined matching with the actual circuits of the electronic device, and the second output voltage is supplied to the determined unit.
Further, it is described in the foregoing embodiments that the comparator circuit 33 is used as the voltage monitoring unit 32, however, the output voltage V1 may also be monitored by the CPU 101, and the switching circuit 31 is controlled when the output voltage V1 is below a specific threshold in the sleep mode.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the invention. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the invention. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the invention.

Claims

An electronic device capable of acting in a common action mode and a power saving mode, comprising:
a plurality of units configured to act in the common action mode;

a first AC/DC circuit configured to supply a first direct voltage to the plurality of the units;

a power storage device connected with the output terminal of the first AC/DC circuit;

a second AC/DC circuit configured to supply a second direct voltage to the specific one of the units which acts in the power saving mode;

a switching circuit configured to switch between a first state in which the first direct voltage is supplied to the plurality of units in the common action mode and a second state in which the second direct voltage is supplied to the specific unit in the power saving mode;

a voltage monitoring unit configured to monitor the power storage of the power storage device; and

a control unit configured to distinguish between the common action mode and the power saving mode and control the switching circuit to keep the current state of the switching circuit during the period in which the power storage of the power storage device is reduced to a preset threshold or switch the switching circuit to the second state when the power storage of the power storage device is reduced to be below the threshold after the common action mode is switched to the power saving mode.
The electronic device according to claim 1, wherein the power storage device is a device which is connected with the output terminal of the first AC/DC circuit and can be charged and discharged.
The electronic device according to claim 1 or 2, wherein
the power storage device is an electrolytic capacitor for stabilizing the first direct voltage.
An image forming apparatus, comprising:
a user-operable control panel;
an electronic device according to any one of claims 1 to 3, wherein the plurality of units configured to act in the common action mode, includes an image forming unit for forming an image on a sheet
The image forming apparatus according to claim 4, wherein
the power storage device is a device which is connected with the output terminal of the first AC/DC circuit and can be charged and discharged.
The image forming apparatus according to claim 4 or 5, wherein
the power storage device is an electrolytic capacitor for stabilizing the first direct voltage.
The image forming apparatus according to any one of claims 4 to 6, wherein
the control unit carries out a control to recover to the common action mode from the power saving mode in response to the operation on the control panel.
The image forming apparatus according to any one of claims 4 to 7, wherein
the specific units are a part of a CPU constituting the control unit and a drive unit for controlling the actions of the control panel.
A power supply control method for an electronic device capable of acting in a common action mode and a power saving mode, comprising:
generating, by a first AC/DC circuit, a first direct voltage for a plurality of units which act in the common action mode;

charging a power storage device with the first direct voltage;

generating, by a second AC/DC circuit, a second direct voltage for the specific one of the plurality of units which acts in the power saving mode;

switching the switching circuit between a first state in which the first direct voltage is supplied to the plurality of units in the common action mode and a second state in which the second direct voltage is supplied to the specific unit in the power saving mode;

monitoring the power storage of the power storage device; and

distinguishing, by a control unit, between the common action mode and the power saving mode and controlling, by the control unit, the switching circuit to keep the current state of the switching circuit during the period in which the power storage of the power storage device is reduced to a preset threshold or switch the switching circuit to the second state when the power storage of the power storage device is reduced to be below the threshold after the common action mode is switched to the power saving mode.
The power supply control method according to claim 9, wherein
the power storage device is a device which is connected with the output terminal of the first AC/DC circuit and can be charged and discharged with the first direct voltage.