EP2867774A1 - Procédé de traitement de données en sécurité, et calculateur associé - Google Patents
Procédé de traitement de données en sécurité, et calculateur associéInfo
- Publication number
- EP2867774A1 EP2867774A1 EP13732927.2A EP13732927A EP2867774A1 EP 2867774 A1 EP2867774 A1 EP 2867774A1 EP 13732927 A EP13732927 A EP 13732927A EP 2867774 A1 EP2867774 A1 EP 2867774A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- executable
- source code
- output data
- data
- generating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operations
- G06F11/1479—Generic software techniques for error detection or fault masking
- G06F11/1487—Generic software techniques for error detection or fault masking using N-version programming
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
Definitions
- the present invention relates to a method for processing data in security.
- the present invention also relates to a calculator for the implementation of such a method.
- Such a device comprises a voting means designed to compare together the data sets generated at the output of each of the processing paths. If the criterion implemented by the means of voting is not respected, the means of voting indicates the presence of a fault in the data generated at the exit.
- the SIL 4 level corresponds to a probability of occurrence of an unsafe failure of less than 10 "9 .
- WO 2010/049339 discloses various modes of redundancy in the execution of security software.
- the same executable is executed on two computation units, independent of one another, which receive the same set of input data.
- the two calculation units each output the output data following execution of the executable on the input data, and the output data of the two calculation units are compared by a voting means.
- a second redundancy mode distinct from the first redundancy mode, two different executables are compiled from two separate source codes using the same compiler. The two executables are then executed, either on two different calculation units, or successively on the same calculation unit. The output data corresponding to the processing of the input data by the two executables are then compared by the voting means.
- a third redundancy mode distinct from the first and second redundancy modes, two different executables are obtained from the same source code using the same compiler and different compilation parameters. Both executables are then executed, either on two different calculation units, or successively on the same calculation unit, and the output data corresponding to the two executables are then compared by the voting means.
- the object of the invention is to propose a data processing method presenting a better reliability of the data delivered at the end of the treatment.
- the subject of the invention is a data processing method implemented by a computer comprising a compiler, the method of processing comprising a first step of generating a first executable from a source code corresponding to software, and a second step of generating a second executable from the same source code.
- the first executable generated is intended to be executed by a first processing unit and the second executable generated is intended to be executed by a second processing unit, distinct from the first processing unit.
- the source code comprises at least one variable of the integer type and, during the generation step of the second executable, the integer type of the or each variable is converted to a floating type.
- the method comprises one or more of the following characteristics, taken separately or in any technically possible combination:
- the step of generating the first executable consists in compiling said source code using the compiler
- the step of generating the second executable consists in creating an intermediate source code by replacing, in said source code, each declaration of a variable of the integer type by the declaration of a variable of the floating type, and then compiling said source code intermediate using the compiler implemented during the generation step of the first executable;
- the step of generating the second executable consists in compiling said source code by associating, with the or each variable of the integer type, a file of a library corresponding to a floating type;
- the method further comprises a step of execution by the calculation unit of the first executable for processing an input data set in order to generate a first an output data set, an execution step by the calculating unit of the second executable for processing said set of input data to generate a second set of output data, and a voting step by a unit of voting consisting in generating a vote signal based on the result of a comparison between the first and second sets of output data;
- the step of generating the vote signal comprises converting the first set of output data, the integer type data being converted to floating type output data, and comparing each converted output data with a corresponding data item of the output type; second set of output data;
- the step of generating a vote signal comprises converting the second set of output data, the floating type data being converted into output data of the integer type, and comparing each converted output data with a data item; corresponding of the first set of output data;
- the floating type is a double precision floating point in accordance with the IEEE-754 standard;
- each variable of the source code is of the integer type;
- said first processing unit is an arithmetic unit for integers dedicated to operations on variables of the integer type and said second processing unit is an arithmetic unit for the floats dedicated to operations on variables of the floating type, and the step d execution of the first executable is performed by the arithmetic unit for the integers and the execution step of the second executable is performed by the arithmetic unit for the floats;
- an output data output step corresponding to the first set of output data, and the output data (Dout) has a security level in accordance with the SIL4 level of the generalist IEC61508 standard and the lower levels (SIL3 to SIL3) of it complies with the levels: SILO to SIL4 of the sectoral standard EN50129 or complies with Class2 to Classl levels of the industry standard IEC61513.
- the invention also relates to a computer comprising a compiler, the compiler comprising a module for generating a first executable from a source code corresponding to a software, and means for generating a second executable from the same source code.
- the first executable generated is intended to be executed by a first processing unit and the second executable generated is intended to be executed by a second processing unit, distinct from the first processing unit.
- the source code comprises at least one variable of the integer type, and in that the generation means are adapted to convert the integer type of the or each variable to a floating type when the second executable is generated.
- the calculator further comprises a calculation unit comprising said first and second processing units and a voting unit, the calculation unit being capable of executing, on the one hand, the first executable for the processing a set of input data to generate a first set of output data, and secondly, the second executable for processing said set input data to generate a second set of output data, and the polling unit being adapted to generate a vote signal based on the result of a comparison between the first and second sets of output data.
- FIG. 1 is a schematic representation of a computer for implementing a secure data processing method
- FIG. 2 is a flowchart showing the steps of the secure data processing method.
- integer type signed or unsigned (“Integer” or “Unsigned Integer” in English) called “int” or “unsigned int” in C language or similar names in other languages, used for integer or Boolean variables and coded in memory on 2 or 4 bytes, that is to say 16 or 32 bits.
- integer type groups together the set of variable types that can usually declare integers and manipulate them by means of arithmetic or logical operations on integers.
- FLOAT single-precision floating type
- Double-precision floating type DOUBLE
- 8 bytes ie 64 bits: 52 bits of mantissa, 1 1 bits of exponent and 1 bit of sign
- the floating type double precision extended LONG DOUBLE
- 10 bytes ie 80 bits: 64 bits of mantissa, 15 bits of exponent and 1 bit of sign
- the processes correspond to either logical operations, such as AND, OR, etc., performed on Boolean data, 0 or 1, either to arithmetic operations, such as MORE, LESS, DIVIDE, MULTIPLY, performed on integer data, 0, 1, 2, 3, etc.
- the security software is intended to be executed on a computer 10.
- the computer 10 comprises an input interface 12, a calculation unit 14, a voting unit 16 and an output interface 18.
- the compiler is implemented in the computer 10.
- the calculator comprising the calculation unit is separated from a calculator comprising the voting unit.
- the computer 10 comprises a bus 20 for data flow between the input interface 12 and the output interface 18, the calculation unit 14, the voting unit 16 being able to exchange data with the bus 20
- the compiler 19 is at the bus 20 for exchanging data with the bus 20.
- the input interface 12 is adapted to receive Din input data and to transmit them to the calculation unit 14 via the bus 20.
- the computing unit 14 comprises a microprocessor 22 and a memory 24.
- the microprocessor 22 comprises several arithmetic units and, in particular, an arithmetic unit for the integers 30 and an arithmetic unit for the floats 32.
- the arithmetic unit for integers 30 (also called “Arithmetic Logic Unit” in English) is dedicated to operations on variables of the integer type.
- the arithmetic unit for floats 32 (also called “Floating Point Unit” in English) is dedicated to operations on single-precision floating type variables.
- the floating type corresponds to the double precision floating type, respectively to the double precision extended floating type
- the microprocessor comprises an arithmetic unit for the double precision floats, respectively for the extended double precision floats, not shown, which is dedicated to the operations on variables of the floating type double precision, respectively the double precision extended floats.
- the memory 24 is able to store the instructions of a first executable L1 and a second executable L2 which will be presented hereinafter, the microprocessor 22 being able to execute the first executable L1 and the second executable L2, on the same data. Din.
- the microprocessor 22 is capable of sequentially executing the first executable L1, then the second executable L2, sequentially executing the second executable L2 and then the first executable L1 and / or executing the first executable L2. executable L1 and the second executable L2 in parallel, according to a scheduling scheme.
- the memory 24 also comprises a first memory zone 40 for storing the values of the variables declared during the execution of the first executable L1.
- this first memory zone 40 makes it possible to store all the output data Dout1 resulting from the processing of the input data Din during execution by the microprocessor 22 of the first executable L1.
- the memory 24 includes a second memory zone 42 for storing the values of the variables declared during the execution of the second executable L2.
- this second memory zone 42 makes it possible to store all of the output data Dout2 resulting from the processing of the input data Din during execution by the microprocessor 22 of the second executable L2.
- the voting unit 16 is able to process the output data Dout1 (respectively Dout2) or a representative transformation of the output data Dout1 (respectively Dout2). Subsequently, the output data Dout1 (respectively Dout2) represents the set of output data or a representative transformation of the output data.
- the polling unit 16 comprises a reading and conversion means 50 able to read the first set of output data Dout1 in the first memory area 40 and to convert these data Dout1 from the integer type to the single precision floating type to obtain data. converted data Dout1 _conv, and reading the second set of output data Dout2 in the second memory area 42.
- the voting unit 16 comprises a comparison means 52 designed to compare the first and second sets of output data Dout1 _conv, Dout2 read and possibly converted by the reading and conversion means 50.
- the comparison means 52 is suitable for implementing a comparison criterion consisting, for example, in determining a difference between a data item Dout1 conv of the first set whose type has been converted and a corresponding datum Dout2 of the second set. This difference corresponds to a bitwise comparison of these two data Dout1 _conv, Dout2 the difference taking the Boolean value 1 as soon as two bits are different or the Boolean value 0 if all the bits are identical.
- the difference does not necessarily take the values 1/0. As a variant, the difference takes the corresponding values false / true or difference / no difference.
- the criterion implemented by the voting unit 16 is checked when all the deviations thus calculated for the set of data Dout1_conv, Dout2 are all equal to zero or, in other words, that no difference has the value 1.
- the reading and converting means 50 is adapted to read the second set of output data Dout2 in the second memory area 42 and to convert these floating-point data Dout2 to the integer type to obtain converted data Dout2_conv, and reading the first set of output data Doutl in the first memory area 40.
- the comparison means 52 is able to compare the first and second sets of output data Dout1, Dout2_conv read together and possibly converted by the reading and converting means 50 to one another.
- the comparison means 52 is then able to implement a comparison criterion consisting, for example, in determining a difference between a data item Doutl of the first set and a data item Dout2_conv. This difference corresponds to a bitwise comparison of these two data Dout1, Dout2_conv, the difference taking the Boolean value 1 as soon as two bits are different.
- the criterion implemented by the voting unit 16 is checked when all the deviations thus calculated for the set of data Doutl, Dout2_conv are all equal to zero or, in other words, that no difference has the value 1.
- the comparison means 52 is also able to transmit to the output interface 18 the first set of output data Doutl as a safe output data Dout, and a binary voting signal S.
- the vote signal S takes the Boolean value 0 if the first and second sets of output data Dout1, Dout2 respect the comparison criterion implemented by the voting unit 16. Otherwise, the vote signal S takes the Boolean value. 1.
- the output interface 18 comprises, for example, a display means for displaying the output data safely Dout, as well as the vote signal S.
- the vote signal S is, for example, displayed in the form a green flag when the value of this signal is Boolean 0, or in the form of a red flag when the value of this signal is Boolean 1.
- the compiler 19 comprises a module 60 for analyzing the syntax of the source code L0 and for converting the integer type of each corresponding variable into a floating type, and a module 62 for compiling a given source code into an executable according to parameters of predefined compilation.
- the analysis and conversion module 60 is able to generate an intermediate source code L0 'from the source code L0, by converting, after parsing, the integer type of each corresponding variable into a floating type.
- the compilation module 62 is known per se, and is clean in the embodiment described to compile, on the one hand, the source code L0 into the first executable L1, and on the other hand, the intermediate source code L0 'into the second executable L2.
- the analysis and conversion module 60 and the compilation module 62 then form means for generating the second executable L2 from the same source code LO.
- the compiler 19 includes the compilation module 62 and a compilation library, not shown. According to this variant, the compiler 19 does not include a module for analyzing the syntax of the source code LO and converting the integer type of each corresponding variable into a floating type.
- the compilation module 62 is able to compile said source code LO by associating, with the or each variable of the integer type, a file of the compilation library corresponding to a floating type, in order to generate the second executable L2.
- a programmer wanting to perform security software writes the source code LO.
- the different variables used in this LO source code are of the integer type.
- step 1 10 the first executable L1 is generated by compiling the source code
- the first executable L1 is then stored in the memory 24 of the computing unit 14.
- the variables of the first executable L1 are of the integer type, given that the variables of the source code LO are of the integer type.
- step 120 of generation of the intermediate source code LO ' the analysis and conversion module 60 analyzes the syntax of the source code LO and converts the integer type of each variable into a IEEE-754 simple-precision floating-point type. generating the intermediate source code LO '.
- the set of integers initially coded on 8 and 16 bits can be converted, exactly, on the mantissa part of the single precision floats.
- the analysis and conversion module 60 analyzes the syntax of the source code L0 and converts the integer type of each variable into an IEEE-754 double precision floating type so as to generate the intermediate source code L0 '.
- the set of integers initially coded on 8, 16 and 32 bits can be converted exactly on the mantissa part of the double precision floats.
- the variables of the intermediate source code L0 ' are all of the floating type, double precision or simple precision, since the variables of the source code L0 are all of the integer type.
- the second executable L2 is generated by compiling the intermediate source code LO 'using the compiler.
- the second executable L2 is stored in the memory 24 of the computing unit 14.
- the same compiler is preferably used to generate the first executable L1 and the second executable L2.
- the variables of the second executable L2 are all of the floating type, double precision or simple precision, since the variables of the intermediate source LO 'are all of the floating type, double precision or simple precision.
- step 140 the first executable L1 is first executed by the microprocessor 22 to process the input data set Din and generate the first set of output data Douti. These Douti output data are stored in the first memory area 40.
- the microprocessor 22 since the variables of the first executable L1 are all of the integer type, the microprocessor 22 only uses the arithmetic unit for the integers 30.
- step 150 the second executable L2 is executed by the microprocessor 22 to process the input data set Din and generate the second set of output data Dout2. These output data Dout2 are stored in the second memory zone 42.
- the microprocessor 22 only uses the arithmetic unit for the floats 32.
- Steps 140 and 150 are performed sequentially (step 140 then step
- step 160 the voting unit 16 reads the first and second sets of output data, Douti and Dout2, and converts data from the first set Douti of the integer type to the floating type to obtain the converted data Douti conv.
- the polling unit 16 reads the first and second sets of output data, Douti and Dout2, and converts data from the second set Dout2 of the floating type to the integer type to obtain the converted data Dout2_conv.
- step 170 the voting unit 16 compares each converted data of the first set Douti conv with the corresponding data of the second set of data Dout2. This comparison consists in comparing, for example bit by bit, these two data. If they are identical, the difference between these data takes the null value Boolean, to default it takes the Boolean value unit. The comparison criterion is not checked as soon as a difference between two data takes the unit value.
- the voting unit 16 compares each converted data of the second set Dout2_conv with the corresponding data of the first set of data Doutl.
- the vote signal S takes the value zero. In the opposite case, the vote signal S takes the value unit.
- step 180 the voting unit 16 transmits to the output interface 18 the first set of output data Doutl as safe output data Dout, as well as the vote signal S generated during the step 170.
- step 190 the output interface 18 displays the output data safely Dout that have been transmitted to it, as well as the vote signal S.
- the vote signal S is for example included in the data (for example value explicit, data encoding) or separated from the data.
- the conversion from the integer type to the floating type is performed at the level of the source code language via the generation of the intermediate source code L0 ', which code is then compiled.
- the output data Dout has a level of security compliant with the SIL4 level of the generalist IEC61508 standard and at the lower levels (SIL3 to SIL3) thereof or compliant with the levels: SILO to SIL4 of the sectoral standard EN50129 or compliant at the Class2 to Classl levels of the industry standard IEC61513.
- this conversion from the integer type to the floating type is done directly during the compilation of the source code L0.
- the compiler then comprises, for example, a compilation option for activating a module of the own link editor, whenever an integer variable is declared in the source code L0, to use a file of the library that is the floating type, instead of using the library file that corresponds to the integer type.
- the present invention applies to any software, but is particularly well suited to the case of a security software working on integer variables.
- the microprocessor uses only its arithmetic unit for integers.
- the microprocessor will only use its arithmetic unit for the floats during the implementation of the redundancy of the processing.
- the processing method according to the invention allows the redundancy of the data processing by a diversification of the processing means, and improves thus the reliability of the data delivered at the end of the treatment.
- the inventors have surprisingly found that the IEEE-754 double precision floating type was particularly suitable as a particular type of float for the implementation of the method according to the invention, whereas this type of float is not usually used to make Boolean logic or whole arithmetic.
- the part of mantissa double precision floats allows to accurately represent the integers coded on 32 bits. 32-bit integers therefore always have an exact representation in the IEEE-754 double precision floating type, since the number of bits that compose them, namely 32, is strictly less than 52 bits, which is the number of bits composing the mantissa. IEE-754 double precision floats.
- the IEEE-754 single-precision float type with its 23 mantissa bits makes it possible to accurately represent integers coded on 8 or 16 bits.
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Devices For Executing Special Programs (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1256229A FR2992749B1 (fr) | 2012-06-29 | 2012-06-29 | Procede de traitement de donnees en securite, et calculateur associe |
| PCT/EP2013/063712 WO2014001543A1 (fr) | 2012-06-29 | 2013-06-28 | Procédé de traitement de données en sécurité, et calculateur associé |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP2867774A1 true EP2867774A1 (fr) | 2015-05-06 |
Family
ID=47294933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP13732927.2A Ceased EP2867774A1 (fr) | 2012-06-29 | 2013-06-28 | Procédé de traitement de données en sécurité, et calculateur associé |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP2867774A1 (fr) |
| FR (1) | FR2992749B1 (fr) |
| WO (1) | WO2014001543A1 (fr) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102015204337A1 (de) * | 2015-03-11 | 2016-09-15 | Siemens Aktiengesellschaft | Sicherheitsrelevantes Computersystem |
| EP3629177B1 (fr) * | 2018-09-28 | 2021-09-01 | Sick Ag | Procédé de vérification du fonctionnement d'un moyen de traitement de données électronique |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7613950B2 (en) * | 2004-02-27 | 2009-11-03 | Hewlett-Packard Development Company, L.P. | Detecting floating point hardware failures |
| DE102008043374A1 (de) | 2008-10-31 | 2010-05-06 | Robert Bosch Gmbh | Vorrichtung und Verfahren zur Generierung redundanter, aber unterschiedlicher Maschinencodes aus einem Quellcode zur Verifizierung für ein sicherheitskritisches System |
| CN102713857B (zh) * | 2010-08-03 | 2014-11-26 | 西门子公司 | 用于进行故障安全型硬件无关浮点运算的方法和装置 |
-
2012
- 2012-06-29 FR FR1256229A patent/FR2992749B1/fr active Active
-
2013
- 2013-06-28 WO PCT/EP2013/063712 patent/WO2014001543A1/fr not_active Ceased
- 2013-06-28 EP EP13732927.2A patent/EP2867774A1/fr not_active Ceased
Non-Patent Citations (2)
| Title |
|---|
| None * |
| See also references of WO2014001543A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2992749B1 (fr) | 2014-08-08 |
| WO2014001543A1 (fr) | 2014-01-03 |
| FR2992749A1 (fr) | 2014-01-03 |
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