EP2465129A1 - Hybrid circuit breaker - Google Patents

Hybrid circuit breaker

Info

Publication number
EP2465129A1
EP2465129A1 EP09781805A EP09781805A EP2465129A1 EP 2465129 A1 EP2465129 A1 EP 2465129A1 EP 09781805 A EP09781805 A EP 09781805A EP 09781805 A EP09781805 A EP 09781805A EP 2465129 A1 EP2465129 A1 EP 2465129A1
Authority
EP
European Patent Office
Prior art keywords
circuit breaker
hybrid circuit
semiconductor
mechanical switch
fault current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP09781805A
Other languages
German (de)
French (fr)
Other versions
EP2465129B1 (en
Inventor
Magnus Backman
Georgios Demetriades
Anshuman Shukla
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ABB Research Ltd Switzerland
Original Assignee
ABB Research Ltd Switzerland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ABB Research Ltd Switzerland filed Critical ABB Research Ltd Switzerland
Publication of EP2465129A1 publication Critical patent/EP2465129A1/en
Application granted granted Critical
Publication of EP2465129B1 publication Critical patent/EP2465129B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H71/00Details of the protective switches or relays covered by groups H01H73/00 - H01H83/00
    • H01H71/10Operating or release mechanisms
    • H01H71/12Automatic release mechanisms with or without manual release
    • H01H71/123Automatic release mechanisms with or without manual release using a solid-state trip unit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/54Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere
    • H01H9/541Contacts shunted by semiconductor devices
    • H01H9/542Contacts shunted by static switch means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H1/00Contacts
    • H01H1/12Contacts characterised by the manner in which co-operating contacts engage
    • H01H1/14Contacts characterised by the manner in which co-operating contacts engage by abutting
    • H01H1/20Bridging contacts
    • H01H1/2041Rotating bridge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H71/00Details of the protective switches or relays covered by groups H01H73/00 - H01H83/00
    • H01H71/10Operating or release mechanisms
    • H01H71/12Automatic release mechanisms with or without manual release
    • H01H71/123Automatic release mechanisms with or without manual release using a solid-state trip unit
    • H01H2071/124Automatic release mechanisms with or without manual release using a solid-state trip unit with a hybrid structure, the solid state trip device being combined with a thermal or a electromagnetic trip
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/54Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere
    • H01H9/547Combinations of mechanical switches and static switches, the latter being controlled by the former

Definitions

  • the present invention generally relates to hybrid circuit breakers . DESCRIPTION OF RELATED ART AND BACKGROUND OF THE INVENTION
  • the hybrid breaker is a combination of a conventional mechanical circuit breaker and a solid state breaker. At nominal operation the current flows through the mechanical circuit breaker and the solid state breaker is only used during faults. As in the case of the solid state circuit breakers unidirectional and bidirectional switches can be used depending on the requirements of the application.
  • Figs la-c a bidirectional hybrid circuit breaker including a conventional mechanical circuit breaker 11 and a solid state breaker 12 is displayed in schematic circuit diagrams during different operation stages.
  • the current flows through the mechanical circuit breaker 11.
  • the mechanical circuit breaker 11 is opened and the solid state circuit breaker 12 is turned on.
  • the mechanical circuit breaker 11 opens an arc is initiated across the mechanical circuit breaker 11 and if the arc voltage is sufficient the hybrid circuit breaker will commutate the fault current to the solid state circuit breaker 12 as shown in Fig. Ia.
  • the fault current flows through the solid state breaker 12 as shown in Fig. Ib.
  • the conduction time should be sufficiently long to allow the contact gap in the mechanical circuit breaker 11 to cool down to avoid reignition.
  • Figs. 2a-b are diagrams of the arc current and the arc voltage, respectively, as a function of time during operation of the bidirectional hybrid circuit breaker of Figs . la-c .
  • the hybrid circuit breaker requires the same amount of semiconductors as the fully solid state circuit breaker. However, for the hybrid circuit breaker, the conduction losses are not an issue since the current in nominal operation flows through the mechanical circuit breaker. Further, for the same reason, cooling is not a crucial issue for the hybrid circuit breaker. Yet, heat sinks are required because the fault current is commutated to the solid state circuit breaker during faults.
  • the mechanical breaker can interrupt a fault current of some tens of kiloamperes whereas controllable solid state devices can typically only interrupt currents of some kilo amperes.
  • the conduction time of the solid state circuit breaker is critical due to that (i) long conduction time is required in order to completely commutate the current from the mechanical circuit breaker to the solid state circuit breaker, (ii) long conduction time is required when the loop inductance is high, and (iii) long conduction time is required in order to extinguish the arc voltage of the mechanical circuit breaker, i.e. to ensure that no current is flowing through the mechanical circuit breaker.
  • long conduction times result in high conduction losses and as a result overheating of the device which can lead into device failures.
  • a hybrid circuit breaker for breaking fault currents comprising a mechanical switch through which a normal current is passed, the mechanical switch being arranged to open in case of being exposed to a fault current, and a solid state or semiconductor breaker device, to which the fault current is commutated, the semiconductor breaker device being arranged to break the fault current.
  • the mechanical switch has a contact arm with two contacts abutting stationary contacts of a circuit when being closed, the contact arm being rotatable around an axis of rotation to allow the two contacts of the contact arm to be removed from the stationary contacts such that the mechanical switch opens.
  • the contact arm is asymmetrically arranged, i.e.
  • the two contacts of the contact arm are located at different distances from the axis of rotation such that the separations between the two contacts of the contact arm and the two stationary contacts are different when the mechanical switch opens.
  • the semiconductor breaker device is connected in parallel with the contact of the contact arm and the stationary contact which separate most when the mechanical switch opens.
  • the mechanical switch will be latched in open position at lower current and therefore the dead time will be shorter implying a comparably lower turn-off current.
  • Lower turn-off current in turn results in considerably lower energy dissipation in the semiconductor breaker device and therefore the footprint of the device can be reduced.
  • the inventive semiconductor breaker device comprises accordingly a control unit arranged to control the fault current commutated to the semiconductor breaker device as a function of time.
  • the current commutated is allowed to increase during the fault handling in a controlled manner.
  • control unit is arranged to fully commutate the fault current to the semiconductor breaker device for a certain time period when the mechanical switch has fully opened and been latched in the open position to make sure that the contact gap cools down sufficiently.
  • the certain time period has lapsed, the current through the semiconductor breaker device is interrupted.
  • it can be made sure that the current is interrupted without risk of reigniting the contact gap.
  • the semiconductor breaker device comprises an insulated gate bipolar transistor (IGBT) and the control unit, which may be a gate drive unit, is arranged to control the fault current commutated to the semiconductor breaker device by means of controlling the gate voltage of the insulated gate bipolar transistor.
  • IGBT insulated gate bipolar transistor
  • the gate drive unit can measure the voltage across the semiconductor breaker device and when the voltage across the device is increased and reaches a certain threshold level, this implies that a fault is occurred, and the control of the fault current commutated to the semiconductor breaker device is initiated.
  • the gate voltage is thereafter increased with time, preferably stepwise, in a controlled manner.
  • the hybrid circuit breaker of the present invention can be a unidirectional device or a bidirectional device capable of breaking a DC fault current in any direction or an AC fault current.
  • the hybrid circuit breaker has preferably a voltage rating of up to 1 kV.
  • Figs, la-c display in schematic circuit diagrams a bidirectional hybrid circuit breaker during different operation stages according to prior art.
  • Figs. 2a-b are diagrams of the arc current and the arc voltage, respectively, as a function of time during operation of the bidirectional hybrid circuit breaker of Figs. la-c.
  • Fig. 3 displays schematically, partly in a side view, partly in a circuit diagram, a hybrid circuit breaker according to an embodiment of the present invention.
  • Fig. 4 is a diagram of the current as a function of time during operation of the hybrid circuit breaker of Fig. 3.
  • Figs. 5a-b illustrate how an insulated gate bipolar transistor of a semiconductor breaker device of the hybrid circuit breaker of Fig. 3. controls the current through the semiconductor breaker device by means of introducing a variable resistance controlled by a gate voltage of the insulated gate bipolar transistor.
  • Fig. 5a illustrates the variable resistance whereas Fig. 5b is a diagram of the gate voltage and the variable resistance as functions of time during operation of the hybrid circuit breaker.
  • DETAILED DESCRIPTION OF EMBODIMENTS DETAILED DESCRIPTION OF EMBODIMENTS
  • Fig. 3 is illustrated a hybrid circuit breaker for interrupting fault currents according to an embodiment of the invention.
  • the hybrid circuit breaker comprises a mechanical switch 31 and has a voltage rating of up to 1 kV.
  • the current is passed through the mechanical switch 31, but when being exposed to a fault current, the mechanical switch 31 is arranged to open, thereby commuting current to the semiconductor breaker device 32.
  • the semiconductor breaker device 32 is eventually arranged to interrupt the fault current.
  • the mechanical switch 31 has a contact arm 33 with two contacts 33a-b abutting stationary contacts 34a-b of a circuit when being closed.
  • the contact arm 33 is rotatable around an axis of rotation 35 to allow the two contacts 33a-b of the contact arm 33 to be removed from the stationary contacts 34a-b such that the mechanical switch 31 opens.
  • Fig. 3 illustrates the mechanical switch 31 in an open state.
  • Fig. 3 only illustrates the mechanical switch 31 schematically.
  • the exact shapes of the contacts may be different than illustrated and further, the mechanical switch
  • the mechanical switch 31 is provided with a device for holding the mechanical switch 31 in an open state, and for subsequent closing of the mechanical switch 31 (when the fault has been handled) .
  • the two contacts 33a-b of the contact arm 33 are located at different distances xl, x2 from the axis of rotation 35 such that the separations zl, z2 between the two contacts 33a-b of the contact arm 33 and the two stationary contacts 34a-b are different when the mechanical switch 31 opens or is open.
  • Such mechanical switch 31 is referred to as an asymmetric mechanical switch.
  • the contacts 33a-b of the contact arm 33 are located on opposite sides of the axis of rotation 35.
  • the semiconductor breaker device 32 is connected in parallel with the contact 33b of the contact arm 33 and the stationary contact 34b which separate most when the mechanical switch 31 opens .
  • the mechanical switch 31 can be latched in open position at lower current and therefore the dead time will be shorter implying a comparably lower turn-off current.
  • the semiconductor breaker device 32 comprises an insulated gate bipolar transistor (IGBT) 36, a diode bridge 37, and a gate drive unit 38.
  • IGBT insulated gate bipolar transistor
  • the diode bridge is commonly used in hybrid circuit breakers in order to be capable of interrupting a DC fault current in any direction or an AC fault current, see e.g.
  • the gate drive unit 38 is arranged to measure the voltage across the semiconductor breaker device 32. When the voltage increases and reaches a certain threshold level this implies that a fault is occurred. As a result fast fault detection can be achieved.
  • the gate driver unit 38 is arranged to control the fault current commutated to the semiconductor breaker device 32 by means of controlling the gate voltage of the insulated gate bipolar transistor 36 and operating the insulated gate bipolar transistor 36 in its linear region.
  • the current can be clamped at different levels.
  • the gate drive unit 38 controls the fault current commutated to the semiconductor breaker device as a function of time and the current commutated is allowed to increase in a controlled manner, by means of a gradual or stepwise change of the gate voltage of the insulated gate bipolar transistor 36.
  • Fig. 4 is a diagram of the fault current and the current through the semiconductor breaker device, respectively, as a function of time during operation of the inventive hybrid circuit breaker.
  • the fault current is denoted by 41 and the current through the semiconductor breaker device 32 is denoted by 42. It can be seen that the insulated gate bipolar transistor 36 is operated in the linear region at e.g. 43. The latching of the mechanical switch
  • i on is the fault current level where current is started to commutate to the semiconductor breaker device 32 and t on the time instant when the semiconductor breaker device 32 is switched on
  • i O ff is the peak fault current and t Off the time instant when the semiconductor breaker device 32 is switched off
  • Ri, R 2 , R3, and R ce are resistances of the insulated gate bipolar transistor 36.
  • Figs. 5a-b illustrate how the insulated gate bipolar transistor 36 controls the current through the semiconductor breaker device
  • Fig. 5a illustrates the variable resistance
  • Fig. 5b is a diagram of the gate voltage V g and the variable resistance R va r as functions of time during operation of the hybrid circuit breaker.
  • the values V g i, V g2 , V g3 , and Vg ma* of the gate voltage give the respective resistances Ri, R 2 , R3, and Rce-
  • the insulated gate bipolar transistor 36 of the semiconductor breaker device 32 is turned on applying the lowest gate voltage V g i at the gate thereof. This implies that the semiconductor breaker device 32 is at high resistance and a small amount of the fault current is flowing through the semiconductor breaker device 32. Then the gate voltage is increased allowing a higher current to flow through the semiconductor breaker device. This is repeated, i.e. the gate voltage is increased stepwise, until the mechanical switch 31 is latched at a secure position in the open state. Thus, the semiconductor breaker device 32 is operated as a linear regulator.
  • the gate voltage is increased so the semiconductor breaker device 32 fully commutates the current from the mechanical switch 31.
  • the semiconductor breaker device 32 will remain turned on for a certain time instance to make sure that the arc is extinguished. Finally, the semiconductor breaker device is turned off at considerably lower peak current compared with the symmetrical hybrid breaker.

Landscapes

  • Driving Mechanisms And Operating Circuits Of Arc-Extinguishing High-Tension Switches (AREA)

Abstract

A hybrid circuit breaker for interrupting fault currents comprises a mechanical switch (31) through which a normal current is passed, the mechanical switch being arranged to open in case of being exposed to a fault current; and a semiconductor breaker device (32) to which the fault current is commutated, the semiconductor breaker device being arranged to break the fault current. The mechanical switch has a contact arm (33) with two contacts (33a-b) abutting stationary contacts (34a-b) of a circuit when being closed, wherein the two contacts of the contact arm are located at different distances (x1, x2) from the axis of rotation such that the separations (z1, z2) between the two contacts of the contact arm and the two stationary contacts are different when the mechanical switch opens. The semiconductor breaker device is connected in parallel with the contact (33b) of the contact arm and the stationary contact (34b) which separate most when the mechanical switch opens.

Description

HYBRID CIRCUIT BREAKER TECHNICAL FIELD OF THE INVENTION
The present invention generally relates to hybrid circuit breakers . DESCRIPTION OF RELATED ART AND BACKGROUND OF THE INVENTION
In order to overcome the most severe disadvantage of the solid state breakers a number of hybrid circuit breakers have been proposed. The hybrid breaker is a combination of a conventional mechanical circuit breaker and a solid state breaker. At nominal operation the current flows through the mechanical circuit breaker and the solid state breaker is only used during faults. As in the case of the solid state circuit breakers unidirectional and bidirectional switches can be used depending on the requirements of the application. In Figs, la-c a bidirectional hybrid circuit breaker including a conventional mechanical circuit breaker 11 and a solid state breaker 12 is displayed in schematic circuit diagrams during different operation stages.
During a pole-to-pole fault the current flows through the mechanical circuit breaker 11. At a time instant the mechanical circuit breaker 11 is opened and the solid state circuit breaker 12 is turned on. As the mechanical circuit breaker 11 opens an arc is initiated across the mechanical circuit breaker 11 and if the arc voltage is sufficient the hybrid circuit breaker will commutate the fault current to the solid state circuit breaker 12 as shown in Fig. Ia. After current commutation and arc extinction, the fault current flows through the solid state breaker 12 as shown in Fig. Ib. In order to avoid arc re- ignition the conduction time should be sufficiently long to allow the contact gap in the mechanical circuit breaker 11 to cool down to avoid reignition. When the solid state circuit breaker 12 is turned off the stored energy in the loop inductance is absorbed by the overvoltage protection element as shown in Fig. Ic. Figs. 2a-b are diagrams of the arc current and the arc voltage, respectively, as a function of time during operation of the bidirectional hybrid circuit breaker of Figs . la-c .
The hybrid circuit breaker requires the same amount of semiconductors as the fully solid state circuit breaker. However, for the hybrid circuit breaker, the conduction losses are not an issue since the current in nominal operation flows through the mechanical circuit breaker. Further, for the same reason, cooling is not a crucial issue for the hybrid circuit breaker. Yet, heat sinks are required because the fault current is commutated to the solid state circuit breaker during faults.
SUMMARY OF THE INVENTION
Nevertheless, the use of the conventional mechanical circuit breaker in combination with a solid state circuit breaker is challenging due to the limited current rating capabilities of the solid state circuit breaker. The mechanical breaker can interrupt a fault current of some tens of kiloamperes whereas controllable solid state devices can typically only interrupt currents of some kilo amperes.
Further, if the loop inductance is high, a long commutation time is required. Long commutation time results, however, in a further increase in magnitude of the fault current and therefore the solid state circuit breaker has to interrupt very high currents .
Still further, the conduction time of the solid state circuit breaker is critical due to that (i) long conduction time is required in order to completely commutate the current from the mechanical circuit breaker to the solid state circuit breaker, (ii) long conduction time is required when the loop inductance is high, and (iii) long conduction time is required in order to extinguish the arc voltage of the mechanical circuit breaker, i.e. to ensure that no current is flowing through the mechanical circuit breaker. However, long conduction times result in high conduction losses and as a result overheating of the device which can lead into device failures.
Accordingly, it is an object of the present invention to provide a hybrid circuit breaker which addresses the above issues.
It is a particular object of the invention to provide a hybrid circuit breaker, which has smaller peak current, shorter commutation time, and shorter conduction time.
It is a further object of the invention to provide such a hybrid circuit breaker, which has fast fault detection, and shorter dead time.
It is a further object of the invention to provide such a hybrid circuit breaker, which is compact, robust, and reliable.
These objects among others are, according to the present invention, attained by hybrid circuit breakers as claimed in the appended patent claims .
According to one aspect of the invention a hybrid circuit breaker for breaking fault currents is provided, wherein the circuit breaker comprises a mechanical switch through which a normal current is passed, the mechanical switch being arranged to open in case of being exposed to a fault current, and a solid state or semiconductor breaker device, to which the fault current is commutated, the semiconductor breaker device being arranged to break the fault current. The mechanical switch has a contact arm with two contacts abutting stationary contacts of a circuit when being closed, the contact arm being rotatable around an axis of rotation to allow the two contacts of the contact arm to be removed from the stationary contacts such that the mechanical switch opens. The contact arm is asymmetrically arranged, i.e. the two contacts of the contact arm are located at different distances from the axis of rotation such that the separations between the two contacts of the contact arm and the two stationary contacts are different when the mechanical switch opens. The semiconductor breaker device is connected in parallel with the contact of the contact arm and the stationary contact which separate most when the mechanical switch opens.
By such hybrid circuit breaker faster interruption and comparably lower turn-off current are obtained.
More in detail, the mechanical switch will be latched in open position at lower current and therefore the dead time will be shorter implying a comparably lower turn-off current. Lower turn-off current in turn results in considerably lower energy dissipation in the semiconductor breaker device and therefore the footprint of the device can be reduced.
Further, a control strategy is proposed in combination with the asymmetric hybrid circuit breaker.
In one embodiment the inventive semiconductor breaker device comprises accordingly a control unit arranged to control the fault current commutated to the semiconductor breaker device as a function of time. The current commutated is allowed to increase during the fault handling in a controlled manner.
Preferably, the control unit is arranged to fully commutate the fault current to the semiconductor breaker device for a certain time period when the mechanical switch has fully opened and been latched in the open position to make sure that the contact gap cools down sufficiently. When the certain time period has lapsed, the current through the semiconductor breaker device is interrupted. Hereby, it can be made sure that the current is interrupted without risk of reigniting the contact gap.
In a particular implementation, the semiconductor breaker device comprises an insulated gate bipolar transistor (IGBT) and the control unit, which may be a gate drive unit, is arranged to control the fault current commutated to the semiconductor breaker device by means of controlling the gate voltage of the insulated gate bipolar transistor.
The gate drive unit can measure the voltage across the semiconductor breaker device and when the voltage across the device is increased and reaches a certain threshold level, this implies that a fault is occurred, and the control of the fault current commutated to the semiconductor breaker device is initiated. The gate voltage is thereafter increased with time, preferably stepwise, in a controlled manner.
The hybrid circuit breaker of the present invention can be a unidirectional device or a bidirectional device capable of breaking a DC fault current in any direction or an AC fault current. The hybrid circuit breaker has preferably a voltage rating of up to 1 kV.
Further details of the invention are set out in the dependent claims .
Advantages of the present invention may include:
• a fast fault detection, • turn-on at low fault current,
• comparably short dead time,
• comparably short commutation time,
• short conduction time of the semiconductor breaker device, • low turn-off current,
• only low energy has to be handled (dissipated) by the semiconductor breaker device,
• compact solution, • low temperature rise in the semiconductor breaker device due to lower peak current,
• fast interruption and current limiting ability, and
• use in both AC and DC current interruptions .
Further characteristics of the invention, and advantages thereof, will be evident from the following detailed description of preferred embodiments of the present invention given hereinafter and the accompanying Figs. 1-5, which are given by way of illustration only, and are thus not limitative of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
Figs, la-c display in schematic circuit diagrams a bidirectional hybrid circuit breaker during different operation stages according to prior art.
Figs. 2a-b are diagrams of the arc current and the arc voltage, respectively, as a function of time during operation of the bidirectional hybrid circuit breaker of Figs. la-c.
Fig. 3 displays schematically, partly in a side view, partly in a circuit diagram, a hybrid circuit breaker according to an embodiment of the present invention. Fig. 4 is a diagram of the current as a function of time during operation of the hybrid circuit breaker of Fig. 3. Figs. 5a-b illustrate how an insulated gate bipolar transistor of a semiconductor breaker device of the hybrid circuit breaker of Fig. 3. controls the current through the semiconductor breaker device by means of introducing a variable resistance controlled by a gate voltage of the insulated gate bipolar transistor. Fig. 5a illustrates the variable resistance whereas Fig. 5b is a diagram of the gate voltage and the variable resistance as functions of time during operation of the hybrid circuit breaker. DETAILED DESCRIPTION OF EMBODIMENTS
In Fig. 3 is illustrated a hybrid circuit breaker for interrupting fault currents according to an embodiment of the invention. The hybrid circuit breaker comprises a mechanical switch 31 and has a voltage rating of up to 1 kV. During normal operation conditions the current is passed through the mechanical switch 31, but when being exposed to a fault current, the mechanical switch 31 is arranged to open, thereby commuting current to the semiconductor breaker device 32. The semiconductor breaker device 32 is eventually arranged to interrupt the fault current.
The mechanical switch 31 has a contact arm 33 with two contacts 33a-b abutting stationary contacts 34a-b of a circuit when being closed. The contact arm 33 is rotatable around an axis of rotation 35 to allow the two contacts 33a-b of the contact arm 33 to be removed from the stationary contacts 34a-b such that the mechanical switch 31 opens. Fig. 3 illustrates the mechanical switch 31 in an open state.
Note that Fig. 3 only illustrates the mechanical switch 31 schematically. The exact shapes of the contacts may be different than illustrated and further, the mechanical switch
31 is provided with a device for holding the mechanical switch 31 in an open state, and for subsequent closing of the mechanical switch 31 (when the fault has been handled) .
The two contacts 33a-b of the contact arm 33 are located at different distances xl, x2 from the axis of rotation 35 such that the separations zl, z2 between the two contacts 33a-b of the contact arm 33 and the two stationary contacts 34a-b are different when the mechanical switch 31 opens or is open. Such mechanical switch 31 is referred to as an asymmetric mechanical switch. Preferably, the contacts 33a-b of the contact arm 33 are located on opposite sides of the axis of rotation 35.
The semiconductor breaker device 32 is connected in parallel with the contact 33b of the contact arm 33 and the stationary contact 34b which separate most when the mechanical switch 31 opens . Hereby, the mechanical switch 31 can be latched in open position at lower current and therefore the dead time will be shorter implying a comparably lower turn-off current.
The semiconductor breaker device 32 comprises an insulated gate bipolar transistor (IGBT) 36, a diode bridge 37, and a gate drive unit 38. The diode bridge is commonly used in hybrid circuit breakers in order to be capable of interrupting a DC fault current in any direction or an AC fault current, see e.g.
US 2005/146814 and US 6,760,202, the contents of which being hereby incorporated by reference. The gate drive unit 38 is arranged to measure the voltage across the semiconductor breaker device 32. When the voltage increases and reaches a certain threshold level this implies that a fault is occurred. As a result fast fault detection can be achieved.
Then, the gate driver unit 38 is arranged to control the fault current commutated to the semiconductor breaker device 32 by means of controlling the gate voltage of the insulated gate bipolar transistor 36 and operating the insulated gate bipolar transistor 36 in its linear region. Hereby, the current can be clamped at different levels.
The gate drive unit 38 controls the fault current commutated to the semiconductor breaker device as a function of time and the current commutated is allowed to increase in a controlled manner, by means of a gradual or stepwise change of the gate voltage of the insulated gate bipolar transistor 36.
Fig. 4 is a diagram of the fault current and the current through the semiconductor breaker device, respectively, as a function of time during operation of the inventive hybrid circuit breaker.
The fault current is denoted by 41 and the current through the semiconductor breaker device 32 is denoted by 42. It can be seen that the insulated gate bipolar transistor 36 is operated in the linear region at e.g. 43. The latching of the mechanical switch
31 is indicated at 44.
The following parameters are indicated in Fig. 4: ion is the fault current level where current is started to commutate to the semiconductor breaker device 32 and ton the time instant when the semiconductor breaker device 32 is switched on, iOff is the peak fault current and tOff the time instant when the semiconductor breaker device 32 is switched off, and Ri, R2, R3, and Rce are resistances of the insulated gate bipolar transistor 36. Figs. 5a-b illustrate how the insulated gate bipolar transistor 36 controls the current through the semiconductor breaker device
32 by means of introducing the variable resistance controlled by a gate voltage of the insulated gate bipolar transistor 36. Fig. 5a illustrates the variable resistance, whereas Fig. 5b is a diagram of the gate voltage Vg and the variable resistance Rvar as functions of time during operation of the hybrid circuit breaker. The values Vgi, Vg2, Vg3, and Vgma* of the gate voltage give the respective resistances Ri, R2, R3, and Rce-
As can be seen in Figs. 4 and 5, at a certain time instant after the fault has been detected the insulated gate bipolar transistor 36 of the semiconductor breaker device 32 is turned on applying the lowest gate voltage Vgi at the gate thereof. This implies that the semiconductor breaker device 32 is at high resistance and a small amount of the fault current is flowing through the semiconductor breaker device 32. Then the gate voltage is increased allowing a higher current to flow through the semiconductor breaker device. This is repeated, i.e. the gate voltage is increased stepwise, until the mechanical switch 31 is latched at a secure position in the open state. Thus, the semiconductor breaker device 32 is operated as a linear regulator.
When the mechanical switch 31 is locked or latched in open state, re-strike of the contacts is not possible. Consequently, the gate voltage is increased so the semiconductor breaker device 32 fully commutates the current from the mechanical switch 31. When the current is commutated to the semiconductor breaker device 32, the semiconductor breaker device 32 will remain turned on for a certain time instance to make sure that the arc is extinguished. Finally, the semiconductor breaker device is turned off at considerably lower peak current compared with the symmetrical hybrid breaker.

Claims

1. A hybrid circuit breaker for interrupting fault currents comprising:
- a mechanical switch (31) through which a normal current is passed, the mechanical switch being arranged to open in case of being exposed to a fault current; and
- a semiconductor breaker device (32) to which the fault current is commutated, the semiconductor breaker device being arranged to interrupt said fault current, wherein - the mechanical switch has a contact arm (33) with two contacts (33a-b) abutting stationary contacts (34a-b) of a circuit when being closed, the contact arm being rotatable around an axis of rotation (35) to allow the two contacts of the contact arm to be removed from the stationary contacts such that the mechanical switch opens;
- the two contacts of the contact arm are located at different distances (xl, x2 ) from the axis of rotation such that the separations (zl, z2) between the two contacts of the contact arm and the two stationary contacts are different when the mechanical switch opens; and
- the semiconductor breaker device is connected in parallel with the contact (33b) of the contact arm and the stationary contact (34b) which separate most when the mechanical switch opens .
2. The hybrid circuit breaker of claim 1 wherein the contacts of the contact arm are located on opposite sides of the axis of rotation.
3. The hybrid circuit breaker of claim 1 or 2 wherein the semiconductor breaker device comprises a control unit (38) arranged to control the fault current coitimutated to the semiconductor breaker device as a function of time.
4. The hybrid circuit breaker of claim 3 wherein the control unit is arranged to control the fault current commutated to the semiconductor breaker device to increase linearly.
5. The hybrid circuit breaker of claim 3 or 4 wherein the semiconductor breaker device comprises an insulated gate bipolar transistor (36) and the control unit is arranged to control the fault current commutated to the semiconductor breaker device by means of controlling the gate voltage of the insulated gate bipolar transistor, preferably controlling the gate voltage of the insulated gate bipolar transistor stepwise.
6. The hybrid circuit breaker of any of claims 3-5 wherein the control unit is arranged to fully commutate the fault current to the semiconductor breaker device for a certain time period when the mechanical switch has been fully opened.
7. The hybrid circuit breaker of claim 6 wherein the control unit is arranged to interrupt the current through the semiconductor breaker device when the certain time period has lapsed.
8. The hybrid circuit breaker of any of claims 3-5 wherein the control unit is arranged to initiate the control of the fault current commutated to the semiconductor breaker device in response to the voltage across the semiconductor breaker device.
9. The hybrid circuit breaker of any of claims 1-8 wherein the semiconductor breaker device comprises a diode bridge (37) in order to be capable of interrupting a DC fault current in any direction or an AC fault current.
10. The hybrid circuit breaker of any of claims 1-8 wherein the hybrid circuit breaker has a voltage rating of up to 1 kV.
EP09781805.8A 2009-08-13 2009-08-13 Hybrid circuit breaker Active EP2465129B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2009/060499 WO2011018113A1 (en) 2009-08-13 2009-08-13 Hybrid circuit breaker

Publications (2)

Publication Number Publication Date
EP2465129A1 true EP2465129A1 (en) 2012-06-20
EP2465129B1 EP2465129B1 (en) 2013-04-24

Family

ID=42101552

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09781805.8A Active EP2465129B1 (en) 2009-08-13 2009-08-13 Hybrid circuit breaker

Country Status (3)

Country Link
EP (1) EP2465129B1 (en)
ES (1) ES2420531T3 (en)
WO (1) WO2011018113A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017213774A1 (en) * 2016-06-08 2017-12-14 Eaton Corporation Hybrid mccb employing electromechanical contacts and power electronic devices

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2624274B1 (en) * 2012-02-03 2014-12-31 ABB S.p.A. Hybrid current switching device
FR3000284B1 (en) 2012-12-20 2016-05-13 Schneider Electric Ind Sas CONTACTOR-BREAKER DEVICE
CN103972875B (en) * 2013-01-31 2016-07-06 南京南瑞继保电气有限公司 Limit line current or make device and the control method thereof of electric current disjunction
US9054530B2 (en) 2013-04-25 2015-06-09 General Atomics Pulsed interrupter and method of operation
CN104184108B (en) 2013-05-21 2018-08-10 通用电气公司 Dc circuit breaker and its control method
FR3007191B1 (en) * 2013-06-17 2016-12-09 Turbomeca HYBRID CUTTING ORGAN FOR ELECTRICAL CIRCUIT
GB2520529A (en) * 2013-11-22 2015-05-27 Eaton Ind Netherlands Bv Circuit breaker with hybrid switch
US9947496B2 (en) 2013-08-30 2018-04-17 Eaton Industries (Netherlands) B.V. Circuit breaker with hybrid switch
GB2517742A (en) * 2013-08-30 2015-03-04 Eaton Ind Netherlands Bv Circuit breaker with hybrid switch
GB2520959A (en) * 2013-12-04 2015-06-10 Eaton Ind Netherlands Bv Semi voltage dependent circuit breaker
GB2520961A (en) 2013-12-04 2015-06-10 Eaton Ind Netherlands Bv Automatic reclosing alternating current circuit breaker
GB2521188A (en) 2013-12-12 2015-06-17 Eaton Ind Netherlands Bv Alternating current circuit breaker with self-test capability
GB2527534A (en) 2014-06-24 2015-12-30 Eaton Ind Netherlands Bv Selective circuit breaker
US9654102B2 (en) 2014-10-09 2017-05-16 General Electric Company Hybrid direct-current circuit breaker
DE102015212802A1 (en) * 2015-07-08 2017-01-12 Ellenberger & Poensgen Gmbh Separating device for DC interruption
EP3748794A1 (en) * 2019-06-05 2020-12-09 Siemens Aktiengesellschaft Electronic fuse for a power supply
US20250299891A1 (en) * 2024-03-20 2025-09-25 Eaton Intelligent Power Limited Rotary thomson coil actuator for 2- and 3-phase ultra-fast circuit interrupters

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050219032A1 (en) * 2004-04-01 2005-10-06 General Electric Company Method and apparatus for providing electrical protection to a protected circuit
US8144445B2 (en) * 2007-06-12 2012-03-27 General Electric Company Micro-electromechanical system based switching

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2011018113A1 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017213774A1 (en) * 2016-06-08 2017-12-14 Eaton Corporation Hybrid mccb employing electromechanical contacts and power electronic devices
US9922781B2 (en) 2016-06-08 2018-03-20 Eaton Corporation Hybrid MCCB employing electromechanical contacts and power electronic devices

Also Published As

Publication number Publication date
EP2465129B1 (en) 2013-04-24
WO2011018113A1 (en) 2011-02-17
ES2420531T3 (en) 2013-08-23

Similar Documents

Publication Publication Date Title
EP2465129B1 (en) Hybrid circuit breaker
US10476255B2 (en) DC circuit breaker
JP4913761B2 (en) Current limiting circuit breaker
US10116132B2 (en) Device for efficient direct current interruption
US10176947B2 (en) High-voltage DC circuit breaker for blocking DC current
CN104143809B (en) DC current switching device, electronic device and method of switching associated DC circuits
CN109997208B (en) Low-voltage circuit breaker device
CN106663557B (en) Disconnect switch for interrupting DC current
US11195675B2 (en) Low-voltage circuit breaker device
JP5612638B2 (en) Current limiter
US10418210B2 (en) DC circuit breaker
CN110808572A (en) Switching device
US10395866B2 (en) High voltage DC circuit breaker
JP2013214406A (en) Circuit cut-off switch for dc circuit
JP2014120364A (en) Circuit breaker switch for dc circuit
CN109417282B (en) Semiconductor cutting equipment
JP7226551B2 (en) DC power supply
KR102033678B1 (en) DC power source cutoff control apparatus
KR100928937B1 (en) Parallel breaking device of power line
US20140374382A1 (en) Arc-Jump Circuit Breaker And Method Of Circuit Breaking
EP3352193B1 (en) Circuit breaker
JP2015230849A (en) Switch
CN119905377A (en) DC circuit breaker

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20120313

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

DAX Request for extension of the european patent (deleted)
GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

RIN1 Information on inventor provided before grant (corrected)

Inventor name: SHUKLA, ANSHUMAN

Inventor name: BACKMAN, MAGNUS

Inventor name: DEMETRIADES, GEORGIOS

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 609056

Country of ref document: AT

Kind code of ref document: T

Effective date: 20130515

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602009015285

Country of ref document: DE

Effective date: 20130627

REG Reference to a national code

Ref country code: SE

Ref legal event code: TRGR

REG Reference to a national code

Ref country code: ES

Ref legal event code: FG2A

Ref document number: 2420531

Country of ref document: ES

Kind code of ref document: T3

Effective date: 20130823

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 609056

Country of ref document: AT

Kind code of ref document: T

Effective date: 20130424

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

REG Reference to a national code

Ref country code: NL

Ref legal event code: VDEP

Effective date: 20130424

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130824

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: BE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130725

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130826

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130724

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130724

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

26N No opposition filed

Effective date: 20140127

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20130831

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20130831

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602009015285

Country of ref document: DE

Effective date: 20140127

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20130813

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20130424

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20090813

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20130813

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 8

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 9

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 10

REG Reference to a national code

Ref country code: ES

Ref legal event code: PC2A

Owner name: ABB SCHWEIZ AG

Effective date: 20191030

REG Reference to a national code

Ref country code: DE

Ref legal event code: R081

Ref document number: 602009015285

Country of ref document: DE

Owner name: ABB SCHWEIZ AG, CH

Free format text: FORMER OWNER: ABB RESEARCH LTD., ZUERICH, CH

REG Reference to a national code

Ref country code: GB

Ref legal event code: 732E

Free format text: REGISTERED BETWEEN 20200206 AND 20200212

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: ES

Payment date: 20250925

Year of fee payment: 17

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20250820

Year of fee payment: 17

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20250825

Year of fee payment: 17

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20250821

Year of fee payment: 17

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20250829

Year of fee payment: 17

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: SE

Payment date: 20250820

Year of fee payment: 17