EP2351087A1 - Nonodrähte auf substratoberflächen, verfahren zu deren herstellung sowie deren verwendung - Google Patents
Nonodrähte auf substratoberflächen, verfahren zu deren herstellung sowie deren verwendungInfo
- Publication number
- EP2351087A1 EP2351087A1 EP09763848A EP09763848A EP2351087A1 EP 2351087 A1 EP2351087 A1 EP 2351087A1 EP 09763848 A EP09763848 A EP 09763848A EP 09763848 A EP09763848 A EP 09763848A EP 2351087 A1 EP2351087 A1 EP 2351087A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- nanowires
- nanoparticles
- nanoclusters
- solution
- substrate surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B1/00—Nanostructures formed by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
- H01L29/0669—Nanowires or nanotubes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
- H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
- H01L29/0669—Nanowires or nanotubes
- H01L29/0673—Nanowires or nanotubes oriented parallel to a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K30/00—Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
- H10K30/10—Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation comprising heterojunctions between organic semiconductors and inorganic semiconductors
- H10K30/15—Sensitised wide-bandgap semiconductor devices, e.g. dye-sensitised TiO2
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102008058400A DE102008058400A1 (de) | 2008-11-21 | 2008-11-21 | Nanodrähte auf Substratoberflächen, Verfahren zu deren Herstellung sowie deren Verwendung |
PCT/EP2009/008277 WO2010057652A1 (de) | 2008-11-21 | 2009-11-20 | Nonodrähte auf substratoberflächen, verfahren zu deren herstellung sowie deren verwendung |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2351087A1 true EP2351087A1 (de) | 2011-08-03 |
Family
ID=41600430
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP09763848A Withdrawn EP2351087A1 (de) | 2008-11-21 | 2009-11-20 | Nonodrähte auf substratoberflächen, verfahren zu deren herstellung sowie deren verwendung |
Country Status (6)
Country | Link |
---|---|
US (1) | US20110284820A1 (de) |
EP (1) | EP2351087A1 (de) |
KR (1) | KR20110099005A (de) |
CN (1) | CN102301479B (de) |
DE (1) | DE102008058400A1 (de) |
WO (1) | WO2010057652A1 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102569034A (zh) * | 2012-02-15 | 2012-07-11 | 中国科学院半导体研究所 | 在自然氧化的Si衬底上生长InAs纳米线的方法 |
CN102618269B (zh) * | 2012-03-13 | 2016-06-29 | 浙江理工大学 | 一种CdS/Sn异质结构纳米发光材料的制备方法 |
CN103794474A (zh) * | 2014-01-29 | 2014-05-14 | 中国科学院半导体研究所 | 硅衬底上生长纳米线的衬底处理方法 |
US9528194B2 (en) | 2014-03-31 | 2016-12-27 | Taiwan Semiconductor Manufacturing Company Limited & National Taiwan University | Systems and methods for forming nanowires using anodic oxidation |
US9953989B2 (en) | 2014-03-31 | 2018-04-24 | Taiwan Semiconductor Manufacturing Company Limited and National Taiwan University | Antifuse array and method of forming antifuse using anodic oxidation |
CN104070178A (zh) * | 2014-07-01 | 2014-10-01 | 扬州大学 | 一种粒径可控的单分散铋纳米粒子的制备方法 |
US10160906B2 (en) | 2015-02-24 | 2018-12-25 | Fondazione Istituto Italiano Di Tecnologia | Masked cation exchange lithography |
DE102017104906A1 (de) * | 2017-03-08 | 2018-09-13 | Olav Birlem | Anordnung und Verfahren zum Bereitstellen einer Vielzahl von Nanodrähten |
CN114520266A (zh) * | 2021-10-22 | 2022-05-20 | 中国科学院重庆绿色智能技术研究院 | 硫化铅光电导探测器及其制备方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004500226A (ja) * | 1997-10-29 | 2004-01-08 | ウニベルジテート ウルム | ナノ構造物 |
DE19747815A1 (de) | 1997-10-29 | 1999-05-06 | Univ Ulm | Nanostrukturierung von Oberflächen |
US20110039690A1 (en) * | 2004-02-02 | 2011-02-17 | Nanosys, Inc. | Porous substrates, articles, systems and compositions comprising nanofibers and methods of their use and production |
JP4813775B2 (ja) * | 2004-06-18 | 2011-11-09 | 日本電信電話株式会社 | 多孔構造体及びその製造方法 |
US8372470B2 (en) | 2005-10-25 | 2013-02-12 | Massachusetts Institute Of Technology | Apparatus and methods for controlled growth and assembly of nanostructures |
JP5032823B2 (ja) * | 2006-10-20 | 2012-09-26 | 日本電信電話株式会社 | ナノ構造およびナノ構造の作製方法 |
DE102007017032B4 (de) | 2007-04-11 | 2011-09-22 | MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. | Verfahren zur Herstellung von flächigen Größen- oder Abstandsvariationen in Mustern von Nanostrukturen auf Oberflächen |
CN101255603B (zh) * | 2007-12-06 | 2011-11-23 | 上海大学 | 模板电沉积法制备ⅱ-ⅵ族半导体纳米线的方法 |
-
2008
- 2008-11-21 DE DE102008058400A patent/DE102008058400A1/de not_active Withdrawn
-
2009
- 2009-11-20 CN CN200980146632.6A patent/CN102301479B/zh not_active Expired - Fee Related
- 2009-11-20 WO PCT/EP2009/008277 patent/WO2010057652A1/de active Application Filing
- 2009-11-20 KR KR1020117012545A patent/KR20110099005A/ko not_active Application Discontinuation
- 2009-11-20 US US13/130,234 patent/US20110284820A1/en not_active Abandoned
- 2009-11-20 EP EP09763848A patent/EP2351087A1/de not_active Withdrawn
Non-Patent Citations (1)
Title |
---|
See references of WO2010057652A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2010057652A8 (de) | 2011-06-16 |
DE102008058400A1 (de) | 2010-05-27 |
WO2010057652A1 (de) | 2010-05-27 |
CN102301479B (zh) | 2014-08-27 |
CN102301479A (zh) | 2011-12-28 |
KR20110099005A (ko) | 2011-09-05 |
US20110284820A1 (en) | 2011-11-24 |
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Legal Events
Date | Code | Title | Description |
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PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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17P | Request for examination filed |
Effective date: 20110516 |
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AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR |
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RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: BOCK, EVA Inventor name: SPATZ, JOACHIM, P. Inventor name: KUDERA, STEFAN Inventor name: MANNA, LIBERATO |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: SPATZ, JOACHIM, P. Inventor name: BOCK, EVA Inventor name: KUDERA, STEFAN Inventor name: MANNA, LIBERATO |
|
DAX | Request for extension of the european patent (deleted) | ||
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
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18D | Application deemed to be withdrawn |
Effective date: 20150602 |