EP2186281A1

EP2186281A1 - Demodulation device and method in transmission system

Info

Publication number: EP2186281A1
Application number: EP08753491A
Authority: EP
Inventors: Jae Hyun Seo; Young Su Kim; Kyu Tae Yang; Ju Yeun Kim; Seomee Choi; Jae-Hwui Bae; Gwang Soon Lee; Joung Il Yun; Kwang-Yong Kim; Heung Mook Kim; Jong Soo Lim; Soo In Lee
Original assignee: Electronics and Telecommunications Research Institute ETRI
Current assignee: Electronics and Telecommunications Research Institute ETRI
Priority date: 2007-08-07
Filing date: 2008-05-14
Publication date: 2010-05-19
Also published as: KR20090014741A; KR100909279B1; WO2009020275A1; EP2186281A4

Abstract

A hierarchical demodulation device channel estimates a reference symbol based on a given symbol to generate a channel estimate of the reference symbol, channel estimates a plurality of information symbols based on the channel estimate of the reference symbol to generate channel estimates of a plurality of information symbols, channel estimates a plurality of service symbols based on the channel estimates of a plurality of information symbols to generate channel estimates of a plurality of service symbols, channel equalizes a signal based on the channel estimate of the reference symbol, the channel estimates of a plurality of information symbols, and the channel estimates of a plurality of service symbols, and hierarchically separates the channel equalized signal to generate a first hierarchical modulation signal and a second hier¬ archical modulation signal. Therefore, receiving performance of the low priority signals can be improved without influencing the high priority signals while maintaining compatibility with the existing system.

Description

DEMODULATION DEVICE AND METHOD IN TRANSMISSION

SYSTEM

Technical Field

[1] The present invention relates to a demodulation method and device in a transmission system. Particularly, the present invention relates to a hierarchical demodulation method and device in an orthogonal frequency division multiplexing (OFDM) transmission system.

[2] This work was supported by the IT R&D program of MIC/IITA [2006-S-017-02, Development of advanced transmission technology for the terrestrial DMB system]. Background Art

[3] Hierarchical modulation is a method for transmitting a plurality of independent signals by modulating at least two independent signals that are modulated by different modulation methods into a single signal.

[4] A high priority signal in hierarchical modulation is a signal that guarantees reverse compatibility with the conventional system, and a low priority signal is a signal for providing an additional service to the high priority signal. When the hierarchically modulated signal is transmitted, receiving performance of the low priority signal is worse than receiving performance of the high priority signal.

[5] The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art. Disclosure of Invention Technical Problem

[6] The present invention has been made in an effort to provide a demodulation modulation method and device for improving receiving performance of a low priority signal without influencing a high priority signal when receiving a hierarchically modulated signal.

Technical Solution

[7] In one aspect of the present invention, a hierarchical demodulation method includes: receiving a signal including a reference symbol, a plurality of information symbols, and a plurality of service symbols; generating a channel estimate of a reference symbol by channel estimating the reference symbol based on a given symbol corresponding to the reference symbol; generating channel estimates of a plurality of information symbols by channel estimating the plurality of information symbols based on the channel estimate of the reference symbol; generating channel estimates of a plurality of service symbols by channel estimating the plurality of service symbols based on the channel estimates of the plurality of information symbols; generating a channel equalized signal by channel equalizing the signal based on the channel estimate of the reference symbol, the channel estimates of the plurality of information symbols, and the channel estimates of the plurality of service symbols; and generating a first hierarchical modulation signal and a second hierarchical modulation signal by hierarchically separating the channel equalized signal.

[8] The first hierarchical modulation signal is a high priority modulation signal, and the second hierarchical modulation signal is a low priority modulation signal.

[9] The plurality of service symbols respectively include a pilot symbol, and the step of generating channel estimates of a plurality of service symbols includes generating channel estimates of the plurality of service symbols by channel estimating the plurality of service symbols based on position information of a given pilot symbol.

[10] The step of hierarchically separating includes phase correcting the channel equalized signal to generate the phase corrected signal, and hierarchically separating the phase corrected signal to generate the high priority modulation signal and the low priority modulation signal.

[11] The hierarchical demodulation method further includes demodulating the high priority modulation signal to generate a high priority signal; channel decoding the high priority signal to generate high priority data; demodulating the low priority modulation signal to generate a low priority signal; and channel decoding the low priority signal to generate low priority data.

[12] In another aspect of the present invention, a hierarchical demodulation method includes: receiving a signal including a plurality of symbols; channel estimating a reference symbol for providing a reference from among the plurality of symbols to generate a channel estimate of the reference symbol; channel estimating the plurality of symbols based on a channel estimate of the reference symbol to generate a plurality of channel estimates respectively corresponding to the plurality of symbols; and channel equalizing the signal according to the plurality of channel estimates to generate the channel equalized signal.

[13] The plurality of symbols respectively have an index for indicating an order, and the reference symbol is the first symbol from among the plurality of symbols.

[14] The step of generating the plurality of channel estimates includes generating a channel estimate of the k"¹ symbol based on the channel estimate of the (k-l)"¹ symbol.

[15] The hierarchical demodulation method further includes phase correcting the channel equalized signal to generate the phase corrected signal, and hierarchically separating the phase corrected signal to generate a high priority modulation signal and a low priority modulation signal.

[16] In another aspect of the present invention, a hierarchical demodulation device includes a receiver, a pilot information storage unit, a first channel estimator, a second channel estimator, a third channel estimator, and a channel equalizer.

[17] The receiver receives a transmission frame type signal including a phase reference symbol, a fast information channel, and a main service channel.

[18] The pilot information storage unit stores position information of a pilot symbol included in the main service channel

[19] The first channel estimator outputs a first channel estimate by channel estimating the phase reference symbol.

[20] The second channel estimator outputs a second channel estimate by channel estimating the fast information channel according to a channel estimate of the phase reference symbol.

[21] The third channel estimator outputs a third channel estimate by channel estimating the main service channel according to the channel estimate of the fast information channel based on position information of the pilot symbol.

[22] The channel equalizer outputs a channel equalized signal by channel equalizing the signal according to the first channel estimate, the second channel estimate, and the third channel estimate.

[23] The channel equalizer includes a noise removing filter for removing noise from the channel estimate, an auto regressive filter for auto regressive filtering the channel estimate having passed through the noise removing filter, and an interpolator for interpolating the channel estimate having passed through the auto regressive filter.

[24] The hierarchical demodulation device further includes: a phase corrector for outputting a phase corrected signal by phase correcting the channel equalized signal; a hierarchical separator for outputting a high priority modulation signal and a low priority modulation signal by hierarchically separating the phase corrected signal; a high priority demodulator for outputting a high priority signal by demodulating the high priority modulation signal; and a low priority demodulator for outputting a low priority signal by demodulating the low priority modulation signal.

Advantageous Effects

[25] According to the present invention, receiving performance of the low priority can be improved without influencing the high priority while maintaining compatibility with the existing system in the hierarchical modulation applied OFDM-based transmission system.

[26] According to the present invention, receiving performance of the existing terrestrial digital audio broadcasting (T-DAB) or the terrestrial digital multimedia broadcasting (T-DMB) system is improved and simultaneously low priority demodulation performance is increased by using a pilot symbol that exists in the low priority signal. Brief Description of the Drawings

[27] FIG. 1 is a block diagram of a hierarchical modulation device according to an exemplary embodiment of the present invention.

[28] FIG. 2 is a block diagram of a hierarchical modulation signal generator according to an exemplary embodiment of the present invention.

[29] FIG. 3 is a configuration diagram of a transmission frame according to an exemplary embodiment of the present invention.

[30] FIG. 4 is a block diagram of a hierarchical demodulation device according to an exemplary embodiment of the present invention.

[31] FIG. 5 is a block diagram of a channel equalizer according to an exemplary embodiment of the present invention.

[32] FIG. 6 is a flowchart of a hierarchical modulation method according to an exemplary embodiment of the present invention.

[33] FIG. 7 shows a method for a hierarchical modulator of a hierarchical modulation signal generator to generate a hierarchical modulation signal according to an exemplary embodiment of the present invention.

[34] FIG. 8 shows a flowchart of a hierarchical demodulation method according to an exemplary embodiment of the present invention.

[35] FIG. 9 is a drawing showing a channel estimate using PRS according to an exemplary embodiment of the present invention.

[36] FIG. 10 is a drawing showing a change of a channel estimate of an FIC symbol according to an exemplary embodiment of the present invention.

[37] FIG. 11 is a drawing showing a change of a channel estimate of an MSC symbol according to an exemplary embodiment of the present invention. Mode for the Invention

[38] In the following detailed description, only certain exemplary embodiments of the present invention have been shown and described, simply by way of illustration. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not restrictive. Like reference numerals designate like elements throughout the specification.

[39] Throughout this specification and the claims which follow, unless explicitly described to the contrary, the word "comprising" and variations such as "comprises" will be understood to imply the inclusion of stated elements but not the exclusion of any other elements. Also, the terms of a unit, a device, and a module in the present specification represent a unit for processing a predetermined function or operation, which can be realized by hardware, software, or a combination of hardware and software.

[40] A demodulation device and method in a transmission system according to an exemplary embodiment of the present invention will now be described with reference to drawings.

[41] A hierarchical modulation device according to an exemplary embodiment of the present invention will now be described with reference to FIG. 1.

[42] FIG. 1 is a block diagram of a hierarchical modulation device according to an exemplary embodiment of the present invention.

[43] As shown in FIG. 1, the hierarchical modulation device includes a high priority (HP) channel encoder 110, a low priority (LP) channel encoder 120, a pilot inserter 130, a hierarchical modulation signal generator 140, an inverse fast Fourier transform (IFFT) operator 150, and a transmitter 160.

[44] The high priority channel encoder 110 receives high priority (HP) data, channel encodes the high priority data, and outputs a high priority signal. In this instance, the high priority data may include a plurality of bits.

[45] The low priority channel encoder 120 receives low priority (LP) data, channel encodes the low priority data, and outputs a low priority signal. In this instance, the low priority data may include a plurality of bits.

[46] The pilot inserter 130 receives the low priority signal from the low priority channel encoder 120, inserts a pilot symbol into the low priority signal, and outputs a pilot insertion signal.

[47] The hierarchical modulation signal generator 140 receives the high priority signal and the pilot insertion signal, performs hierarchical modulation on the high priority signal and the pilot insertion signal, and outputs a hierarchical modulation signal.

[48] The IFFT operator 150 receives the hierarchical modulation signal from the hierarchical modulation signal generator 140, performs an inverse fast Fourier transform (IFFT) on the hierarchical modulation signal, and outputs an orthogonal frequency division multiplexing (OFDM) signal).

[49] The transmitter 160 receives the OFDM signal from the IFFT operator 150, and transmits the OFDM signal through a transmission channel for each transmission frame. In this instance, the size of the transmission frame is variable.

[50] A hierarchical modulation signal generator according to an exemplary embodiment of the present invention will now be described with reference to FIG. 2.

[51] FIG. 2 is a block diagram of a hierarchical modulation signal generator according to an exemplary embodiment of the present invention.

[52] As shown in FIG. 2, the hierarchical modulation signal generator 140 includes a high priority modulator 141, a low priority modulator 143, and a hierarchical modulator 145.

[53] The high priority modulator 141 receives the high priority signal from the high priority channel encoder 110, modulates the high priority signal, and outputs a high priority modulation signal.

[54] The low priority modulator 143 receives the pilot insertion signal from the pilot inserter 130, modulates the pilot insertion signal, and outputs a low priority modulation signal.

[55] The hierarchical modulator 145 receives the high priority modulation signal and the low priority modulation signal, performs hierarchical modulation on the high priority modulation signal and the low priority modulation signal, and outputs a hierarchical modulation signal.

[56] A transmission frame according to an exemplary embodiment of the present invention will now be described with reference to FIG. 3.

[57] FIG. 3 is a configuration diagram of a transmission frame according to an exemplary embodiment of the present invention.

[58] As shown in FIG. 3, the transmission frame includes a synchronization channel (SC)

Pl 10, a fast information channel (FIC) P 130, and a main service channel (MSC) P 150.

[59] The synchronization channel Pl 10 is a channel for synchronizing the transmission frame, and indicates a start position of the frame. The synchronization channel PI lO includes a null symbol Pi l l and a phase reference symbol (PRS) Pl 13. The null symbol Pi l l synchronizes the transmission frame and checks the transmitter. The phase reference symbol Pl 13 corresponds to a preamble, and is a symbol for channel state estimation, symbol synchronization, initial frequency synchronization, and differential detection.

[60] The fast information channel P 130 includes a plurality of fast information channel

(FIC) symbols P131, and provides multiplex configuration information and service information through a plurality of FIC symbols P131.

[61] The main service channel P 150 provides actually serviced data through a plurality of subchannels. The main service channel P 150 includes a plurality of main service channel (MSC) symbols P151. In this instance, the MSC symbols P151 respectively include a plurality of subchannels.

[62] A hierarchical demodulation device according to an exemplary embodiment of the present invention will now be described with reference to FIG. 4.

[63] FIG. 4 is a block diagram of a hierarchical demodulation device according to an exemplary embodiment of the present invention.

[64] As shown in FIG. 4, the hierarchical demodulation device includes a receiver 210, a fast Fourier transform (FFT) operator 220, a pilot information storage unit 230, a signal processor 240, a hierarchical separator 250, a high priority demodulator 260, a high priority channel decoder 270, a low priority demodulator 280, and a low priority channel decoder 290.

[65] In this instance, the signal processor 240 includes a phase reference symbol (PRS) extractor 241, a fast information channel (FIC) extractor 242, a main service channel (MSC) extractor 243, a phase reference symbol (PRS) channel estimator 244, a fast information channel (FIC) estimator 245, a main service channel (MSC) estimator 246, a channel equalizer 247, and a phase corrector 248.

[66] The receiver 210 receives the transmission frame through the transmission channel to receive an OFDM signal including a plurality of OFDM symbols. The receiver 210 receives a plurality of transmission frames to receive an OFDM signal. In this instance, the transmission frame includes a PRS Pl 13, an FIC P 130, and an MSC P 150. Also, the FIC P 130 may include a plurality of FIC symbols P131, and the MSC P 150 may include a plurality of MSC symbols P151.

[67] The FFT operator 220 receives the transmission frame from the receiver 210, and performs a fast Fourier transform (FFT) on the transmission frame to output a transmission frame in the frequency domain. The FFT operator 220 converts the transmission frame with respect to the frequency domain to output a frequency domain OFDM signal.

[68] The pilot information storage unit 230 stores position information of the pilot symbol. In this instance, the position information of the pilot symbol corresponds to a pilot insertion method followed by the pilot inserter 130 of the hierarchical modulation device. Also, the position information of the pilot symbol can be predefined.

[69] The PRS extractor 241 of the signal processor 240 extracts the PRS Pl 13 from the transmission frame of the frequency domain, the FIC extractor 242 extracts the FIC P 130 from the transmission frame of the frequency domain, and the MSC extractor 243 extracts the MSC P150 from the transmission frame of the frequency domain.

[70] The PRS channel estimator 244 of the signal processor 240 outputs a channel estimate of the PRS Pl 13, the FIC estimator 245 outputs a channel estimates of a plurality of FIC symbols P131 included in the FIC P 130, and the MSC estimator 246 outputs channel estimates of a plurality of MSC symbols P151 included in the MSC P 150. In this instance, the MSC estimator 246 can output channel estimates of a plurality of MSC symbols P131 based on the position of the pilot symbol.

[71] The channel equalizer 247 of the signal processor 240 channel equalizes the OFDM signal by using the channel estimate of the PRS Pl 13, channel estimates of a plurality of FIC symbols P131, and channel estimates of a plurality of MSC symbols P151, and outputs an equalized OFDM signal.

[72] The phase corrector 248 of the signal processor 240 corrects the phase value of the equalized OFDM signal to output the phase corrected OFDM signal. [73] The hierarchical separator 250 hierarchically separates the phase corrected OFDM signal to output a high priority modulation signal and a low priority modulation signal. [74] The high priority demodulator 260 receives the high priority modulation signal from the hierarchical separator 250, and demodulates the high priority modulation signal to output a high priority signal. [75] The high priority channel decoder 270 receives the high priority signal from the high priority demodulator 260, and channel decodes the high priority signal to output high priority (HP) data. [76] The low priority demodulator 280 receives the low priority modulation signal from the hierarchical separator 250, and demodulates the low priority modulation signal to output a low priority signal. [77] The low priority channel decoder 290 receives the low priority signal from the low priority demodulator 280, and channel decodes the low priority signal to output low priority (LP) data. [78] A channel equalizer according to an exemplary embodiment of the present invention will now be described with reference to FIG. 5.

[79] FIG. 5 is a block diagram of a channel equalizer according to an exemplary embodiment of the present invention. [80] As shown in FIG. 5, the channel equalizer 247 includes a moving average (MA) filter

247a, an auto regressive (AR) filter 247b, a binomial filter 247c, an auto regressive

(AR) filter 247d, an interpolator 247e, and an equalizer 247f. [81] The MA filter 247a receives a channel estimate of the OFDM symbol including no pilot symbol, performs a moving average (MA) filtering process on the input channel estimate so as to remove noise, and outputs an average filtered channel estimate. In this instance, the transfer function of the MA filter 247a follows Equation 1. [82] (Equation 1)

^[83] H(Z) = ^(I ₊ Z- + Z-² + . - . ₊ z-^N)

[84] The AR filter 247b receives the moving average filtered channel estimate from the

MA filter 247a, performs an auto regressive (AR) filtering process on the moving average filtered channel estimate so as to correct the values of both ends of the subcarrier of the channel estimate, and outputs an AR filtered channel estimate. In this instance, the AR filtered channel estimate (c(n)) can follow Equation 2.

[85] (Equation 2)

^[86^] c(«) = /fc(«±l) + (l-/?)φ)

[87] In Equation 2, c represents a moving average filtered channel estimate, e indicates a channel estimate before passing through the MA filter 247a, and n represents a subcarrier index.

[88] The binomial filter 247c receives the channel estimate of the OFDM symbol including the pilot symbol, performs a filtering process so as to remove noise from the input channel estimate, and outputs a binomial filtered channel estimate. In this instance, the binomial filter 247c has the same function as the MA filter 247a. Also, the transfer function of the binomial filter 247c can follow Equation 3.

[89] (Equation 3)

[91] The AR filter 247d receives the binomial filtered channel estimate from the binomial filter 247c, performs an auto regressive filtering process on the binomial filtered channel estimate so as to correct the values of both ends of the subcarrier of the channel estimate, and outputs the auto regressive filtered channel estimate. The AR filter 247d performs the same operation as the AR filter 247b. In this instance, the AR filtered channel estimate (c(n)) can follow Equation 4.

[92] (Equation 4)

[93] c(n) = βc{n ±\) + {\ - β)e{n)

[94] In Equation 4, c is a binomial filtered channel estimate, e is a channel estimate before passing through the binomial filter 247c, and n is a subcarrier index.

[95] The interpolator 247e receives the AR filtered channel estimate from the AR filter

247d, and interpolates the AR filtered channel estimate to estimate the interpolated channel estimate. In this instance, the interpolator 247e interpolates the AR filtered channel estimate since all subcarriers have no pilot symbol.

[96] The equalizer 247f receives the OFDM symbol, and channel equalizes the OFDM symbol according to the AR filtered channel estimate or the interpolated channel estimate to output the equalized OFDM symbol.

[97] A method for a hierarchical modulation device according to an exemplary embodiment of the present invention to hierarchically modulate high priority data and low priority data will now be described with reference to FIG. 6 and FIG. 7.

[98] FIG. 6 is a flowchart of a hierarchical modulation method according to an exemplary embodiment of the present invention.

[99] As shown in FIG. 6, the high priority channel encoder 110 channel encodes the high priority data to generate a high priority signal (Sl 10). The high priority channel encoder 110 channel encodes a plurality of bits included in the high priority data to output a high priority signal including a plurality of high priority symbols. In this instance, the high priority channel encoder 110 can channel encode the high priority data by using convolution encoding, lattice encoding, turbo encoding, low density parity check (LDPC) encoding, or concatenated encoding having concatenated at least two above-noted encodings.

[100] The high priority modulator 141 of the hierarchical modulation signal generator 140 modulates the high priority signal to generate a high priority modulation signal (S 120). The high priority modulator 141 modulates a plurality of high priority symbols to generate a high priority modulation signal including a plurality of high priority modulation symbols. In this instance, the high priority modulator 141 can modulate the high priority signal according to the π/4-differential quadrature phase-shift keying (π/4-DQPSK) scheme.

[101] The low priority channel encoder 120 channel encodes the low priority data to generate a low priority signal (S 130). The low priority channel encoder 120 channel encodes a plurality of bits included in the low priority data to output a low priority signal including a plurality of low priority symbols. In this instance, the high priority channel encoder 110 can channel encode the high priority data by using convolution encoding, lattice encoding, turbo encoding, low density parity check (LDPC) encoding, or concatenated encoding having concatenated at least two above-noted encodings.

[102] The pilot inserter 130 inserts a pilot symbol into the low priority signal to generate a pilot insertion signal (S 140). The pilot inserter 130 inserts a plurality of pilot symbols into a plurality of low priority symbols to generate a pilot insertion signal including a plurality of low priority symbols and a plurality of pilot symbols. In this instance, the pilot inserter 130 can insert a plurality of pilot symbols between a plurality of low priority symbols according to a predetermined pilot insertion method.

[103] The low priority modulator 143 of the hierarchical modulation signal generator 140 modulates the pilot insertion signal to generate a low priority modulation signal (S 150). The low priority modulator 143 modulates a plurality of low priority symbols and a plurality of pilot symbols to generate a low priority modulation signal including a plurality of low priority modulation symbols. In this instance, the low priority modulator 143 can modulate the pilot insertion symbol sequence according to the π/ 4-DQPSK method. Also, the low priority modulator 143 can modulate the pilot insertion symbol sequence by using various modulation methods including amplitude shift keying (ASK) and quadrature amplitude modulation (QAM) according to propagation environments or data rates.

[104] The hierarchical modulator 145 of the hierarchical modulation signal generator 140 hierarchically modulates the high priority modulation signal and the low priority modulation signal to generate a hierarchical modulation signal (S 160). The hierarchical modulator 145 hierarchical modulates a plurality of high priority modulation symbols and a plurality of low priority modulation symbols to generate a hierarchical modulation signal including a plurality of hierarchical modulation symbols. [105] A method for a hierarchical modulator of a hierarchical modulation signal generator of according to an exemplary embodiment of the present invention to generate a hierarchical modulation signal will now be described with reference to FIG. 7.

[106] FIG. 7 shows a method for a hierarchical modulator of a hierarchical modulation signal generator to generate a hierarchical modulation signal according to an exemplary embodiment of the present invention. FIG. 7 (a) is a constellation of a high priority modulation signal, FIG. 7 (b) is a constellation of a low priority modulation signal, and FIG. 7 (c) is a constellation of a hierarchical modulation signal.

[107] As shown in FIG. 7, when the symbol shown by an arrow in FIG. 7 (a) and the symbol shown by an arrow in FIG. 7 (b) are hierarchically modulated, they are shown as the symbol illustrated as arrows in FIG. 7 (c). In this instance, the constellation diagram of the hierarchical modulation signal has 4 constellations in a quadrant as shown in FIG. 7 (c), and has 16 constellations in the 4 entire quadrants.

[108] A method for a hierarchical modulation device according to an exemplary embodiment of the present invention to hierarchical modulate the high priority data and the low priority data will now be described with reference to FIG. 6.

[109] The IFFT operator 150 performs an inverse fast Fourier transform (IFFT) on the hierarchical modulation signal to generate an OFDM signal (S 170). The IFFT operator 150 performs an inverse fast Fourier transform (IFFT) on a plurality of hierarchical modulation symbols to generate an OFDM signal including a plurality of OFDM symbols.

[110] The transmitter 160 transmits the OFDM signal as a transmission frame format through a transmission channel (S 180). In this instance, the transmitter 160 can transmit the OFDM signal through a plurality of transmission frames.

[I l l] A method for a hierarchical demodulation device according to an exemplary embodiment of the present invention to hierarchically demodulate a received signal and generate high priority data and low priority data will now be described with reference to FIG. 8.

[112] FIG. 8 shows a flowchart of a hierarchical demodulation method according to an exemplary embodiment of the present invention.

[113] As shown in FIG. 8, the receiver 210 receives an OFDM signal including a plurality of OFDM symbols in the transmission frame format (S301). In this instance, the transmission frame corresponds to the signal in the time domain, and can include a PRS Pl 13, a plurality of FIC symbols P131, and a plurality of MSC symbols P151. Also, the transmission frame can include 76 OFDM symbols, the first OFDM symbol of the transmission frame corresponds to the PRS Pl 13, the 2^nd to 4^th OFDM symbols correspond to a plurality of FIC symbols P131, and the 5^th to 76^th OFDM symbols correspond to a plurality of MSC symbols P151. [114] The FFT operator 220 performs a fast Fourier transform (FFT) on a plurality of

OFDM symbols to generate a plurality of OFDM symbols in the frequency domain

(S303). [115] The PRS extractor 241 extracts the PRS P 113 from a plurality of OFDM symbols

(S305). In this instance, the PRS Pl 13 can correspond to the first OFDM symbol of the transmission frame. [116] The PRS channel estimator 244 channel estimates the PRS Pl 13 to generate a channel estimate of the PRS Pl 13 (S307). In this instance, the channel estimate of the

PRS Pl 13 can follow Equation 5. [117] (Equation 5)

[ L118] J _C C₁ -- J U_j1JCl* _pRS

[119] In Equation 5, Ci is a vector for indicating a channel estimate of the first OFDM symbol, bi is a vector for representing the PRS Pl 13, and d_PRS is a vector for indicating

[120] the PRS known in advance by the hierarchical demodulation device. In this instance, w is a conjugate complex for a complex product.

[121] The FIC extractor 242 extracts a plurality of FIC symbols P 131 from a plurality of OFDM symbols (S309). In this instance, a plurality of FIC symbols P131 can correspond to the 2^nd to 4^th OFDM symbols of the transmission frame.

[122] The FIC estimator 245 channel estimates a plurality of FIC symbols P131 based on the channel estimate of the PRS Pl 13 to generate channel estimates of a plurality of FIC symbols P131 that correspond to a plurality of FIC symbols P131 (S311). In this instance, the channel estimates of a plurality of FIC symbols P131 are expressed in Equation 6.

[123] (Equation 6)

L J In Equation 6, ^ck is a vector for indicating a channel estimate of the k-th OFDM symbol, k is a vector for indicating the received k-th OFDM symbol, and *^■ is a vector that is generated by equalizing the received k-th OFDM symbol by using the (k-1) th channel estimate ^ck-\ . in this instance, k ranges from 2 to 4. Also, k can range from 2 to 76.

[ 126] The MSC extractor 243 extracts a plurality of MSC symbols P 151 from a plurality of OFDM symbols (S313). In this instance, a plurality of MSC symbols P151 can correspond to the 5^th to 76^th OFDM symbols of the transmission frame.

[127] The MSC estimator 246 channel estimates a plurality of MSC symbols P151 based on pilot position information and channel estimates of a plurality of FIC symbols P131 to generate channel estimates of a plurality of MSC symbols Pl 51 corresponding to a plurality of MSC symbols P151 (S315). In this instance, the channel estimates of a plurality of MSC symbols P151 are expressed in Equation 7. [128] (Equation 7)

^Ck ^~ ^k^ pilot, k

In Equation 7, ^ck is a vector for indicating a channel estimate of the k-th OFDM symbol, b_k js a vector for indicating the received k-th OFDM symbol, and d ≠_o\,*. is a vector that is generated by equalizing the received k-th OFDM symbol by using the channel estimate fc-i using the (k-1)th pilot. In this instance, k ranges from 5 to 76

[131] The channel equalizer 247 channel equalizes the OFDM signal including a plurality of OFDM symbols based on the channel estimate of the PRS Pi l l, channel estimates of a plurality of FIC symbols P131, and channel estimates of a plurality of MSC symbols P151 to generate a channel equalized OFDM signal including a plurality of channel equalized OFDM symbols (S317). In this instance, a plurality of channel equalized OFDM symbols are expressed in Equation 8.

[132] (Equation 8)

[133] _ h_k a_k = ck

[134] In Equation 8, a_k represents the k-th channel equalized OFDM symbol, b_k indicates the received k-th OFDM symbol, and c_k indicates a channel estimate of the k-th OFDM symbol.

[135] The phase corrector 248 corrects the phase values of a plurality of channel equalized OFDM symbols included in the channel equalized OFDM signal to generate a phase corrected OFDM signal including a plurality of phase corrected OFDM symbols (S319). In this instance, a plurality of phase corrected OFDM symbols are expressed in Equation 9.

[136] (Equation 9)

In Equation 9, ^ak is the k-th phase corrected OFDM symbol, ^Qk is the k-th channel equalized OFDM symbol, and ^uk is a phase value for correcting the k-th channel equalized OFDM symbol. Also, ^uk is expressed in Equation 10.

[139] (Equation 10)

[140] u_k = sign{E{b_kd_p ^* _{ilot k} }\ £ = 5 ~ 76 where, sign(x) = x /|x|

[141] in Equation 10, £(^•) represent an average.

[142] The hierarchical separator 250 hierarchically separates the phase corrected OFDM signal to generate a high priority modulation signal and a low priority modulation signal (S321). [143] The high priority demodulator 260 demodulates the high priority modulation signal to generate a high priority signal (S323). [144] The high priority channel decoder 270 channel decodes the high priority signal to generate high priority (HP) data (S325). [145] The low priority demodulator 280 demodulates the low priority modulation signal to generate a low priority signal (S327). [146] The low priority channel decoder 290 channel decodes the low priority signal to generate low priority (LP) data (S329). [147] Channel estimation performance for the respective symbols in the frequency domain in a transmission frame according to an exemplary embodiment of the present invention will now be described with reference to FIG. 9, FIG. 10, and FIG. 11. [148] FIG. 9 is a drawing showing a channel estimate using PRS according to an exemplary embodiment of the present invention. In this instance, FIG. 9 shows the

PRS using channel estimate before and after passing through the MA filter. [149] As shown in FIG. 9, the change of channel estimate between the adjacent subcarriers is very great because of noise before the channel estimate of the PRS Pi l l is passed through the MA filter 247a, and the noise is removed after the channel estimate is passed through the MA filter 247a. [150] A change of channel estimate according to the change of symbol after a binomial filter is applied in the FIC and the MSC according to an exemplary embodiment of the present invention will now be described with reference to FIG. 10 and FIG. 11. [151] FIG. 10 is a drawing showing a change of a channel estimate of an FIC symbol according to an exemplary embodiment of the present invention. In this instance, FIG.

10 shows a change of channel estimate according to a change of each symbol when the channel estimate of the FIC symbol is applied to a binomial filter.

[152] FIG. 11 is a drawing showing a change of a channel estimate of an MSC symbol according to an exemplary embodiment of the present invention. In this instance, FIG.

11 shows a change of channel estimate according to a change of each symbol when the channel estimate of the MSC symbol is applied to the binomial filter. [153] The channel estimate is well followed in the time varying channel when computer simulation is performed by using the above-described method according to the exemplary embodiment of the present invention.

[154] The above-described embodiments can be realized through a program for realizing functions corresponding to the configuration of the embodiments or a recording medium for recording the program in addition to through the above-described device and/or method, which is easily realized by a person skilled in the art.

[155] While this invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

[1] A hierarchical demodulation method comprising: receiving a signal including a reference symbol, a plurality of information symbols, and a plurality of service symbols; generating a channel estimate of a reference symbol by channel estimating the reference symbol based on a given symbol corresponding to the reference symbol; generating channel estimates of a plurality of information symbols by channel estimating the plurality of information symbols based on the channel estimate of the reference symbol; generating channel estimates of a plurality of service symbols by channel estimating the plurality of service symbols based on the channel estimates of the plurality of information symbols; generating a channel equalized signal by channel equalizing the signal based on the channel estimate of the reference symbol, the channel estimates of the plurality of information symbols, and the channel estimates of the plurality of service symbols; and generating a first hierarchical modulation signal and a second hierarchical modulation signal by hierarchically separating the channel equalized signal.

[2] The hierarchical demodulation method of claim 1, wherein the first hierarchical modulation signal is a high priority modulation signal, and the second hierarchical modulation signal is a low priority modulation signal.

[3] The hierarchical demodulation method of claim 2, wherein the plurality of service symbols respectively include a pilot symbol, and the step of generating channel estimates of a plurality of service symbols includes generating channel estimates of the plurality of service symbols by channel estimating the plurality of service symbols based on position information of a given pilot symbol.

[4] The hierarchical demodulation method of claim 3, wherein the step of hierarchically separating includes: phase correcting the channel equalized signal to generate the phase corrected signal; and hierarchically separating the phase corrected signal to generate the high priority modulation signal and the low priority modulation signal.

[5] The hierarchical demodulation method of claim 2, further including: demodulating the high priority modulation signal to generate a high priority signal; channel decoding the high priority signal to generate high priority data; demodulating the low priority modulation signal to generate a low priority signal; and channel decoding the low priority signal to generate low priority data.

[6] A hierarchical demodulation method comprising: receiving a signal including a plurality of symbols; channel estimating a reference symbol for providing a reference from among the plurality of symbols to generate a channel estimate of the reference symbol; channel estimating the plurality of symbols based on a channel estimate of the reference symbol to generate a plurality of channel estimates respectively corresponding to the plurality of symbols; and channel equalizing the signal according to the plurality of channel estimates to generate the equalized channel equalized signal.

[7] The hierarchical demodulation method of claim 6, wherein the plurality of symbols respectively have an index for indicating an order, and the reference symbol is the first symbol from among the plurality of symbols.

[8] The hierarchical demodulation method of claim 7, wherein the step of generating the plurality of channel estimates includes generating a channel estimate of a k"¹ symbol based on the channel estimate of a

(k-l)"¹ symbol.

[9] The hierarchical demodulation method of claim 6, further including: phase correcting the channel equalized signal to generate the phase corrected signal; and hierarchically separating the phase corrected signal to generate a high priority modulation signal and a low priority modulation signal.

[10] A hierarchical demodulation device comprising: a receiver for receiving a transmission frame type signal including a phase reference symbol, a fast information channel, and a main service channel; a pilot information storage unit for storing position information of a pilot symbol included in the main service channel; a first channel estimator for outputting a first channel estimate by channel estimating the phase reference symbol; a second channel estimator for outputting a second channel estimate by channel estimating the fast information channel according to a channel estimate of the phase reference symbol; a third channel estimator for outputting a third channel estimate by channel estimating the main service channel according to the channel estimate of the fast information channel based on position information of the pilot symbol; and a channel equalizer for outputting a channel equalized signal by channel equalizing the signal according to the first channel estimate, the second channel estimate, and the third channel estimate. [11] The hierarchical demodulation device of claim 10, wherein the channel equalizer includes: a noise removing filter for removing noise from the channel estimate; an auto regressive filter for auto regressive filtering the channel estimate having passed through the noise removing filter; and an interpolator for interpolating the channel estimate having passed through the auto regressive filter. [12] The hierarchical demodulation device of claim 10, further comprising: a phase corrector for outputting a phase corrected signal by phase correcting the channel equalized signal; a hierarchical separator for outputting a high priority modulation signal and a low priority modulation signal by hierarchically separating the phase corrected signal; a high priority demodulator for outputting a high priority signal by demodulating the high priority modulation signal; and a low priority demodulator for outputting a low priority signal by demodulating the low priority modulation signal.