EP2147401B1 - Dual interface inlays - Google Patents
Dual interface inlays Download PDFInfo
- Publication number
- EP2147401B1 EP2147401B1 EP08759585A EP08759585A EP2147401B1 EP 2147401 B1 EP2147401 B1 EP 2147401B1 EP 08759585 A EP08759585 A EP 08759585A EP 08759585 A EP08759585 A EP 08759585A EP 2147401 B1 EP2147401 B1 EP 2147401B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- wire
- chip
- inlay
- sheet
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Not-in-force
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07766—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement
- G06K19/07769—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement the further communication means being a galvanic interface, e.g. hybrid or mixed smart cards having a contact and a non-contact interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49016—Antenna or wave energy "plumbing" making
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
Definitions
- the invention relates primarily to techniques for fabricating dual interface cards comprising an antenna embedded in one substrate, and laminated with upper and lower substrates whereby a chip module is connected to the antenna prior or after final lamination.
- a conventional method to produce an inlay site containing a high frequency RFID chip and an antenna embedded into a multi-layer substrate and connected to the terminals (terminal areas) of the RFID chip is to first position the RFID chip in a recess, supported by a lower substrate layer, then start embedding (countersinking) a wire conductor onto or into the top substrate layer in the direction of the RFID chip, then guiding the wire conductor over a first terminal area of the RFID chip, then continue the embedding process by forming an antenna in the top substrate layer with a given number of turns, then guiding the wire conductor over the second terminal area, and finally embedding the wire conductor again into the top substrate layer before cutting the wire to complete the high frequency transponder site.
- the wire ends passing over the terminal areas are interconnected by means of thermal compression bonding.
- Adhesively placing a wire conductor onto the top substrate layer is an alternative to embedding, and typically involves self-bonding coated wire conductor.
- a wire embedding apparatus may be an ultrasonic wire guide tool, known as a "sonotrode", with a wire feed channel (capillary) passing through the centre of the wire guide tool.
- the wire conductor is fed through the wire guide tool, emerges from the tip, and by application of pressure and ultrasonic energy the wire conductor is "rubbed” into the substrate, resulting in localized heating of the wire conductor and subsequent sinking of the wire conductor into the substrate material during the movement of the wire guide tool.
- a wire placement apparatus may also be an ultrasonic tool similar in function to an ultrasonic horn which heats the wire to form an adhesion with a substrate.
- FIGs. 1 and 2 of the 089 patent show a wire conductor 20 being embedded in a surface of a substrate 21, by the action of ultrasound.
- FIG. 3 of the 089 patent shows a wiring device 22 with an ultrasonic generator 34, suitable for embedding the wire. It is believed that the wiring device in the 089 patent can also be used for adhesively placing a wire.
- FIGs. 1A and 1B illustrate an inlay substrate (or sheet) 100 having a plurality of transponder areas. A selected one of the transponder areas 102 constituting a single transponder is shown in detail.
- the vertical and horizontal dashed lines (in FIG. 1A ) are intended to indicate that there may be additional transponder areas (and corresponding additional transponders) disposed to the left and right of, as well as above and below, the transponder area 102, on the inlay sheet 100.
- Such a plurality of transponders may be arranged in an array on the (larger) inlay sheet.
- the inlay sheet 100 may be a multi-layer substrate 104 comprising one or more upper (top) layers 104a and one or more lower (bottom) layers 104b.
- a recess 106 may be formed in (through) the upper layer 104a, at a "transponder chip site", so that a transponder chip 108 may be disposed in the recess, and supported by the lower layer 104b.
- the transponder chip 108 is shown having two terminals 108a and 108b on a top surface thereof.
- the transponder chip 108 may be a chip module, or an RFID chip.
- the recess 106 is sized and shaped to accurately position the transponder chip 108, having side dimensions only slightly larger than the transponder chip 108 to allow the transponder chip 108 to be located within the recess.
- One millimeter (mm) equals one thousand (1000) micrometers ( ⁇ m, "micron”).
- the recess 106 may be illustrated with an exaggerated gap between its inside edges and the outside edges of the chip 108, for illustrative clarity. In reality, the gap may be only approximately 50 ⁇ m - 100 ⁇ m (0.05mm - 0.1 mm).
- terminals 108a and 108b are shown reduced in size (narrower in width), for illustrative clarity. (From the dimensions given above, it is apparent that the terminals 108a and 108b can extend substantially the full width of the transponder chip 108.)
- the transponder chip 108 is generally snugly received within the recess 106, with dimensions suitable that the chip 108 does not move around after being located within the recess 106, in anticipation of the wire ends 110a, 110b being bonded to the terminals 108a, 108b. As noted from the exemplary dimensions set forth above, only very minor movement of the chip 108, such as a small fraction of a millimeter (such as 50 ⁇ m - 100 ⁇ m) can be tolerated.
- an antenna wire 110 is disposed on a top surface (side) of the substrate, and may be formed into a flat (generally planar) coil, having two end portions 110a and 110b.
- the antenna wire is "mounted" to the substrate, which includes “embedding” (countersinking) the antenna wire into the surface of the substrate, or “adhesively placing” (adhesively sticking) the antenna wire on the surface of the substrate.
- the wire typically feeds out of a capillary 116 of an ultrasonic wire guide tool (not shown).
- the capillary 116 is typically disposed perpendicular to the surface of the substrate 100.
- the capillary 116 is omitted from the view in FIG. 1A , for illustrative clarity.
- the antenna wire 110 may be considered “heavy” wire (such as 80 ⁇ m - 112 ⁇ m), which requires higher bonding loads than those used for "fine” wire (such as 30 ⁇ m). Rectangular section copper ribbon (such as 60 x 30 ⁇ m) can be used in place of round wire.
- the capillary 116 may be vibrated by an ultrasonic vibration mechanism (not shown), so that it vibrates in the vertical or longitudinal (z) direction, such as for embedding the wire in the surface of the substrate, or in a horizontal or transverse (y) direction, such as for adhesively placing the wire on the surface of the substrate.
- the wire 110 is shown slightly spaced (in drawing terminology, "exploded" away) from the substrate, rather than having been embedded (countersunk) in or adhesively placed (stuck to) on the surface of the substrate.
- the antenna wire 110 may be mounted in the form of a flat coil, having two ends portions 110a and 110b.
- the ends portions 110a and 110b of the antenna coil wire 110 are shown extending over ( FIG. 1A ) and may subsequently be connected, such as by thermal-compression bonding (not shown), to the terminals 108a and 108b of the transponder chip 108, respectively.
- Examples of embedding a wire in a substrate, in the form of a flat coil, and a tool for performing the embedding (and a discussion of bonding), may be found in the aforementioned US Patent No. 6,698,089 (refer, for example, to FIGs. 1 , 2 , 4 , 5 , 12 and 13 of the patent). It is known that a coated, self-bonding wire will stick to a synthetic (e.g., plastic) substrate because when vibrated sufficiently to soften (make sticky) the coating and the substrate.
- a synthetic e.g., plastic
- the wire 110 is shown slightly spaced (in drawing terminology, "exploded" away) from the terminals 108a/b of the transponder chip 108, rather than having been bonded thereto, for illustrative clarity. In practice, this is generally the situation - namely, the end portions of the wires span (or bridge), the recess slightly above the terminals to which they will be bonded, in a subsequent step. Also illustrated in FIG. 1B is a "generic" bond head, poised to move down (see arrow) onto the wire 110b to bond it to the terminal 108b. The bond head 118 is omitted from the view in FIG. 1A , for illustrative clarity.
- the interconnection process can be inner lead bonding (diamond tool), thermal compression bonding (thermode), ultrasonic bonding, laser bonding, soldering, ColdHeat soldering (Athalite) or conductive gluing.
- the wire 110 in case the antenna wire 110 needs to cross over itself, such as is illustrated in the dashed-line circled area "c" of the antenna coil, it is evident that the wire should typically be an insulated wire, generally comprising a metallic core and an insulation (typically a polymer) coating. Generally, it is the polymer coating that facilitates the wire to be "adhesively placed” on (stuck to) a plastic substrate layer. (It is not always the case that the wire needs to cross over itself. See, for example, FIG. 4 of US Patent No. 6,698,089 ).
- a wire tension/push mechanism (not shown) can be used or by application of compressed air it is possible to regulate the forward and backward movement of the wire conductor by switching the air flow on and off which produces a condition similar to the Venturi effect.
- the wire conductor can be self-bonding copper wire or partially coated self bonding copper wire, enamel copper wire or partially coated enamel wire, silver coated copper wire, un-insulated wire, aluminum wire, doped copper wire or litz wire.
- FIG. 1A herein resembles FIG. 5 of US Patent No. 6,698,089 (the '089 patent), which has a similar coil antenna (50) with an initial coil region (51) and a final coil region (52) comparable to the antenna 110 with two end portions 110a and 110b described herein.
- the coil (50) is arranged on a substrate 55 which comprises a substrate recess (56, compare 106 herein) in the interior region (53) of the coil (50).
- FIG. 5 of the '089 patent it can be seen that the initial and final coil regions (end portions) of the wires extend across the recess.
- FIG. 6 of the '089 patent it can be seen that the recess extends completely through the substrate. If the antenna is mounted to the substrate prior to the chip being installed in the recess (and the antenna is mounted to the front/top surface/side of the substrate, as shown), due to the fact that the antenna wires are "blocking" entry to the recess from the top/front surface of the substrate, the chip must be installed into the recess from the back (bottom) side of the substrate, as indicated by FIG. 6 of the '089 patent.
- FIG. 7 of the '089 patent shows the subsequent (inter)connection of the terminal areas 59 of the chip unit 58 to the initial coil region 51 and to the final coil region 52 by means of a thermode 60 which under the influence of pressure and temperature creates a connection by material closure between the wire conductor 20 and the terminal areas 59, as an overall result of which a card module 64 is formed.
- the conventional method to produce a dual interface card or combi-card is to embed an antenna into a substrate, form squiggles at the position under the chip module and to laminate the layers to create a pre-laminated inlay.
- US patent application 20020020903 from Hans-Diedrich Kreft (assigned to Angewandte Digital Elektronik - ADE) describes a microchip card capable of operation both as a contactless card and as a contact card.
- Patents from ADE include US 5,773,812 and US 6,008,993 .
- the US patents 6,190,942 & 6,095,423 from Robert Wilm (assigned to PAV Card) describe a method of producing said card.
- the first method involves embedding an antenna into a non-conductive sheet (at each site in an array) whereby the connection to the respective chip module is prepared by embedding squiggles or meanders at the position where a contact chip module will reside.
- the non-conductive sheet with the antennae is hot or cold laminated to an upper layer to form a pre-laminated dual interface inlay for further processing by a smart card manufacturer.
- the pre-laminated inlay is laminated to an upper and lower printed sheet (including an anti-scratch overlay), and then each site in the array is punched to release a single card body.
- a cavity or recess to accommodate the contact chip module is milled out of the card body to a depth where the wire ends of the antenna (as squiggles) are positioned.
- the contact chip module is then bonded to the antenna using conductive glue.
- the contact chip module has contact pads on the face up side (ISO 7816 smart card) as well as on the face down side for interconnection to the antenna (Contactless e.g. ISO/IEC 14443).
- the critical manufacturing process is the interconnection of the wire ends of the antenna to the chip module. Apart from yield loss during production, the life time of the finished product is difficult to guarantee with certainty, as torsion and bending of the card body at the position of the chip module results in operational failure.
- An alternative conventional approach to the above method is to embed an antenna into a non-conductive sheet and to pass the wire ends of the antenna over an opening at each site in the array which can later accommodate the interconnection pads and mould mass of a contact chip module.
- a contact chip module is placed onto the surface of the non-conductive sheet with the interconnection pads for connection to the antenna facing down into the opening. Then the wire ends of each antenna are connected by means of thermal compression bonding or soldering to the face down interconnection pads on the chip module.
- the sheet with the array of contact chip modules connected to the underlying antennae is hot or cold laminated with a second sheet (or several sheets) to form a dual interface inlay.
- a removable sheet approximately 240 micron, e.g. Teflon
- Teflon e.g. Teflon
- the removable sheet is flush with all the chip modules, having an even surface for lamination.
- an additional sheet such as Pacothane is used to further protect the contact chip modules. After lamination, the removable sheet and the Pacothane is detached from the inlay, leaving the PCB part of the contact chip modules protruding over the surface of the inlay.
- the overlay sheet and the printed sheet are laminated together and openings are punched into the laminate to accommodate the chip modules on the dual interface inlay.
- the dual interface inlay is sandwiched between the upper and lower printed sheet laminates, and then laminated together.
- German printed patent document DE 39 35 364 discloses a chip card that has an electronic chip with a memory, contacts and contactless transmission means such as coils and/or condensers which are embedded in the card material and which, for purposes of supplying energy to the chip, exchange energy and bi-directional data with a terminal via the contacts or else contact-free.
- the chip of the chip card has an electronic circuit which generates a logical signal that, depending on the occurrence of voltage at the contacts or at a coil, is logically "high” or logically "low”.
- the chip card is autonomously capable of deciding whether it is being addressed via the contact-coupled segment or via the contactless segment and consequently, it functions accordingly.
- This chip card which is also called Dual Interface Card or CombiCard, is likewise described in the literature reference Helmut Lemme, Der Mikrorechner in der Brieftasche [The microcomputer in your wallet], Elektronik 26/1993, pp. 70-80 .
- This chip card offers considerably greater reliability than the simple contactless cards.
- German printed patent document DE 44 43 980 also describes connecting the coils and the chip in a special manner.
- a conventional method to produce an inlay is to embed insulated wire into a synthetic material or a coated substrate, form an antenna coil with a number of turns and interconnect the wire ends of the antenna to a transponder chip (or chip module).
- the interconnection of the antenna wire to the chip module is non-trivial, and it can be beneficial that the chip module can be installed on a substrate which has already been prepared with an antenna coil.
- the conventional method to produce an inlay site containing a high frequency RFID chip and an antenna embedded into a multi-layer substrate and connected to the terminal areas of the RFID chip is to embed a wire conductor into the top substrate layer in the direction of the RFID chip residing in a recess and supported by a lower substrate layer, then to guide the wire conductor over the first terminal area of the RFID chip, continue the embedding process by countersinking the wire conductor into the top substrate layer to form an antenna with a given number of turns and then guiding the wire conductor over the second terminal area and finally embedding the wire conductor again into the top substrate layer before cutting the wire to complete the high frequency transponder site.
- the wire ends passing over the terminal areas are interconnected by means of thermal compression bonding.
- US Patent 6,698,089 discloses device for bonding a wire conductor.
- FIGs. 1 and 2 of the '089 patent show a wire conductor 20 being embedded in a surface of a substrate 21, by the action of ultrasound.
- FIG. 3 of the 089 patent shows a wiring device 22 with an ultrasonic generator 34, suitable for embedding the wire. It is believed that the wiring device in the 089 patent can also be used for adhesively placing a wire.
- FIG. 4 of the '089 patent shows a wire conductor 20 on a substrate 42.
- the substrate 42 has a recess 45.
- the wire is ultrasonically embedded in the substrate.
- the wire is not embedded in the recess.
- FIG. 5 of the 089 patent also shows a coil 50 on a substrate 55 having a recess 56.
- the coil 50 has an initial coil region 51 and a final coil region 52. As shown in FIG.
- a chip unit 58 may be placed in the substrate recess 56, from a side of the substrate opposite from the coil 50, and FIG. 7 shows subsequent connection of terminal areas of the chip unit to the initial coil region 51 and to the final coil region 52 by means of a thermode 60.
- FIGs. 13, 14 and 15 of the '089 patent show a wire 113 on a substrate 111 having a recess 114 to accept a chip 115.
- the wire has ends 116 and 117.
- the chip has terminals 118 and 119.
- the wire is embedded using an ultrasonic instrument 125.
- the wire is guided away via the chip 115 that is received in the recess 114. (column 13, lines 65-66) It is discussed that a single ultrasonic instrument can be used both for fixation of the wire and for connection of the wire to the terminals of the chip. (column 15, lines 33-36)
- FIGS. 14 and 15 of the 089 patent also offers the possibility, by appropriate choice of the points of fixation of the wire conductor on the substrate, of guiding the wire conductor away diagonally via the terminal areas, in order to increase the overlap between the wire conductor and the terminal areas.
- several chips or other elements arranged in series on, or in, a substrate can be connected by means of the wire conductor in the manner represented in FIG. 14. (column 14, lines 39-47).
- FIGs. 16 and 17 of the 089 patent Of particular interest to the present invention are FIGs. 16 and 17 of the 089 patent.
- FIGs. 16 and 17 of the 089 patent show that a chip 132 is introduced into the recess 114 after fixation of the wire conductor 113 on the surface of the substrate. Ends of the wire pass over the recess, generally in alignment with positions corresponding to terminals on the chip.
- a connecting instrument enables a connection of the wire conductor to the corresponding terminal area.
- the chip 132 is equipped on its contact side with a bridge-tape alignment aids 135, arranged adjacent to a terminal area, which provide for correct relative positioning via guide bevels 136.
- Laser soldering is a technique where a -30-50 W laser is used to melt and solder an electrical connection joint.
- Diode laser systems based on semiconductor junctions are used for this purpose. Wavelengths are typically 808nm through 980nm.
- the beam is delivered via an optical fiber to the workpiece, with fiber diameters 800um and smaller. Since the beam out of the end of the fiber diverges rapidly, lenses are used to create a suitable spot size on the workpiece at a suitable working distance.
- a wire feeder is used to supply solder. Both lead-tin and silver-tin material can be soldered. Process recipes will differ depending on the alloy composition. For soldering 44-pin chip carriers to a board using soldering preforms, power levels were on the order of 10 Watts and solder times approximately 1 second.
- European Patent EP0947281 discloses device and method for thermo-compression bonding.
- the arrangement has a wedge (10) which can be applied to a bonding point (14) and an associated optical conductor (19).
- the conductor is coupled to a laser light (23) source and directed towards a section of bonding wire (13) beneath the wedge between it and the bonding position.
- the conductor is fed through the wedge to near the bonded wire section so that only this section is heated for thermo-compression bonding when laser energy is coupled in.
- European Patent EP0999729 process for laser soldering and for temperature monitoring of semi-conductor chips, and chip cards manufactured according to this process.
- a laser beam (32) heats solder (12) applied to a solder point to melting point, and interrupts the beam.
- the laser beam is applied to the reverse side of a packageless semiconductor chip (10) opposite the side with the solder point. Solder of at least two solder points may be heated simultaneously, or all solder points may be heated at the same time.
- the laser may be applied for 0.1 to 0.5 seconds, with a focus diameter of 0.1 to 2.0 mm at a power of up to about 10 W.
- An Independent claim for a method of ending a soldering process during laser soldering of a semiconductor chip is also included EP-A-1498943 is adenowledged in the preamble of claim 1.
- a dual interface inlay comprises: a bottom sheet (202); a transponder site (206) on a top surface of the bottom sheet; an antenna wire (210) mounted to the top surface of the bottom sheet; end portions (210a/b) of the antenna wire (210) are formed with squiggles or meanders forming contact areas on opposite sides of the transponder site to provide areas of increased surface area for subsequent attachment of a chip or chip module (240) to the antenna wire; conductive material (212) applied to the end portions of the antenna wire; a top sheet (222) disposed over the bottom sheet 202 for lamination thereto; and recesses (224a/b) formed in a bottom surface of the top sheet, at positions corresponding to the contact area.
- a cavity (230) extending through the top sheet (222) allows a chip module (240) to be mounted through the top sheet (222) onto the surface of the bottom sheet, and exposes the contact areas (210a/b).
- the antenna wire may be embedded or adhesively placed on the surface of the substrate.
- the antenna wire may be insulated wire, and insulation may be removed from the end portions of the antenna wire.
- the conductive material on the end portions of the antenna wire may comprise solder balls or flexible solder paste, or conductive glue. Silicon cushions (226a/b) may be disposed in the bottom sheet under the contact areas. A corresponding method is disclosed.
- FIGs drawings
- the figures are intended to be illustrative, not limiting. Although the invention is generally described in the context of these embodiments, it should be understood that it is not intended to limit the invention to these particular embodiments.
- shading or cross-hatching it is intended to be of use in distinguishing one element from another (such as a cross-hatched element from a neighboring un-shaded element). It should be understood that it is not intended to limit the disclosure due to shading or cross-hatching in the drawing figures.
- Elements of the figures may (or may not) be numbered as follows. The most significant digits (hundreds) of the reference number correspond to the figure number. For example, elements of Figure 1 are typically numbered in the range of 100-199, and elements of FIG. 2 are typically numbered in the range of 200-299. Similar elements throughout the figures may be referred to by similar reference numerals. For example, the element 199 in FIG. 1 may be similar (and possibly identical) to the element 299 in FIG. 2 . Throughout the figures, each of a plurality of elements 199 may be referred to individually as 199a, 199b, 199c, etc. Such relationships, if any, between similar elements in the same or different figures will become apparent throughout the specification, including, if applicable, in the claims and abstract.
- An embodiment is an example or implementation of one or more aspects of the invention(s). Although various features of the invention may be described in the context of a single embodiment, the features may also be provided separately or in any suitable combination with one another.
- an “inlay” is a generally planar substrate (or sheet), which may include several (a plurality of) distinct “transponder areas", arranged for example in a 3x6 array on the inlay sheet.
- the inlay sheet may have one or more (multiple) layers.
- a “transponder” may be fabricated in each "transponder area”.
- Each “transponder” may include an antenna which is mounted to a surface (such as a top layer) of the substrate, and a “transponder chip” which is installed at a “transponder chip site” (or “site for the transponder chip") on the substrate.
- the antenna is typically in the form of a flat coil having two ends which are connected to bond pads (terminals) on the "transponder chip”.
- the "transponder chip” may be an individual integrated circuit (IC) chip (such as a naked die or a bumped die), or a chip module (such as a flip chip, interposer, leadframe package) such as a chip mounted to a small substrate or a carrier.
- the "transponder chip site" of the “transponder” (“transponder area” of the “inlay sheet”) may comprise a recess (or window, or opening) extending through the top and one or more underlying layers of the substrate, such that the "transponder chip” can be installed in the recess, submerged below the surface of the "inlay sheet” and supported by an underlying layer of the substrate.
- a window may extend completely through the inlay sheet so that a transponder chip or chip module may be installed from an opposite (from the antenna) side of the inlay sheet.
- an inlay When the term “inlay” is used herein, it may be taken to include any generally planar substrate, typically credit-card sized, made of a synthetic material or a coated non-synthetic material, such as paper.
- An inlay has an array of transponder sites, the format can be 3 x 6 for a card manufacturer.
- An inlay will typically comprise a (planar) substrate, a transponder (or RFID) chip, and an antenna (typically a flat coil of wire, having two ends).
- substrate when used herein, it should be taken to include non-conductive material, synthetic material, paper but also material coated with ferrite to create a Faraday cage or material used on stealth aircraft (to absorb or reflect electromagnetic waves).
- the substrate may be a multi-layer substrate (such as shown in FIG. 1B ).
- a suitable material for any of the substrates discussed herein is TESLIN, TYVEK, PC, PVC, PE, PET, PETE, Paper, C-FLEX, Paper or Cotton/Noil etc. in sheet format or endless roll (web) can be coated with adhesive film to protect the first chip and to support the process for manufacturing the inlay at the secure printing office.
- the substrate can also have special markings such as luminous threads, water marks, microscopic filings and optical polymer memory for additional security.
- the antenna wire could be stamped with an 11 digit identification code and the inlay could have a ultra-violet strip which would break if anyone attempted to peel off a substrate layer.
- An LED could be incorporated into the inlay which would illuminate during data communication.
- a typical thickness for the substrate for passport inlays can be between 360 and 750 microns.
- transponder When the term “transponder” is used herein, it may be taken to include any chip suitable for use in an inlay, such as an RFID chip.
- chip When the term “chip” is used herein, it may be taken to include a chip module, or a chip unit. Generally, as used herein, “chip” is intended to mean RFID or transponder chip. Also, where applicable, “chip” may refer to a die, chip module or carrier or “strap”.
- chips normally chips (also referred to as “dice”, plural of “die”) have aluminum pads 100 x 100 microns in dimension. Gold bumps may be sputtered or plated onto the aluminum pads and rise 25 microns above the pads. Enhanced pads or so-called “mega bumps" can be large and can be mounted over the active structure of a die.
- wire When the term “wire” is used herein, it may be taken to include any elongate means for conveying or radiating signals, such as metallic wire (such as gold, aluminium, copper, silver), of any profile (such as round or rectangular), either bare, coated or colour coated, as well as optical fibers.
- metallic wire such as gold, aluminium, copper, silver
- profile such as round or rectangular
- antenna When the term “antenna” is used herein, it may be taken to include a simple coil antenna comprising wire having a number of turns, and two ends, a dipole antenna having two wire segments with two inner ends, or any other antenna configuration suitable for connection to a chip or chip module in an inlay.
- the term “mounting” when used herein (in conjunction with wire) it may be taken to include embedding or countersinking the wire into a surface of the inlay substrate and/or adhesively placing (bonding or sticking) the wire to the surface of the substrate.
- the term “embedding” may be be taken to include adhesively placing, if appropriate in the context (such as when describing mounting a self-bonding wire) - in other words, “embedding” may sometimes be used to mean “mounting” (which includes both “embedding” and “adhesively placing”).
- bonding When the term “bonding” is used herein, it may be taken to include any means of interconnecting (or simply “connecting”), both physically and electrically, a wire, or an end of the wire, or an end portion of the wire, to a terminal or connection pad on a chip or chip module. (Bonding typically comprises a kind of welding, but can include adhesively bonding and soldering.)
- the interconnection process can for example be inner lead bonding (heated diamond tool), thermal compression bonding (thermode), ultrasonic bonding or laser welding.
- the "transponder chip” is an electronic component comprising (having at least) two terminals, which may be a single chip, or a module comprising (having at least) a chip.
- the two terminals of the chip or module are interconnected with corresponding two end portions of the antenna wire which is mounted to a top surface of a substrate, which may be a multilayer substrate.
- the present invention of the dual interface inlay may help to resolve the unreliable interconnection between the antenna and the contact chip module as well as the chip breakage problem during lamination.
- an antenna is embedded into each site on a non-conductive sheet and squiggles or meanders are formed at the position where the face down pads of the contact chip module will reside.
- the insulation of the wire conductor is removed from the squiggles using an ultra violet laser.
- a solder ball or flexible solder paste is applied to the un-insulated squiggles.
- recesses or indents are created in a top sheet at the position of the solder by applying ultrasonic energy to the sheet, resulting in the compression of the material, alternatively material can be removed from the top sheet mechanically or through laser ablation.
- the top sheet is placed over the lower sheet with the array of antennae sites and laminated to form a dual interface inlay.
- the ends of the antenna wire form a contact area larger than the diameter of the wire due to the fact that the area of the wire squiggles or meanders, for example, is 5-10 times larger than the wire diameter.
- a second meander pattern can be formatted atop the previous meander pattern to increase the thickness of the contact area, in which case insulation should be removed from the wire prior to forming the meanders. Insulation removal can be performed while laying the wire. Or, insulation removal may be performed after laying the wire.
- the net result of forming the meander pattern, removing insulation and treating the surface with solder or metallizing the surface is to create enlarged planar pads for interconnecting an antenna with a contact chip module or any type of chip package including a naked die with or without bumps.
- the inlay is laminated to an upper and lower printed sheet (incl. an anti-scratch overlay) and then each site in the array is punched to release a single card body.
- a cavity or recess to accommodate the contact chip module is milled out of the card body to a depth where the solder points on the wire ends of the antenna (as squiggles) are positioned.
- the contact chip module is then bonded to the antenna using a hot iron to solder the module to the antenna.
- the area surrounding the soldered squiggles is made to float within the card body, resulting in a flexible connection to the contact chip module. This is achieved by placing silicon cushions or patches under the sheet at the position of the squiggles, which prevents the sheet material from joining with the lower layers of the inlay during lamination.
- UV laser can also be used to engrave a production code into the non-conductive substrate.
- the contact chip module as described above avails of a printed circuit board for mounting of the die and an epoxy globe top to protect the wire bonds.
- the die can be mounted on a Kapton material with a thickness of about 30 microns.
- the contact pads on the face up side can be silver or gold.
- an “inlay” is a generally planar substrate, which may include several (a plurality of) distinct “transponder areas” (or “transponder sites”), arranged for example in a 3x6 array.
- the substrate may have one or more (multiple) layers.
- a “transponder” may be fabricated in each "transponder area”.
- Each “transponder” may include an antenna which is mounted to a surface (such as a top layer) of the substrate, and a “transponder chip” which is installed at a “transponder chip site” (or “site for the transponder chip”) on the substrate.
- the antenna is typically in the form of a flat coil having two ends which are connected to bond pads on the "transponder chip”.
- the "transponder chip” may be an individual integrated circuit (IC) chip, or a chip module.
- a “transponder chip site” of the “transponder area” may comprise a recess extending through the top and one or more underlying layers of the substrate, such that when the "transponder chip” is installed in the recess, it can be supported by an underlying layer of the substrate.
- a “contact chip module” refers to a standard dual interface module with ISO 7816 connections for interfacing with a mechanical reader and face down bonding pads for interconnecting with the terminal areas of an antenna sandwiched between several layers of synthetic material.
- a contact chip module can also refer to a leadframe, flip chip or interposer module.
- a “dual interface inlay” refers to a chip card that has an electronic chip with a memory, contacts and contactless transmission means such as coils and/or condensers which are embedded in the card material and which, for purposes of supplying energy to the chip, exchange energy and bi-directional data with a terminal via the contacts or else contact-free.
- the chip of the chip card has an electronic circuit which generates a logical signal that, depending on the occurrence of voltage at the contacts or at a coil, is logically "high” or logically "low”.
- the chip card is autonomously capable of deciding whether it is being addressed via the contact-coupled segment or via the contactless segment and consequently, it functions accordingly
- a dual interface inlay chip card is described in DE 39 35 364 , incorporated by reference herein.
- solder ball bonding When the term “solder ball bonding" is used herein, it may taken to mean the placement of solder beads on the contact areas of a chip module or carrier by means of a singling-out device as described in US 6,152,348 and connected to said contact area, for example by means of a laser.
- laser bonding or welding it may be taken to include the interconnection of a leadframe chip module with a metalized contact surface area, whereby the laser beam is directed to the leadframe which results in localized heating and thus bonding of the metalized contact area to the leadframe.
- a minute hole can be provided in the leadframe and the laser beam is directed to the hole resulting in the bonding of the metalized contact area to the leadframe.
- direct or indirect bonding by means of a laser beam.
- FIG. 2A illustrates a dual interface inlay 200.
- the inlay 200 will comprise various laminated sheets, and may be in credit card format.
- a given inlay may be a given transponder site where a dual interface chip module will reside after completing the lamination stage with the printed graphics, and punching individual card bodies from the sheet with the array of sites.
- An antenna wire 210 is "mounted” to a top (as viewed) surface of a bottom sheet (substrate) 202 which includes “embedding” (countersinking) the antenna wire into the surface of the substrate, or “adhesively placing” (adhesively sticking) the antenna wire on the surface of the substrate.
- the antenna may be a HF antenna with a number of turns, such as 4 or 5.
- the substrate 202 may be of a synthetic material, such as PVC, in a credit card format, and may have a thickness of approximately 250 ⁇ m (microns).
- End portions 210a and 210b of the antenna wire 210 are formed with squiggles or meanders to provide an area of increased surface area for subsequent attachment of a chip (or chip module) to the antenna 210.
- These squiggles or meanders may be considered to be "contact areas", and are generally located on opposite sides of a transponder site 206 on the surface of the bottom sheet 202 where a chip (or chip module) 240 ( FIG. 2C ) will be mounted.
- the transponder site 206 need not be, and generally is not a recess. Rather, the transponder site 206, shown in dashed lines, is merely a defined location on the substrate 202.
- the antenna wire 210 may be insulated wire, and insulation from the end portions 210a and 210b of the wire may be removed, such as through laser treatment.
- FIG. 2B illustrates a cross section of the dual interface inlay 200.
- a top sheet 222 is positioned over the bottom sheet 202, and will be laminated thereto.
- the antenna wire 210 and squiggle end portions 210a and 210b of the antenna wire 210 are visible on the top (as viewed) surface of the bottom sheet 202.
- a dollop of conductive material 212 is applied to at least a portion of the top surfaces of the squiggles 210a and 210b.
- solder balls or flexible solder paste, or conductive glue is applied to the un-insulated squiggle end portions 210a and 210b of the antenna wire 210.
- the conductive material 212 forms what may be considered to be planar pads on the squiggles 210a and 210b.
- Recesses 224a and 224b may be formed in a bottom (as viewed) surface of the top sheet 222, at positions corresponding to the squiggles 210a and 210b. These recesses may be created by applying an ultrasonic stamp to the material. The recesses 224a and 224b in the top sheet 222 are for the purpose of protecting the solder area, after lamination.
- the recesses 224a and 224b are larger and deeper than the squiggles 210a and 210b, so that when the top sheet 222 is laminated to the bottom sheet 202, the squiggles and solder paste will remain undisturbed.
- a contact are formed by a squiggle may measure 4 x 5 mm.
- the antenna wire may have a thickness (diameter) of 112 microns.
- a recess may measure 8 x 10 mm, and have a depth of 125 microns.
- the squiggles may form a greater area than the required area for interconnection and therefore the solder balls, solder paste or conductive glue does not need to cover the entire area of the squiggles, just sufficient to make contact with the face down pads of the contact chip module. See FIG. 2D .
- a second meander pattern (second layer of squiggles) can be formatted atop the previous meander pattern to increase the thickness of the contact area.
- Silicon cushions 226a and 226b may be provided in the bottom sheet 202, under the contact areas (under the squiggles 210a and 210b, respectively) so as to create partially "floating" terminal area, thus introducing flexibility of movement between the chip module and the underlying connections.
- An overlay sheet 228 is disposed below the bottom sheet 202, for example to cover recesses in the bottom surface of the bottom sheet 202 into which the silicon cushions 226a and 226b may be inserted.
- the top sheet 222 is laminated to the top of the bottom sheet 202.
- the overlay sheet 228 is laminated to the bottom of the bottom sheet 202.
- FIG. 2B shows what may be considered to be an interim product (which may itself be referred to as the "inlay”), which can be shipped, later to have a chip module installed.
- FIG. 2C illustrates that a cavity 230 may be milled, extending through the top sheet 222 to (i) allow a chip module 240 to be mounted through the top sheet 222 onto the bottom sheet 202, and (ii) to expose the contact areas 210a and 210b.
- milling in a central area, between the contact areas 210a and 210b, milling may proceed completely through the top sheet 222 and into the bottom sheet 202, and may form a cavity (or recess) 232 in the bottom sheet for accepting the mold mass 246 of a chip module 240.
- the chip module 240 may comprise:
- the chip module 240 is inserted through the top sheet 222, into (through) the cavity 230.
- Adhesive 251 may secure the mold mass 246 to the bottom of the milled out recess 232 in the top surface of the bottom sheet 202.
- a hot bond tool may be used to effect connection of the terminals 238a and 248b with the contact areas 210a and 210b, respectively.
- the dual interface inlay 200 further comprises:
- FIG. 2D illustrates the dual interface inlay 200 having an antenna wire 210 mounted (such as by embedding) to a substrate 202 formed of a synthetic material.
- Terminal areas 210a and 210b also referred to as "enlarged connection areas", are formed at end portions of the wire by creating a meandering (squiggle) pattern with the wire conductor 210.
- FIG. 2D is essentially the same as FIG. 2A , but with the metallization 212' (compare 212, FIG. 2B ) on the squiggles 210a and 210b. This illustrates that the entire enlarged connection area (squiggle) does not need to be metalized, such as with solder.
- Insulation may be removed from the end portions of the wire conductor before or after embedding.
- the insulation may be removed with a laser under a gas atmospheric condition so as to avoid oxidization of the wire conductor.
- the "naked" (insulation removed) end portions of the wire conductor may be metalled with a bondable material, such as solder (lead-tin) 312.
- a die with terminals may be "flip-chip" mounted to the substrate.
- the terminals 248a and 248b may also be provided with solder paste or balls 213 to enhance the interconnection, and a laser may be used to bond the terminal areas 248 with 212. See FIG. 2E (elements 222, 251, 252 and 256 omitted, for illustrative clarity).
- a two-part (A+B) conductive adhesive system could also be used to effect the interconnection, with "part A” 215 on the terminals 248a and 248b and part “B” 217 on the squiggles 210a and 210b. See FIG. 2F (elements 222, 251, 252 and 256 omitted, for illustrative clarity).
- the dual interface inlay has:
- FIGs. 3A and 3B are cross-sectional exploded views of an inlay substrate, according to the prior art, and correspond approximately to FIGs. 2C and 2D to illustrate the differences.
- the inlay 300 (compare 200) in its final form comprises:
- FIG. 4 illustrates an inlay 400 (compare 200) which is not dual interface.
- the inlay 400 is contactless only (not contact).
- the inlay 400 has an antenna wire 410 (compare 210) mounted (such as by embedding) to a substrate 402 (compare 202) formed of a synthetic material, such as Kapton.
- Metal pads 420a and 420b are formed on a surface of the substrate 402, at a position generally corresponding to the position of the enlarged contact areas 310a/310b and 210a/210b discussed hereinabove.
- the metal pads 420a and 420b may be comparable (in size and location) to the enlarged contact areas 310a/310b and 210a/210b discussed hereinabove.
- the metal pads may be gold-plated nickel/copper.
- End portions 410a and 410b of the antenna wire 410 are bonded, such as by means of thermal-compression bonding, to the metal pads 420a and 420b, respectively.
- a dual bonding tool is shown in FIG. 6 .
- An RFID chip 430 is disposed on the substrate 402 between the metal pads 420a and 420b.
- the chip can be silicon, in-organic or organic.
- the chip 430 may be connected with bond wires 432 to the metal pads 420a and 420b.
- a mold mass (not shown) may be disposed over the chip 430, bond wires 432 and metal pads 420a/b.
- This embodiment is contactless only. There are no contacts (compare 250) on the front (circuitized) face of the RFID chip 430.
- the inlay substrate 402 is functioning as a carrier, and no separate carrier is needed for the chip 430.
- FIG. 5 illustrates an inlay 500 (compare 400) which is not dual interface.
- the inlay 500 is contactless only (not contact).
- the inlay 500 has an antenna wire 510 (compare 410) mounted (such as by embedding) to a substrate 502 (compare 402) formed of a synthetic material, such as Kapton.
- Metal pads 520a and 520b are formed on a surface of the substrate 402, at a position generally corresponding to the position of the enlarged contact areas 310a/310b and 210a/210b discussed hereinabove.
- the metal pads 520a and 520b may be comparable (in size and location) to the metal pads 420a and 420b.
- the metal pads may be gold-plated nickel/copper.
- End portions 510a and 510b of the antenna wire 510 are bonded, such as be thermo-compression bonding, to the metal pads 520a and 520b, respectively.
- a dual bonding tool is shown in FIG. 6 .
- a chip module 530 is disposed on the substrate 502 between the metal pads 520a and 520b. - the chip module 530 may be a leadframe, flip chip or interposer. The chip module 530 may be connected to the metal pads 520a and 520b by means of soldering, thermal compression bonding or laser welding, indicated as "532". After connecting, a mold mass (not shown) may be disposed over the chip module 530, connections 532 and metal pads 520a/b.
- This embodiment is contactless only. There are no contacts (compare 250) on the front (circuitized) face of the chip module 530.
- the inlay substrate 502 is not functioning as a carrier, since a separate carrier (530) is provided.
- the area can be sealed with silicon to ensure that moisture does not enter the bond area.
- FIG. 6 illustrates an ultrasonic bonding tool (head) 600 to simultaneously interconnect the two end portions of the antenna wire to the metal pads 420a/b and 520a/b, as mentioned above. (It should be understood that the two connections could be done one at a time, without this tool.)
- the bonding head 600 comprises an elongate body portion 602 having a top end 602a and a bottom end 602b.
- the top end 602a may have a threaded hole 604 to be mounted to an ultrasonic transducer (not shown).
- the bottom end 602b may be forked, having two elongate end effectors 606a and 606b extending from the body portion 602.
- a distance "S" between the two end effectors 606a and 606b may, for example, be 10-12 mm or 15-20 mm
- the tool 600 may be designed to operate at 60 kHz.
- a wire (such as 410 or 510) being bonded using this tool 600 may, for example, be 60 micron gold wire.
- FIG. 7 illustrates a dual interface inlay 700 (compare 200) having an antenna wire 710 (compare 210) mounted (such as by embedding) to a substrate 702 (compare 202) formed of a synthetic material.
- Terminal areas 710a and 710b are formed at end portions of the wire by creating a meandering (squiggle) pattern with the wire conductor 710.
- FIG. 7 may be considered to be a variation on FIG. 2D , but with a bumped chip 730 placed face down on the enlarged planar pads 712 for interconnection.
- the method of connection can be performed by thermal compression bonding in which a hot diamond tool (450° C) exerts pressure against the die and connections pads, to form the bonding process.
- a hot diamond tool 450° C
- the interconnected chip 730 may be encapsulated in an epoxy medium or moulded as a package.
- FIG. 8 illustrates an inlay 800 (compare 400) which is not dual interface.
- the inlay 800 is contactless only (not contact).
- FIG. 8 is essentially a variation on FIG. 4 .
- the inlay 800 has an antenna wire 810 (compare 410) mounted (such as by embedding) to a substrate 802 (compare 402) formed of a synthetic material, such as Kapton.
- the end portions 810a and 810b of the antenna wire 810 are not squiggles (such as 310a and 310b), nor are there metal pads (420a and 420b). Rather, the end portions 810a and 810b of the antenna wire 810 are prepared for an inner-lead bonding process, in which the round wire conductor is first flatten to create a rectangular wire, the insulation is removed before or after embedding and flattening and finally the wire conductor is treated under an atmospheric condition to enable an oxide free surface to be attained.
- the antenna wire 810 may, for example be 112 ⁇ m in diameter before flattening, and 150 ⁇ m in diameter after flattening.
- an RFID chip 830 (compare 430) may be chip is connected with bond wires 832 to the flattened end portions 810a and 810b of the antenna wire 810.
- a mold mass (not shown) may be disposed over the chip 430, bond wires 432 and flattened end portions 810a and 810b of the antenna wire 810.
- the interconnected chip 830 may be encapsulated in an epoxy medium or moulded as a package.
- FIG. 9 illustrates a dual interface inlay 900 (compare 700) having an antenna wire 910 (compare 710) mounted (such as by embedding) to a substrate 902 (compare 702) formed of a synthetic material.
- end portions 910a and 910b (compare 810a and 810b) of the antenna wire 910 are prepared for an inner-lead bonding process, in which the round wire conductor is first flatten to create a rectangular wire, the insulation is removed before or after embedding and flattening and finally the wire conductor is treated under an atmospheric condition to enable an oxide free surface to be attained.
- the antenna wire 910 may, for example be 112 ⁇ m in diameter before flattening, and 150 ⁇ m in diameter after flattening.
- FIG. 9 may be considered to be essentially a variation on FIGs. 7 , but with the bumped chip 930 (compare 730) placed face down flattened end portions of the antenna wire 910 rather than (squiggles and conductive mass 712) for interconnection.
- the method of connection can be performed by thermal compression bonding in which a hot diamond tool (450° C) exerts pressure against the die and connections pads, to form the bonding process.
- the interconnected chip 930 may be encapsulated in an epoxy medium or moulded as a package.
- a hot plate can be used to heat the dice before wire bonding or inner-lead bonding.
- An antenna wire (such as 210, 310, 410, 510, 710, 810, 910) is usually an insulated wire, having one or more coatings to assist (for example) in mounting by adhesively placing the antenna wire on the substrate, the coating(s) (self bonding coat and insulation layer) should be removed prior to bonding. Removal of the coating(s) (insulation) from an insulated wire (importantly from end portions of the wire that will be bonded to the terminal(s) of the transponder chip) are discussed in greater detail hereinbelow (and may involve using apparatus such as a laser or a hot iron to remove the coating(s)), and can be done (performed) either during mounting the antenna wire, or after having mounted the antenna wire such as over slots through the substrate. A mirrored surface under the slots can also be used, in conjunction with a vision system, to ensure that the insulation is completely removed.
- FIG. 10 illustrates a technique for removing insulation from wire bridges, according to an aspect of the invention.
- This example of removing insulation is in the context of a transponder inlay such as in FIG. 1 , but the principle is analogous to what may be used for the dual interface inlays described herein.
- a substrate 1002 has a recess 1006 (compare 106), which may include slots (1007a, 1007b). (In this example, the recess 1006 is rectangular, for illustrative purposes.) End portions 1010a and 1010b (compare 110a and 110b) of an antenna wire 1010, which are "wire bridges", span the recess 1006 (or slots).
- a laser 1060 such as a UV laser
- a laser 1060 may be used to direct a beam of light 1062 at the wire bridges 1010a and 1010b, to remove any insulating material (coating, such as enamel) therefrom, to enhance subsequent bonding to terminals of the chip, as discussed hereinabove.
- comparable slots or openings can be made in the substrate under the end portions of the antenna wire to accommodate laser removal of insulation.
- UV laser uses optical directing systems to remove the insulation, and the wire can be flooded (or protected by) with an inert gas, such as nitrogen, to avoid oxidation of the bare (such as copper) wire.
- An antenna wire is typically round in cross-section.
- the wire can be flattened, as described above ( FIG. 8 and FIG. 9 ).
- FIG. 11 illustrates a technique for flattening end portions of an antenna wire, according to an aspect of the invention.
- This example of flattening end portions of an antenna wire is in the context of a transponder inlay such as in FIG. 1 , but the principle is analogous to what may be used for the dual interface inlays described herein.
- Slots extending all the way through the substrate provide an opportunity to flatten the otherwise round cross-section wire, before bonding the wire to the terminals of the transponder chip (or chip module). This can be accomplished with the substrate on a workplate (anvil), and impacting the wire from above with a punch.
- FIG. 11 illustrates a technique for shaping (flattening) the wire, in preparation for bonding.
- a substrate 1104 (compare 104) has a recess 1106 (compare 106) extending through upper layers 1104a (compare 104a) thereof, and slots 1107a and 1107b extending from opposite side edges of the recess 1106 completely through the substrate 1104, including bottom layers 1104b (compare 104b) thereof.
- End portions 110a and 1110b (compare 110a and 110b) of an antenna wire 1110 (compare 110) extend as "wire bridges" across the slots 1107a and 1107b.
- a punch 1170 is brought down on the wire bridges 1110a and 1110b to flatten out the wire from its initial circular cross-section to a flatter cross-section.
- the substrate may be disposed on a surface 1172 functioning as an anvil, having raised portions 1174a and 1174b which fit up into the slots 1107a and 1107b so that the wire does not break when shaping it.
- This shaping (flattening) step can be done before or after the step of removing insulation from the wire bridges.
- the wire bridge 1110a is shown as having already been flattened, and the wire bridge 1110b is in the process of being flattened.
- comparable slots or openings can be made in the substrate under the end portions of the antenna wire to accommodate flattening of the wire.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
- Communication Control (AREA)
- Details Of Aerials (AREA)
Abstract
Description
- The invention relates primarily to techniques for fabricating dual interface cards comprising an antenna embedded in one substrate, and laminated with upper and lower substrates whereby a chip module is connected to the antenna prior or after final lamination.
- A conventional method to produce an inlay site containing a high frequency RFID chip and an antenna embedded into a multi-layer substrate and connected to the terminals (terminal areas) of the RFID chip is to first position the RFID chip in a recess, supported by a lower substrate layer, then start embedding (countersinking) a wire conductor onto or into the top substrate layer in the direction of the RFID chip, then guiding the wire conductor over a first terminal area of the RFID chip, then continue the embedding process by forming an antenna in the top substrate layer with a given number of turns, then guiding the wire conductor over the second terminal area, and finally embedding the wire conductor again into the top substrate layer before cutting the wire to complete the high frequency transponder site. In a next stage of the production process, the wire ends passing over the terminal areas are interconnected by means of thermal compression bonding. Adhesively placing a wire conductor onto the top substrate layer is an alternative to embedding, and typically involves self-bonding coated wire conductor.
- A wire embedding apparatus may be an ultrasonic wire guide tool, known as a "sonotrode", with a wire feed channel (capillary) passing through the centre of the wire guide tool. The wire conductor is fed through the wire guide tool, emerges from the tip, and by application of pressure and ultrasonic energy the wire conductor is "rubbed" into the substrate, resulting in localized heating of the wire conductor and subsequent sinking of the wire conductor into the substrate material during the movement of the wire guide tool. A wire placement apparatus may also be an ultrasonic tool similar in function to an ultrasonic horn which heats the wire to form an adhesion with a substrate.
-
US Patent 6,698,089 ("089 patent"), discloses device for bonding a wire conductor. Device for the contacting of a wire conductor in the course of the manufacture of a transponder unit arranged on a substrate and comprising a wire coil and a chip unit, wherein in a first phase the wire conductor is guided away via the terminal area or a region accepting the terminal area and is fixed on the substrate relative to the terminal area or the region assigned to the terminal area by a wire guide and a portal, and in a second phase the connection of the wire conductor to the terminal area is effected by means of a connecting instrument.FIGs. 1 and2 of the 089 patent show a wire conductor 20 being embedded in a surface of a substrate 21, by the action of ultrasound.FIG. 3 of the 089 patent shows a wiring device 22 with an ultrasonic generator 34, suitable for embedding the wire. It is believed that the wiring device in the 089 patent can also be used for adhesively placing a wire. -
FIGs. 1A and 1B illustrate an inlay substrate (or sheet) 100 having a plurality of transponder areas. A selected one of thetransponder areas 102 constituting a single transponder is shown in detail. The vertical and horizontal dashed lines (inFIG. 1A ) are intended to indicate that there may be additional transponder areas (and corresponding additional transponders) disposed to the left and right of, as well as above and below, thetransponder area 102, on theinlay sheet 100. Such a plurality of transponders may be arranged in an array on the (larger) inlay sheet. As best viewed inFIG. 1B , theinlay sheet 100 may be amulti-layer substrate 104 comprising one or more upper (top)layers 104a and one or more lower (bottom)layers 104b. - A
recess 106 may be formed in (through) theupper layer 104a, at a "transponder chip site", so that atransponder chip 108 may be disposed in the recess, and supported by thelower layer 104b. Thetransponder chip 108 is shown having twoterminals transponder chip 108 may be a chip module, or an RFID chip. - Generally, the
recess 106 is sized and shaped to accurately position thetransponder chip 108, having side dimensions only slightly larger than thetransponder chip 108 to allow thetransponder chip 108 to be located within the recess. For example, - 1. the
transponder chip 108 may measure: 5.0 x 8.0 mm - 2. the
recess 106 may measure: 5.1 x 8.1 mm - 3. the
terminals 108a/b may measure: 5.0 x 1.45 mm - 4. the wire (discussed below) may have a diameter between 80 and 112 µm
- One millimeter (mm) equals one thousand (1000) micrometers (µm, "micron").
- In
FIGs. 1A and 1B , therecess 106 may be illustrated with an exaggerated gap between its inside edges and the outside edges of thechip 108, for illustrative clarity. In reality, the gap may be only approximately 50µm - 100 µm (0.05mm - 0.1 mm). - In
FIG. 1A theterminals terminals transponder chip 108.) - It should be understood that the
transponder chip 108 is generally snugly received within therecess 106, with dimensions suitable that thechip 108 does not move around after being located within therecess 106, in anticipation of thewire ends terminals chip 108, such as a small fraction of a millimeter (such as 50µm - 100 µm) can be tolerated. - As best viewed in
FIG. 1A , anantenna wire 110 is disposed on a top surface (side) of the substrate, and may be formed into a flat (generally planar) coil, having twoend portions - As best viewed in
FIG. 1B , the antenna wire is "mounted" to the substrate, which includes "embedding" (countersinking) the antenna wire into the surface of the substrate, or "adhesively placing" (adhesively sticking) the antenna wire on the surface of the substrate. In either case (embedding or adhesively placing), the wire typically feeds out of a capillary 116 of an ultrasonic wire guide tool (not shown). Thecapillary 116 is typically disposed perpendicular to the surface of thesubstrate 100. Thecapillary 116 is omitted from the view inFIG. 1A , for illustrative clarity. - The
antenna wire 110 may be considered "heavy" wire (such as 80 µm - 112 µm), which requires higher bonding loads than those used for "fine" wire (such as 30 µm). Rectangular section copper ribbon (such as 60 x 30 µm) can be used in place of round wire. - The
capillary 116 may be vibrated by an ultrasonic vibration mechanism (not shown), so that it vibrates in the vertical or longitudinal (z) direction, such as for embedding the wire in the surface of the substrate, or in a horizontal or transverse (y) direction, such as for adhesively placing the wire on the surface of the substrate. InFIG. 1B , thewire 110 is shown slightly spaced (in drawing terminology, "exploded" away) from the substrate, rather than having been embedded (countersunk) in or adhesively placed (stuck to) on the surface of the substrate. - The
antenna wire 110 may be mounted in the form of a flat coil, having twoends portions ends portions antenna coil wire 110 are shown extending over (FIG. 1A ) and may subsequently be connected, such as by thermal-compression bonding (not shown), to theterminals transponder chip 108, respectively. - Examples of embedding a wire in a substrate, in the form of a flat coil, and a tool for performing the embedding (and a discussion of bonding), may be found in the aforementioned
US Patent No. 6,698,089 (refer, for example, toFIGs. 1 ,2 ,4 ,5 , 12 and 13 of the patent). It is known that a coated, self-bonding wire will stick to a synthetic (e.g., plastic) substrate because when vibrated sufficiently to soften (make sticky) the coating and the substrate. - In
FIG. 1B , thewire 110 is shown slightly spaced (in drawing terminology, "exploded" away) from theterminals 108a/b of thetransponder chip 108, rather than having been bonded thereto, for illustrative clarity. In practice, this is generally the situation - namely, the end portions of the wires span (or bridge), the recess slightly above the terminals to which they will be bonded, in a subsequent step. Also illustrated inFIG. 1B is a "generic" bond head, poised to move down (see arrow) onto thewire 110b to bond it to the terminal 108b. Thebond head 118 is omitted from the view inFIG. 1A , for illustrative clarity. - The interconnection process can be inner lead bonding (diamond tool), thermal compression bonding (thermode), ultrasonic bonding, laser bonding, soldering, ColdHeat soldering (Athalite) or conductive gluing.
- As best viewed in
FIG. 1A , in case theantenna wire 110 needs to cross over itself, such as is illustrated in the dashed-line circled area "c" of the antenna coil, it is evident that the wire should typically be an insulated wire, generally comprising a metallic core and an insulation (typically a polymer) coating. Generally, it is the polymer coating that facilitates the wire to be "adhesively placed" on (stuck to) a plastic substrate layer. (It is not always the case that the wire needs to cross over itself. See, for example,FIG. 4 ofUS Patent No. 6,698,089 ). - In order to feed the wire conductor back and forth through the ultrasonic wire guide tool, a wire tension/push mechanism (not shown) can be used or by application of compressed air it is possible to regulate the forward and backward movement of the wire conductor by switching the air flow on and off which produces a condition similar to the Venturi effect.
- By way of example, the wire conductor can be self-bonding copper wire or partially coated self bonding copper wire, enamel copper wire or partially coated enamel wire, silver coated copper wire, un-insulated wire, aluminum wire, doped copper wire or litz wire.
-
FIG. 1A herein resemblesFIG. 5 ofUS Patent No. 6,698,089 (the '089 patent), which has a similar coil antenna (50) with an initial coil region (51) and a final coil region (52) comparable to theantenna 110 with twoend portions - In
FIG. 5 of the '089 patent, it can be seen that the initial and final coil regions (end portions) of the wires extend across the recess. InFIG. 6 of the '089 patent, it can be seen that the recess extends completely through the substrate. If the antenna is mounted to the substrate prior to the chip being installed in the recess (and the antenna is mounted to the front/top surface/side of the substrate, as shown), due to the fact that the antenna wires are "blocking" entry to the recess from the top/front surface of the substrate, the chip must be installed into the recess from the back (bottom) side of the substrate, as indicated byFIG. 6 of the '089 patent. -
FIG. 7 of the '089 patent shows the subsequent (inter)connection of the terminal areas 59 of the chip unit 58 to the initial coil region 51 and to the final coil region 52 by means of a thermode 60 which under the influence of pressure and temperature creates a connection by material closure between the wire conductor 20 and the terminal areas 59, as an overall result of which a card module 64 is formed. - The conventional method to produce a dual interface card or combi-card (contactless & contact) is to embed an antenna into a substrate, form squiggles at the position under the chip module and to laminate the layers to create a pre-laminated inlay.
-
US patent application 20020020903 from Hans-Diedrich Kreft (assigned to Angewandte Digital Elektronik - ADE) describes a microchip card capable of operation both as a contactless card and as a contact card. Patents from ADE includeUS 5,773,812 andUS 6,008,993 . TheUS patents 6,190,942 &6,095,423 from Robert Wilm (assigned to PAV Card) describe a method of producing said card. - Two manufacturing methods are used to produce dual interface cards (with Contact & Contactless functionality). The first method involves embedding an antenna into a non-conductive sheet (at each site in an array) whereby the connection to the respective chip module is prepared by embedding squiggles or meanders at the position where a contact chip module will reside. The non-conductive sheet with the antennae is hot or cold laminated to an upper layer to form a pre-laminated dual interface inlay for further processing by a smart card manufacturer. At the secure printers, the pre-laminated inlay is laminated to an upper and lower printed sheet (including an anti-scratch overlay), and then each site in the array is punched to release a single card body. In the next step of the process, a cavity or recess to accommodate the contact chip module is milled out of the card body to a depth where the wire ends of the antenna (as squiggles) are positioned. The contact chip module is then bonded to the antenna using conductive glue. For the purpose of clarity, it should be emphasized that the contact chip module has contact pads on the face up side (ISO 7816 smart card) as well as on the face down side for interconnection to the antenna (Contactless e.g. ISO/IEC 14443).
- The critical manufacturing process is the interconnection of the wire ends of the antenna to the chip module. Apart from yield loss during production, the life time of the finished product is difficult to guarantee with certainty, as torsion and bending of the card body at the position of the chip module results in operational failure.
- An alternative conventional approach to the above method is to embed an antenna into a non-conductive sheet and to pass the wire ends of the antenna over an opening at each site in the array which can later accommodate the interconnection pads and mould mass of a contact chip module. In the next step, a contact chip module is placed onto the surface of the non-conductive sheet with the interconnection pads for connection to the antenna facing down into the opening. Then the wire ends of each antenna are connected by means of thermal compression bonding or soldering to the face down interconnection pads on the chip module.
- The sheet with the array of contact chip modules connected to the underlying antennae is hot or cold laminated with a second sheet (or several sheets) to form a dual interface inlay. To protect the contact chip module from damage due to pressure during the lamination process, a removable sheet (approx. 240 micron, e.g. Teflon) equal in thickness to the protruding printed circuit board of the contact chip module, has openings to accept the chip modules.
- This means that the removable sheet is flush with all the chip modules, having an even surface for lamination. In some cases, an additional sheet (release film) such as Pacothane is used to further protect the contact chip modules. After lamination, the removable sheet and the Pacothane is detached from the inlay, leaving the PCB part of the contact chip modules protruding over the surface of the inlay.
- At the secure printers, the overlay sheet and the printed sheet (typically offset printing) are laminated together and openings are punched into the laminate to accommodate the chip modules on the dual interface inlay. The dual interface inlay is sandwiched between the upper and lower printed sheet laminates, and then laminated together.
- Although the problem of a weak interconnection of the antenna to the contact chip module is partially resolved, there are serious problems of chip breakage during both (pre & final) lamination processes as well as the shrinkage of the materials leaving a spoiled printed sheet around the contact chip module area. To compensate for shrinkage, it is possible to match the grain direction of the materials to one another and to provide for indents in the lamination plates, but the overall yield loss is significant.
- German printed patent document
DE 39 35 364 discloses a chip card that has an electronic chip with a memory, contacts and contactless transmission means such as coils and/or condensers which are embedded in the card material and which, for purposes of supplying energy to the chip, exchange energy and bi-directional data with a terminal via the contacts or else contact-free. The chip of the chip card has an electronic circuit which generates a logical signal that, depending on the occurrence of voltage at the contacts or at a coil, is logically "high" or logically "low". As a result, the chip card is autonomously capable of deciding whether it is being addressed via the contact-coupled segment or via the contactless segment and consequently, it functions accordingly. This chip card, which is also called Dual Interface Card or CombiCard, is likewise described in the literature reference Helmut Lemme, Der Mikrorechner in der Brieftasche [The microcomputer in your wallet], Elektronik 26/1993, pp. 70-80. This chip card offers considerably greater reliability than the simple contactless cards. German printed patent documentDE 44 43 980 also describes connecting the coils and the chip in a special manner. - A conventional method to produce an inlay is to embed insulated wire into a synthetic material or a coated substrate, form an antenna coil with a number of turns and interconnect the wire ends of the antenna to a transponder chip (or chip module). The interconnection of the antenna wire to the chip module is non-trivial, and it can be beneficial that the chip module can be installed on a substrate which has already been prepared with an antenna coil.
- The conventional method to produce an inlay site containing a high frequency RFID chip and an antenna embedded into a multi-layer substrate and connected to the terminal areas of the RFID chip, is to embed a wire conductor into the top substrate layer in the direction of the RFID chip residing in a recess and supported by a lower substrate layer, then to guide the wire conductor over the first terminal area of the RFID chip, continue the embedding process by countersinking the wire conductor into the top substrate layer to form an antenna with a given number of turns and then guiding the wire conductor over the second terminal area and finally embedding the wire conductor again into the top substrate layer before cutting the wire to complete the high frequency transponder site. In the next stage of the production process the wire ends passing over the terminal areas are interconnected by means of thermal compression bonding.
-
US Patent 6,698,089 ("089 patent"), discloses device for bonding a wire conductor. Device for the contacting of a wire conductor (113) in the course of the manufacture of a transponder unit arranged on a substrate (111) and comprising a wire coil (112) and a chip unit (115), wherein in a first phase the wire conductor (113) is guided away via the terminal area (118, 119) or a region accepting the terminal area and is fixed on the substrate (111) relative to the terminal area (118, 119) or the region assigned to the terminal area by a wire guide and a portal, and in a second phase the connection of the wire conductor (113) to the terminal area (118,119) is effected by means of a connecting instrument (125). -
FIGs. 1 and2 of the '089 patent show a wire conductor 20 being embedded in a surface of a substrate 21, by the action of ultrasound.FIG. 3 of the 089 patent shows a wiring device 22 with an ultrasonic generator 34, suitable for embedding the wire. It is believed that the wiring device in the 089 patent can also be used for adhesively placing a wire. -
FIG. 4 of the '089 patent shows a wire conductor 20 on a substrate 42. The substrate 42 has a recess 45. The wire is ultrasonically embedded in the substrate. The wire is not embedded in the recess. In passing over the recess, "the ultrasonic loading of the wire conductor 20 is interrupted while the latter is being guided away via the substrate recess in the course of the wiring operation". (column 9, lines 51-54)FIG. 5 of the 089 patent also shows a coil 50 on a substrate 55 having a recess 56. The coil 50 has an initial coil region 51 and a final coil region 52. As shown inFIG. 6 of the 089 patent, a chip unit 58 may be placed in the substrate recess 56, from a side of the substrate opposite from the coil 50, andFIG. 7 shows subsequent connection of terminal areas of the chip unit to the initial coil region 51 and to the final coil region 52 by means of a thermode 60. - FIGs. 13, 14 and 15 of the '089 patent show a wire 113 on a substrate 111 having a recess 114 to accept a chip 115. The wire has ends 116 and 117. The chip has
terminals 118 and 119. The wire is embedded using an ultrasonic instrument 125. The wire is guided away via the chip 115 that is received in the recess 114. (column 13, lines 65-66) It is discussed that a single ultrasonic instrument can be used both for fixation of the wire and for connection of the wire to the terminals of the chip. (column 15, lines 33-36) - The process described above with reference to FIGS. 14 and 15 of the 089 patent also offers the possibility, by appropriate choice of the points of fixation of the wire conductor on the substrate, of guiding the wire conductor away diagonally via the terminal areas, in order to increase the overlap between the wire conductor and the terminal areas. Also, several chips or other elements arranged in series on, or in, a substrate can be connected by means of the wire conductor in the manner represented in FIG. 14. (column 14, lines 39-47). Of particular interest to the present invention are FIGs. 16 and 17 of the 089 patent.
- FIGs. 16 and 17 of the 089 patent show that a chip 132 is introduced into the recess 114 after fixation of the wire conductor 113 on the surface of the substrate. Ends of the wire pass over the recess, generally in alignment with positions corresponding to terminals on the chip. After the chip is installed (FIG. 16), a connecting instrument enables a connection of the wire conductor to the corresponding terminal area. (Also, as discussed therein, in order to enable a positioning of the chip that is suitable for contacting of the wire conductor, the chip 132 is equipped on its contact side with a bridge-tape alignment aids 135, arranged adjacent to a terminal area, which provide for correct relative positioning via guide bevels 136.
- Laser soldering is a technique where a -30-50 W laser is used to melt and solder an electrical connection joint. Diode laser systems based on semiconductor junctions are used for this purpose. Wavelengths are typically 808nm through 980nm. The beam is delivered via an optical fiber to the workpiece, with fiber diameters 800um and smaller. Since the beam out of the end of the fiber diverges rapidly, lenses are used to create a suitable spot size on the workpiece at a suitable working distance. A wire feeder is used to supply solder. Both lead-tin and silver-tin material can be soldered. Process recipes will differ depending on the alloy composition. For soldering 44-pin chip carriers to a board using soldering preforms, power levels were on the order of 10 Watts and solder times approximately 1 second. Low power levels can lead to incomplete wetting and the formation of voids, both of which can weaken the joint. The following patents and article are incorporated by reference herein: See also Laser-unterstütztes Flip-Chip Bonden, Dr. Mani Alavi, HSG IMIT, LB0100-0300, pages 1-4
- European Patent
EP0947281 discloses device and method for thermo-compression bonding. The arrangement has a wedge (10) which can be applied to a bonding point (14) and an associated optical conductor (19). The conductor is coupled to a laser light (23) source and directed towards a section of bonding wire (13) beneath the wedge between it and the bonding position. The conductor is fed through the wedge to near the bonded wire section so that only this section is heated for thermo-compression bonding when laser energy is coupled in. - European Patent
EP0999729 process for laser soldering and for temperature monitoring of semi-conductor chips, and chip cards manufactured according to this process. A laser beam (32) heats solder (12) applied to a solder point to melting point, and interrupts the beam. The laser beam is applied to the reverse side of a packageless semiconductor chip (10) opposite the side with the solder point. Solder of at least two solder points may be heated simultaneously, or all solder points may be heated at the same time. The laser may be applied for 0.1 to 0.5 seconds, with a focus diameter of 0.1 to 2.0 mm at a power of up to about 10 W. An Independent claim for a method of ending a soldering process during laser soldering of a semiconductor chip is also includedEP-A-1498943 is adenowledged in the preamble of claim 1. - It is a general object of an embodiment of the invention to provide improved techniques for forming inlays.
- According to an embodiment of the invention, a dual interface inlay (200) comprises: a bottom sheet (202); a transponder site (206) on a top surface of the bottom sheet; an antenna wire (210) mounted to the top surface of the bottom sheet; end portions (210a/b) of the antenna wire (210) are formed with squiggles or meanders forming contact areas on opposite sides of the transponder site to provide areas of increased surface area for subsequent attachment of a chip or chip module (240) to the antenna wire; conductive material (212) applied to the end portions of the antenna wire; a top sheet (222) disposed over the
bottom sheet 202 for lamination thereto; and recesses (224a/b) formed in a bottom surface of the top sheet, at positions corresponding to the contact area. A cavity (230) extending through the top sheet (222) allows a chip module (240) to be mounted through the top sheet (222) onto the surface of the bottom sheet, and exposes the contact areas (210a/b). The antenna wire may be embedded or adhesively placed on the surface of the substrate. The antenna wire may be insulated wire, and insulation may be removed from the end portions of the antenna wire. The conductive material on the end portions of the antenna wire may comprise solder balls or flexible solder paste, or conductive glue. Silicon cushions (226a/b) may be disposed in the bottom sheet under the contact areas. A corresponding method is disclosed. - Reference will be made in detail to embodiments of the disclosure, examples of which may be illustrated in the accompanying drawing figures (FIGs). The figures are intended to be illustrative, not limiting. Although the invention is generally described in the context of these embodiments, it should be understood that it is not intended to limit the invention to these particular embodiments.
- Certain elements in selected ones of the figures may be illustrated not-to-scale, for illustrative clarity. The cross-sectional views, if any, presented herein may be in the form of "slices", or "near-sighted" cross-sectional views, omitting certain background lines which would otherwise be visible in a true cross-sectional view, for illustrative clarity. In some cases, hidden lines may be drawn as dashed lines (this is conventional), but in other cases they may be drawn as solid lines.
- If shading or cross-hatching is used, it is intended to be of use in distinguishing one element from another (such as a cross-hatched element from a neighboring un-shaded element). It should be understood that it is not intended to limit the disclosure due to shading or cross-hatching in the drawing figures.
- Elements of the figures may (or may not) be numbered as follows. The most significant digits (hundreds) of the reference number correspond to the figure number. For example, elements of
Figure 1 are typically numbered in the range of 100-199, and elements ofFIG. 2 are typically numbered in the range of 200-299. Similar elements throughout the figures may be referred to by similar reference numerals. For example, the element 199 inFIG. 1 may be similar (and possibly identical) to the element 299 inFIG. 2 . Throughout the figures, each of a plurality of elements 199 may be referred to individually as 199a, 199b, 199c, etc. Such relationships, if any, between similar elements in the same or different figures will become apparent throughout the specification, including, if applicable, in the claims and abstract. -
FIG. 1A is a top view of a transponder site, according to the prior art. -
FIG. 1B is a side, cross-sectional view, partially exploded, of a wire being mounted to the substrate ofFIG. 1A (and bonded to the terminals of the chip), according to the prior art. -
FIG. 2A is a top view of an inlay substrate, according to an embodiment of the invention. -
FIG. 2B is a cross-sectional, exploded view of the inlay substrate ofFIG. 2A , with a top sheet in place, according to the invention. -
FIG. 2C is a cross-sectional, exploded view of the inlay substrate ofFIG. 2B , with a chip module in place, according to the invention. -
FIG. 2D is a top view of the inlay substrate ofFIG. 2A , according to the invention. -
FIG. 2E is a top view of an inlay substrate such asFIG. 2A , according to the invention. -
FIG. 2F is a top view of an inlay substrate such asFIG. 2A , according to the invention. -
FIGs. 3A and 3B are cross-sectional exploded views of an inlay substrate, according to the prior art. -
FIG. 4 is a top view of an inlay substrate, according to an embodiment of the invention. -
FIG. 5 is a top view of an inlay substrate, according to an embodiment of the invention. -
FIG. 6 is a side view of an ultrasonic head (sonotrode) to make a dual connection, according to an embodiment of the invention. -
FIG. 7 is a top view of an inlay substrate, according to an embodiment of the invention. -
FIG. 8 is a top view of an inlay substrate, according to an embodiment of the invention. -
FIG. 9 is a top view of an inlay substrate, according to an embodiment of the invention. -
FIG. 10 is a perspective view of a technique for removing insulation from end portions of an antenna wire of an inlay, according to an embodiment of the invention. -
FIG. 11 is a cross-sectional view of flattening end portions of an antenna wire of an inlay, according to an embodiment of the invention. - In the following description, various aspects of techniques for making dual interface cards will be described. For the purpose of explanation, specific configurations and details are set forth in order to provide a thorough understanding of the techniques. However, it will also be apparent to one skilled in the art that the techniques may be practiced without specific details being presented herein. Furthermore, well-known features may be omitted or simplified in order not to obscure the description(s) of the techniques.
- Various "embodiments" of the invention will be discussed. An embodiment is an example or implementation of one or more aspects of the invention(s). Although various features of the invention may be described in the context of a single embodiment, the features may also be provided separately or in any suitable combination with one another.
- It should be understood that the phraseology and terminology employed herein is not to be construed as limiting, and is for descriptive purposes only.
- As used herein, an "inlay" is a generally planar substrate (or sheet), which may include several (a plurality of) distinct "transponder areas", arranged for example in a 3x6 array on the inlay sheet. The inlay sheet may have one or more (multiple) layers. A "transponder" may be fabricated in each "transponder area". Each "transponder" may include an antenna which is mounted to a surface (such as a top layer) of the substrate, and a "transponder chip" which is installed at a "transponder chip site" (or "site for the transponder chip") on the substrate. The antenna is typically in the form of a flat coil having two ends which are connected to bond pads (terminals) on the "transponder chip". The "transponder chip" may be an individual integrated circuit (IC) chip (such as a naked die or a bumped die), or a chip module (such as a flip chip, interposer, leadframe package) such as a chip mounted to a small substrate or a carrier. The "transponder chip site" of the "transponder" ("transponder area" of the "inlay sheet") may comprise a recess (or window, or opening) extending through the top and one or more underlying layers of the substrate, such that the "transponder chip" can be installed in the recess, submerged below the surface of the "inlay sheet" and supported by an underlying layer of the substrate. A window may extend completely through the inlay sheet so that a transponder chip or chip module may be installed from an opposite (from the antenna) side of the inlay sheet. The following terminology may be used herein to describe embodiments of the invention.
- When the term "inlay" is used herein, it may be taken to include any generally planar substrate, typically credit-card sized, made of a synthetic material or a coated non-synthetic material, such as paper. An inlay has an array of transponder sites, the format can be 3 x 6 for a card manufacturer. An inlay will typically comprise a (planar) substrate, a transponder (or RFID) chip, and an antenna (typically a flat coil of wire, having two ends).
- When the term "substrate" is used herein, it should be taken to include non-conductive material, synthetic material, paper but also material coated with ferrite to create a Faraday cage or material used on stealth aircraft (to absorb or reflect electromagnetic waves). The substrate may be a multi-layer substrate (such as shown in
FIG. 1B ). - A suitable material for any of the substrates discussed herein is TESLIN, TYVEK, PC, PVC, PE, PET, PETE, Paper, C-FLEX, Paper or Cotton/Noil etc. in sheet format or endless roll (web) can be coated with adhesive film to protect the first chip and to support the process for manufacturing the inlay at the secure printing office. The substrate can also have special markings such as luminous threads, water marks, microscopic filings and optical polymer memory for additional security. The antenna wire could be stamped with an 11 digit identification code and the inlay could have a ultra-violet strip which would break if anyone attempted to peel off a substrate layer. An LED could be incorporated into the inlay which would illuminate during data communication. A typical thickness for the substrate for passport inlays can be between 360 and 750 microns.
- PVC
- short for polyvinyl chloride, (IUPAC Polychloroethene). PVC is a widely used thermoplastic polymer. It can be made softer and more flexible by the addition of plasticizers, the most widely used being phthalates.
- PET
- short for Polyethylene terephthalate (also know as PET, PETE or the obsolete PETP or PET-P). PET is a thermoplastic polymer resin of the polyester family that produced by the chemical industry and is used in synthetic fibers; beverage, food and other liquid containers; thermoforming applications; and engineering resins often in combination with glass fiber. It is one of the most important raw materials used in man-made fibers.
- PETE
- see PET.
- Teslin™
- Teslin is a synthetic printing media, manufactured by PPG Industries. Teslin is a waterproof synthetic material that works well with an Inkjet printer, Laser printer, or Thermal printer. Teslin is also single-layer, uncoated film, and extremely strong. In fact, the strength of the lamination peel of a Teslin sheet is 2-4 times stronger than other coated synthetic and coated papers. Teslin comes in the sizes of 7 mil to 18 mil, though only sizes 10 mil and 14 mil are sized at 8.5" by 11", for printing with most consumer printers. Also available are perforated versions of Teslin, specifically, 2up, 6up, and 8up.
- Tyvek™
- Tyvek is a brand of spunbonded olefin, a synthetic material made of high- density polyethylene fibers; the name is a registered trademark of the DuPont Company. The material is very strong; it is difficult to tear but can easily be cut with scissors or any other sharp object. Water vapor can pass through Tyvek, but not liquid water, so the material lends itself to a variety of applications: medical packaging, envelopes, car covers, air and water intrusion barriers (housewrap) under house siding, labels, wristbands, mycology, and graphics.
- When the term "transponder" is used herein, it may be taken to include any chip suitable for use in an inlay, such as an RFID chip.
- When the term "chip" is used herein, it may be taken to include a chip module, or a chip unit. Generally, as used herein, "chip" is intended to mean RFID or transponder chip. Also, where applicable, "chip" may refer to a die, chip module or carrier or "strap".
- Regarding metalized bumps on chips, normally chips (also referred to as "dice", plural of "die") have aluminum pads 100 x 100 microns in dimension. Gold bumps may be sputtered or plated onto the aluminum pads and rise 25 microns above the pads. Enhanced pads or so-called "mega bumps" can be large and can be mounted over the active structure of a die.
- When the term "wire" is used herein, it may be taken to include any elongate means for conveying or radiating signals, such as metallic wire (such as gold, aluminium, copper, silver), of any profile (such as round or rectangular), either bare, coated or colour coated, as well as optical fibers.
- When the term "antenna" is used herein, it may be taken to include a simple coil antenna comprising wire having a number of turns, and two ends, a dipole antenna having two wire segments with two inner ends, or any other antenna configuration suitable for connection to a chip or chip module in an inlay.
- When the term "mounting" is used herein (in conjunction with wire) it may be taken to include embedding or countersinking the wire into a surface of the inlay substrate and/or adhesively placing (bonding or sticking) the wire to the surface of the substrate. In some contexts, the term "embedding" may be be taken to include adhesively placing, if appropriate in the context (such as when describing mounting a self-bonding wire) - in other words, "embedding" may sometimes be used to mean "mounting" (which includes both "embedding" and "adhesively placing").
- When the term "bonding" is used herein, it may be taken to include any means of interconnecting (or simply "connecting"), both physically and electrically, a wire, or an end of the wire, or an end portion of the wire, to a terminal or connection pad on a chip or chip module. (Bonding typically comprises a kind of welding, but can include adhesively bonding and soldering.) The interconnection process can for example be inner lead bonding (heated diamond tool), thermal compression bonding (thermode), ultrasonic bonding or laser welding.
- Generally, as used herein describing embodiments of the invention, the "transponder chip" is an electronic component comprising (having at least) two terminals, which may be a single chip, or a module comprising (having at least) a chip. Generally, the two terminals of the chip or module are interconnected with corresponding two end portions of the antenna wire which is mounted to a top surface of a substrate, which may be a multilayer substrate.
- The present invention of the dual interface inlay may help to resolve the unreliable interconnection between the antenna and the contact chip module as well as the chip breakage problem during lamination.
- Firstly, an antenna is embedded into each site on a non-conductive sheet and squiggles or meanders are formed at the position where the face down pads of the contact chip module will reside. Secondly, the insulation of the wire conductor is removed from the squiggles using an ultra violet laser. After the laser treatment, a solder ball or flexible solder paste is applied to the un-insulated squiggles. Thirdly, recesses or indents are created in a top sheet at the position of the solder by applying ultrasonic energy to the sheet, resulting in the compression of the material, alternatively material can be removed from the top sheet mechanically or through laser ablation. Fourthly, the top sheet is placed over the lower sheet with the array of antennae sites and laminated to form a dual interface inlay.
- The ends of the antenna wire form a contact area larger than the diameter of the wire due to the fact that the area of the wire squiggles or meanders, for example, is 5-10 times larger than the wire diameter. After forming one meander pattern, a second meander pattern can be formatted atop the previous meander pattern to increase the thickness of the contact area, in which case insulation should be removed from the wire prior to forming the meanders. Insulation removal can be performed while laying the wire. Or, insulation removal may be performed after laying the wire. The net result of forming the meander pattern, removing insulation and treating the surface with solder or metallizing the surface is to create enlarged planar pads for interconnecting an antenna with a contact chip module or any type of chip package including a naked die with or without bumps.
- At the secure printers, the inlay is laminated to an upper and lower printed sheet (incl. an anti-scratch overlay) and then each site in the array is punched to release a single card body. In the next step of the process, a cavity or recess to accommodate the contact chip module is milled out of the card body to a depth where the solder points on the wire ends of the antenna (as squiggles) are positioned. The contact chip module is then bonded to the antenna using a hot iron to solder the module to the antenna.
- In another embodiment of the invention, the area surrounding the soldered squiggles is made to float within the card body, resulting in a flexible connection to the contact chip module. This is achieved by placing silicon cushions or patches under the sheet at the position of the squiggles, which prevents the sheet material from joining with the lower layers of the inlay during lamination.
- An ultraviolet (UV) laser can also be used to engrave a production code into the non-conductive substrate.
- The contact chip module as described above avails of a printed circuit board for mounting of the die and an epoxy globe top to protect the wire bonds. To increase the flexibility of the contact chip module, the die can be mounted on a Kapton material with a thickness of about 30 microns. The contact pads on the face up side can be silver or gold.
- The following terminology may be used throughout the descriptions set forth herein. As used herein, an "inlay" is a generally planar substrate, which may include several (a plurality of) distinct "transponder areas" (or "transponder sites"), arranged for example in a 3x6 array.
- The substrate may have one or more (multiple) layers. A "transponder" may be fabricated in each "transponder area". Each "transponder" may include an antenna which is mounted to a surface (such as a top layer) of the substrate, and a "transponder chip" which is installed at a "transponder chip site" (or "site for the transponder chip") on the substrate.
- The antenna is typically in the form of a flat coil having two ends which are connected to bond pads on the "transponder chip". The "transponder chip" may be an individual integrated circuit (IC) chip, or a chip module. A "transponder chip site" of the "transponder area" may comprise a recess extending through the top and one or more underlying layers of the substrate, such that when the "transponder chip" is installed in the recess, it can be supported by an underlying layer of the substrate.
- A "contact chip module" refers to a standard dual interface module with ISO 7816 connections for interfacing with a mechanical reader and face down bonding pads for interconnecting with the terminal areas of an antenna sandwiched between several layers of synthetic material. A contact chip module can also refer to a leadframe, flip chip or interposer module.
- A "dual interface inlay" refers to a chip card that has an electronic chip with a memory, contacts and contactless transmission means such as coils and/or condensers which are embedded in the card material and which, for purposes of supplying energy to the chip, exchange energy and bi-directional data with a terminal via the contacts or else contact-free. The chip of the chip card has an electronic circuit which generates a logical signal that, depending on the occurrence of voltage at the contacts or at a coil, is logically "high" or logically "low". As a result, the chip card is autonomously capable of deciding whether it is being addressed via the contact-coupled segment or via the contactless segment and consequently, it functions accordingly A dual interface inlay chip card is described in
DE 39 35 364 , incorporated by reference herein. - When the term "solder ball bonding" is used herein, it may taken to mean the placement of solder beads on the contact areas of a chip module or carrier by means of a singling-out device as described in
US 6,152,348 and connected to said contact area, for example by means of a laser. - When the term "laser bonding or welding" is used herein, it may be taken to include the interconnection of a leadframe chip module with a metalized contact surface area, whereby the laser beam is directed to the leadframe which results in localized heating and thus bonding of the metalized contact area to the leadframe. Alternatively, a minute hole can be provided in the leadframe and the laser beam is directed to the hole resulting in the bonding of the metalized contact area to the leadframe. In other words, direct or indirect bonding by means of a laser beam.
-
FIG. 2A illustrates adual interface inlay 200. Theinlay 200 will comprise various laminated sheets, and may be in credit card format. A given inlay may be a given transponder site where a dual interface chip module will reside after completing the lamination stage with the printed graphics, and punching individual card bodies from the sheet with the array of sites. - An
antenna wire 210 is "mounted" to a top (as viewed) surface of a bottom sheet (substrate) 202 which includes "embedding" (countersinking) the antenna wire into the surface of the substrate, or "adhesively placing" (adhesively sticking) the antenna wire on the surface of the substrate. The antenna may be a HF antenna with a number of turns, such as 4 or 5. - The
substrate 202 may be of a synthetic material, such as PVC, in a credit card format, and may have a thickness of approximately 250 µm (microns). -
End portions antenna wire 210 are formed with squiggles or meanders to provide an area of increased surface area for subsequent attachment of a chip (or chip module) to theantenna 210. These squiggles or meanders may be considered to be "contact areas", and are generally located on opposite sides of atransponder site 206 on the surface of thebottom sheet 202 where a chip (or chip module) 240 (FIG. 2C ) will be mounted. Thetransponder site 206 need not be, and generally is not a recess. Rather, thetransponder site 206, shown in dashed lines, is merely a defined location on thesubstrate 202. - The
antenna wire 210 may be insulated wire, and insulation from theend portions -
FIG. 2B illustrates a cross section of thedual interface inlay 200. Atop sheet 222 is positioned over thebottom sheet 202, and will be laminated thereto. - The
antenna wire 210 andsquiggle end portions antenna wire 210 are visible on the top (as viewed) surface of thebottom sheet 202. A dollop ofconductive material 212 is applied to at least a portion of the top surfaces of thesquiggles squiggle end portions antenna wire 210. Theconductive material 212 forms what may be considered to be planar pads on thesquiggles -
Recesses top sheet 222, at positions corresponding to thesquiggles recesses top sheet 222 are for the purpose of protecting the solder area, after lamination. - The
recesses squiggles top sheet 222 is laminated to thebottom sheet 202, the squiggles and solder paste will remain undisturbed. For example, a contact are formed by a squiggle may measure 4 x 5 mm. The antenna wire may have a thickness (diameter) of 112 microns. A recess may measure 8 x 10 mm, and have a depth of 125 microns. - Note that the squiggles may form a greater area than the required area for interconnection and therefore the solder balls, solder paste or conductive glue does not need to cover the entire area of the squiggles, just sufficient to make contact with the face down pads of the contact chip module. See
FIG. 2D . Also, as mentioned above, a second meander pattern (second layer of squiggles) can be formatted atop the previous meander pattern to increase the thickness of the contact area. - Silicon cushions 226a and 226b may be provided in the
bottom sheet 202, under the contact areas (under thesquiggles - An
overlay sheet 228 is disposed below thebottom sheet 202, for example to cover recesses in the bottom surface of thebottom sheet 202 into which thesilicon cushions - The
top sheet 222 is laminated to the top of thebottom sheet 202. Theoverlay sheet 228 is laminated to the bottom of thebottom sheet 202. -
FIG. 2B shows what may be considered to be an interim product (which may itself be referred to as the "inlay"), which can be shipped, later to have a chip module installed. -
FIG. 2C illustrates that acavity 230 may be milled, extending through thetop sheet 222 to (i) allow achip module 240 to be mounted through thetop sheet 222 onto thebottom sheet 202, and (ii) to expose thecontact areas - Regarding the latter (ii), in this milling process, it is desired not to disturb the contact areas, only milling sufficiently to expose the
recesses - Regarding the former (i), in a central area, between the
contact areas top sheet 222 and into thebottom sheet 202, and may form a cavity (or recess) 232 in the bottom sheet for accepting themold mass 246 of achip module 240. - The
chip module 240 may comprise: - a
substrate 242, such as 14 x 11 mm - a
chip 244 covered by amold mass 246 and connected to conductive traces (not shown) on thesubstrate 242 - a
mold mass 246 covering thechip 244 - "face-up"
terminals substrate 242 for connecting to thecontact areas - "face-down"
terminals 250 on the top (as viewed) surface of the substrate for making contact connections with external apparatus, such as automatic teller machines (ATM). - The
chip module 240 is inserted through thetop sheet 222, into (through) thecavity 230. Adhesive 251 may secure themold mass 246 to the bottom of the milled outrecess 232 in the top surface of thebottom sheet 202. A hot bond tool may be used to effect connection of theterminals 238a and 248b with thecontact areas - The
dual interface inlay 200 further comprises: - an upper printed laminate (UPL) 252 disposed on the
top sheet 222 with anopening 254 large enough for the face-down terminals (contacts) 250 to be exposed. - a lower printed laminate (LPL) 256 disposed under the
overlay sheet 228. -
FIG. 2D illustrates thedual interface inlay 200 having anantenna wire 210 mounted (such as by embedding) to asubstrate 202 formed of a synthetic material.Terminal areas wire conductor 210. -
FIG. 2D is essentially the same asFIG. 2A , but with the metallization 212' (compare 212,FIG. 2B ) on thesquiggles - Insulation may be removed from the end portions of the wire conductor before or after embedding. The insulation may be removed with a laser under a gas atmospheric condition so as to avoid oxidization of the wire conductor.
- The "naked" (insulation removed) end portions of the wire conductor (that is, at least a portion of each enlarged connection area) may be metalled with a bondable material, such as solder (lead-tin) 312.
- In this manner, a die with terminals (or bumps) may be "flip-chip" mounted to the substrate.
- In addition to the
conductive material 212 on the squiggles, theterminals balls 213 to enhance the interconnection, and a laser may be used to bond the terminal areas 248 with 212. SeeFIG. 2E (elements - A two-part (A+B) conductive adhesive system could also be used to effect the interconnection, with "part A" 215 on the
terminals squiggles FIG. 2F (elements - Generally, in contrast with the prior art, the dual interface inlay has:
- insulation removed from the wire by means other than milling, such as by using a laser
- silicon cushions under the contact areas in the bottom sheet
- recesses in the top sheet for capturing (without disturbing) the solder on the contact areas
- optionally solder balls attached to the terminal areas of the chip module and laser connected to the underlying contact areas of the antenna
-
FIGs. 3A and 3B are cross-sectional exploded views of an inlay substrate, according to the prior art, and correspond approximately toFIGs. 2C and2D to illustrate the differences. - The inlay 300 (compare 200) in its final form comprises:
- a bottom sheet 302 (compare 202)
- a transponder site (not shown, compare 206)
- an antenna wire 310 (compare 210)
-
end portions antenna wire 310 formed with squiggles - a top sheet 322 (compare 222)laminated onto the
bottom sheet 302 - an opening 230 (compare 230) is milled in the top 272
- an overlay sheet 278 is disposed below the
bottom sheet 252 - an upper printed laminate (UPL) 352 (compare 252) with an opening 354 (compare 254)
- a chip module 340 (compare 240) having a mold mass 346 (compare 246) with a chip 344 (compare 244) inside, inserted through the opening in
top sheet 322 - a recess 332 (compare 232) in the
bottom sheet 302 for accepting themold mass 346 - terminals 350 (compare 250) on the top of the
chip module 340, andterminals chip module 340 - adhesive 351 (compare 251) to secure the
mold mass 346 to thebottom sheet 302 - an upper printed laminate 352 (compare 252) with an opening 354 (compare 254) large enough for the
contacts 350 to be exposed. - a lower printed laminate (LPL) 356 (compare 256)
- Some specific points of difference are:
- The
end portions 310a/b of theantenna wire 310 are not covered with solder (compare 212). - The
top sheet 322 does not have recesses (compare 224a/b) in its bottom surface. - Insulation is removed from the squiggles during the milling process (see dashed lines).
- There are no silicon cushions (compare 226a and 226b) in the
bottom sheet 202, under the contact areas -
FIG. 4 illustrates an inlay 400 (compare 200) which is not dual interface. Theinlay 400 is contactless only (not contact). - The
inlay 400 has an antenna wire 410 (compare 210) mounted (such as by embedding) to a substrate 402 (compare 202) formed of a synthetic material, such as Kapton. -
Metal pads enlarged contact areas 310a/310b and 210a/210b discussed hereinabove. Themetal pads enlarged contact areas 310a/310b and 210a/210b discussed hereinabove. The metal pads may be gold-plated nickel/copper. -
End portions antenna wire 410 are bonded, such as by means of thermal-compression bonding, to themetal pads FIG. 6 . - An
RFID chip 430 is disposed on the substrate 402 between themetal pads chip 430 may be connected withbond wires 432 to themetal pads chip 430,bond wires 432 andmetal pads 420a/b. - This embodiment is contactless only. There are no contacts (compare 250) on the front (circuitized) face of the
RFID chip 430. - In this embodiment, the inlay substrate 402 is functioning as a carrier, and no separate carrier is needed for the
chip 430. -
FIG. 5 illustrates an inlay 500 (compare 400) which is not dual interface. Theinlay 500 is contactless only (not contact). - The
inlay 500 has an antenna wire 510 (compare 410) mounted (such as by embedding) to a substrate 502 (compare 402) formed of a synthetic material, such as Kapton. -
Metal pads enlarged contact areas 310a/310b and 210a/210b discussed hereinabove. Themetal pads metal pads -
End portions antenna wire 510 are bonded, such as be thermo-compression bonding, to themetal pads FIG. 6 . - A
chip module 530 is disposed on thesubstrate 502 between themetal pads chip module 530 may be a leadframe, flip chip or interposer. Thechip module 530 may be connected to themetal pads chip module 530, connections 532 andmetal pads 520a/b. - This embodiment is contactless only. There are no contacts (compare 250) on the front (circuitized) face of the
chip module 530. - In this embodiment, the
inlay substrate 502 is not functioning as a carrier, since a separate carrier (530) is provided. - Note that after the interconnection of the antenna wires with the contact areas of the metal pads or the terminal areas of a chip or chip module, the area can be sealed with silicon to ensure that moisture does not enter the bond area.
-
FIG. 6 illustrates an ultrasonic bonding tool (head) 600 to simultaneously interconnect the two end portions of the antenna wire to themetal pads 420a/b and 520a/b, as mentioned above. (It should be understood that the two connections could be done one at a time, without this tool.) - Generally, the
bonding head 600 comprises anelongate body portion 602 having atop end 602a and abottom end 602b. Thetop end 602a may have a threadedhole 604 to be mounted to an ultrasonic transducer (not shown). - The
bottom end 602b may be forked, having twoelongate end effectors body portion 602. - A distance "S" between the two
end effectors - The
tool 600 may be designed to operate at 60 kHz. - A wire (such as 410 or 510) being bonded using this
tool 600 may, for example, be 60 micron gold wire. -
FIG. 7 illustrates a dual interface inlay 700 (compare 200) having an antenna wire 710 (compare 210) mounted (such as by embedding) to a substrate 702 (compare 202) formed of a synthetic material.Terminal areas wire conductor 710. -
FIG. 7 may be considered to be a variation onFIG. 2D , but with a bumpedchip 730 placed face down on the enlargedplanar pads 712 for interconnection. The method of connection can be performed by thermal compression bonding in which a hot diamond tool (450° C) exerts pressure against the die and connections pads, to form the bonding process. - The
interconnected chip 730 may be encapsulated in an epoxy medium or moulded as a package. -
FIG. 8 illustrates an inlay 800 (compare 400) which is not dual interface. Theinlay 800 is contactless only (not contact).FIG. 8 is essentially a variation onFIG. 4 . - The
inlay 800 has an antenna wire 810 (compare 410) mounted (such as by embedding) to a substrate 802 (compare 402) formed of a synthetic material, such as Kapton. - Here, the
end portions antenna wire 810 are not squiggles (such as 310a and 310b), nor are there metal pads (420a and 420b). Rather, theend portions antenna wire 810 are prepared for an inner-lead bonding process, in which the round wire conductor is first flatten to create a rectangular wire, the insulation is removed before or after embedding and flattening and finally the wire conductor is treated under an atmospheric condition to enable an oxide free surface to be attained. Theantenna wire 810 may, for example be 112µm in diameter before flattening, and 150µm in diameter after flattening. - In a next step, an RFID chip 830 (compare 430) may be chip is connected with
bond wires 832 to the flattenedend portions antenna wire 810. After wire bonding, a mold mass (not shown) may be disposed over thechip 430,bond wires 432 and flattenedend portions antenna wire 810. (Theinterconnected chip 830 may be encapsulated in an epoxy medium or moulded as a package.) -
FIG. 9 illustrates a dual interface inlay 900 (compare 700) having an antenna wire 910 (compare 710) mounted (such as by embedding) to a substrate 902 (compare 702) formed of a synthetic material. - In a manner similar to
FIG. 8 ,end portions -
FIG. 9 may be considered to be essentially a variation onFIGs. 7 , but with the bumped chip 930 (compare 730) placed face down flattened end portions of the antenna wire 910 rather than (squiggles and conductive mass 712) for interconnection. The method of connection can be performed by thermal compression bonding in which a hot diamond tool (450° C) exerts pressure against the die and connections pads, to form the bonding process. - The
interconnected chip 930 may be encapsulated in an epoxy medium or moulded as a package. - Note that in the case of bonding naked dice or bumped dice, a hot plate can be used to heat the dice before wire bonding or inner-lead bonding.
- An antenna wire (such as 210, 310, 410, 510, 710, 810, 910) is usually an insulated wire, having one or more coatings to assist (for example) in mounting by adhesively placing the antenna wire on the substrate, the coating(s) (self bonding coat and insulation layer) should be removed prior to bonding. Removal of the coating(s) (insulation) from an insulated wire (importantly from end portions of the wire that will be bonded to the terminal(s) of the transponder chip) are discussed in greater detail hereinbelow (and may involve using apparatus such as a laser or a hot iron to remove the coating(s)), and can be done (performed) either during mounting the antenna wire, or after having mounted the antenna wire such as over slots through the substrate. A mirrored surface under the slots can also be used, in conjunction with a vision system, to ensure that the insulation is completely removed.
-
FIG. 10 illustrates a technique for removing insulation from wire bridges, according to an aspect of the invention. This example of removing insulation is in the context of a transponder inlay such as inFIG. 1 , but the principle is analogous to what may be used for the dual interface inlays described herein. - A substrate 1002 has a recess 1006 (compare 106), which may include slots (1007a, 1007b). (In this example, the
recess 1006 is rectangular, for illustrative purposes.)End portions antenna wire 1010, which are "wire bridges", span the recess 1006 (or slots). Prior to installing a chip (not shown, see 108) into the recess 1906, a laser 1060 (such as a UV laser) may be used to direct a beam of light 1062 at thewire bridges - In the context of a dual interface inlay, comparable slots or openings can be made in the substrate under the end portions of the antenna wire to accommodate laser removal of insulation.
- It may be advantageous to use an ultra-violet (UV) laser to remove the insulation. The UV laser uses optical directing systems to remove the insulation, and the wire can be flooded (or protected by) with an inert gas, such as nitrogen, to avoid oxidation of the bare (such as copper) wire.
- An antenna wire is typically round in cross-section. The wire can be flattened, as described above (
FIG. 8 andFIG. 9 ). -
FIG. 11 illustrates a technique for flattening end portions of an antenna wire, according to an aspect of the invention. This example of flattening end portions of an antenna wire is in the context of a transponder inlay such as inFIG. 1 , but the principle is analogous to what may be used for the dual interface inlays described herein. - Slots extending all the way through the substrate provide an opportunity to flatten the otherwise round cross-section wire, before bonding the wire to the terminals of the transponder chip (or chip module). This can be accomplished with the substrate on a workplate (anvil), and impacting the wire from above with a punch.
-
FIG. 11 illustrates a technique for shaping (flattening) the wire, in preparation for bonding. A substrate 1104 (compare 104) has a recess 1106 (compare 106) extending throughupper layers 1104a (compare 104a) thereof, andslots recess 1106 completely through thesubstrate 1104, includingbottom layers 1104b (compare 104b) thereof.End portions slots - Before installing a chip 1108 (compare 108) in the
recess 1106, apunch 1170 is brought down on thewire bridges surface 1172 functioning as an anvil, having raisedportions slots - This shaping (flattening) step can be done before or after the step of removing insulation from the wire bridges. In this figure, the
wire bridge 1110a is shown as having already been flattened, and thewire bridge 1110b is in the process of being flattened. - In the context of a dual interface inlay, comparable slots or openings can be made in the substrate under the end portions of the antenna wire to accommodate flattening of the wire.
- While the invention has been described with respect to a limited number of embodiments, these should not be construed as limitations on the scope of the invention, but rather as examples of some of the embodiments. Those skilled in the art may envision other possible variations, modifications, and implementations that are also within the scope of the invention, being determined by the appended claims.
Claims (15)
- A dual interface inlay (200) comprising:a bottom sheet (202);a transponder site (206) on a top surface of the bottom sheet;an antenna wire (210) mounted to the top surface of the bottom sheet;end portions (210a/b) of the antenna wire (210) are formed with squiggles or meanders forming contact areas on opposite sides of the transponder site to provide areas of increased surface area for subsequent attachment of a chip or chip module (240) to the antenna wire; characterized by conductive material (212) applied to the end portions of the antenna wire;a top sheet (222) disposed over the bottom sheet (202) for lamination thereto; andrecesses (224a/b) formed in a bottom surface of the top sheet, at positions corresponding to the contact areas.
- The inlay of claim 1, wherein:the bottom sheet comprises a synthetic material, such as PVC, in a credit card format.
- The inlay of claim 1, wherein:the conductive material on the end portions of the antenna wire comprises solder balls or flexible solder paste, or conductive glue.
- The inlay of claim 1, further comprising:silicon cushions (226a/b) disposed in the bottom sheet under the contact areas.
- The inlay of claim 1, further comprising:an overlay sheet (228) disposed below the bottom sheet, and preferably further comprising a lower printed laminate (256) disposed under the overlay sheet (228).
- The inlay of claim 1, wherein:the chip module (240) comprises:a substrate (242);a chip (244) covered by a mold mass (246) and connected to conductive traces on the substrate (242);"face-up" terminals (248a/b) disposed on a bottom surface of the substrate (242) for connecting to the contact areas (210a/b), respectively; and"face-down" terminals (250) on a top surface of the substrate (242) for making contact connections with external apparatus, such as automatic teller machines (ATM).
- The inlay of claim 6, further comprising:a recess (232) in the top surface of the bottom sheet for accepting the mold mass (246).
- The inlay of claim 6, further comprising:solder paste or balls (213) disposed on the face-up terminals (248a/b).
- The inlay of claim 6, further comprising:part A (215) of a two-part conductive adhesive system disposed on the "face-up" terminals (248a/b); andpart B (217) of the two-part conductive adhesive system disposed on the contact areas (210a/b).
- The inlay of claim 6, further comprising:an upper printed laminate (252) disposed on the top sheet (222) with an opening (254) large enough for the "face-down" terminals (250) to be exposed.
- The inlay of claim 1, further comprising:adhesive (251) securing the mold mass (246) to the bottom sheet (202).
- A method of making a dual interface inlay (200) comprising:mounting an antenna wire (210) to a bottom sheet (202);forming end portions (210a/b) of the antenna wire with squiggles or meanders to provide contact areas of increased surface area for subsequent attachment of a chip or chip module (240) to the antenna wire;applying conductive material (212) to the end portions of the antenna wire;disposing a top sheet (222) over the bottom sheet (202) for lamination thereto; andforming recesses (224a/b) in a bottom surface of the top sheet, at positions corresponding to the contact areas.
- The method of claim 12, further comprising:removing insulation from the end portions of the antenna wire.
- The method of claim 12, wherein:the conductive material on the end portions of the antenna wire comprises solder balls or flexible solder paste, or conductive glue.
- The method of claim 12, further comprising:providing a cavity (230) extending through the top sheet; andmounting a chip module (240) through the top sheet (222) onto the bottom sheet.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US93845407P | 2007-05-17 | 2007-05-17 | |
US12/117,748 US7980477B2 (en) | 2007-05-17 | 2008-05-09 | Dual interface inlays |
PCT/EP2008/055902 WO2008141990A1 (en) | 2007-05-17 | 2008-05-14 | Dual interface inlays |
Publications (3)
Publication Number | Publication Date |
---|---|
EP2147401A1 EP2147401A1 (en) | 2010-01-27 |
EP2147401B1 true EP2147401B1 (en) | 2011-01-26 |
EP2147401B2 EP2147401B2 (en) | 2013-08-21 |
Family
ID=40026502
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP08759585.6A Not-in-force EP2147401B2 (en) | 2007-05-17 | 2008-05-14 | Dual interface inlays |
Country Status (5)
Country | Link |
---|---|
US (1) | US7980477B2 (en) |
EP (1) | EP2147401B2 (en) |
AT (1) | ATE497223T1 (en) |
DE (1) | DE602008004762D1 (en) |
WO (1) | WO2008141990A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011009577A1 (en) * | 2011-01-27 | 2012-08-02 | Texas Instruments Deutschland Gmbh | RFID transponder and method for connecting a semiconductor die to an antenna |
Families Citing this family (80)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7586193B2 (en) * | 2005-10-07 | 2009-09-08 | Nhew R&D Pty Ltd | Mm-wave antenna using conventional IC packaging |
US8608080B2 (en) | 2006-09-26 | 2013-12-17 | Feinics Amatech Teoranta | Inlays for security documents |
HK1109708A2 (en) * | 2007-04-24 | 2008-06-13 | On Track Innovations Ltd | Interface card and apparatus and process for the formation thereof |
DE602007010634D1 (en) * | 2007-09-18 | 2010-12-30 | Baile Na Habhann Co Galway | Method for contacting a wire conductor laid on a substrate |
US9257751B2 (en) * | 2008-03-14 | 2016-02-09 | Nitero Pty Limited | Integration of microstrip antenna with CMOS transceiver |
CN102047403A (en) * | 2008-06-02 | 2011-05-04 | Nxp股份有限公司 | Electronic device and method of manufacturing an electronic device |
FR2947392B1 (en) * | 2009-06-29 | 2019-05-10 | Idemia France | METHOD FOR ELECTRICALLY CONNECTING TWO ORGANS BETWEEN THEM |
EP2296109B8 (en) * | 2009-09-04 | 2014-08-27 | STMicroelectronics International N.V. | Dual interface IC card and method for producing such a card |
US8366009B2 (en) | 2010-08-12 | 2013-02-05 | Féinics Amatech Teoranta | Coupling in and to RFID smart cards |
US8474726B2 (en) | 2010-08-12 | 2013-07-02 | Feinics Amatech Teoranta | RFID antenna modules and increasing coupling |
US9119667B2 (en) * | 2010-05-12 | 2015-09-01 | Haldor Advanced Technologies L.T.D. | Device and method for attaching a tag to a tool |
FR2962579A1 (en) * | 2010-07-12 | 2012-01-13 | Ask Sa | RADIO FREQUENCY IDENTIFICATION DEVICE OF POLYCARBONATE AND METHOD OF MANUFACTURING THE SAME |
GB201012012D0 (en) * | 2010-07-16 | 2010-09-01 | Novalia Ltd | Laminate |
US9112272B2 (en) | 2010-08-12 | 2015-08-18 | Feinics Amatech Teoranta | Antenna modules for dual interface smart cards, booster antenna configurations, and methods |
US8870080B2 (en) | 2010-08-12 | 2014-10-28 | Féinics Amatech Teoranta | RFID antenna modules and methods |
US8991712B2 (en) | 2010-08-12 | 2015-03-31 | Féinics Amatech Teoranta | Coupling in and to RFID smart cards |
US9033250B2 (en) | 2010-08-12 | 2015-05-19 | Féinics Amatech Teoranta | Dual interface smart cards, and methods of manufacturing |
US9195932B2 (en) | 2010-08-12 | 2015-11-24 | Féinics Amatech Teoranta | Booster antenna configurations and methods |
US8789762B2 (en) | 2010-08-12 | 2014-07-29 | Feinics Amatech Teoranta | RFID antenna modules and methods of making |
KR101012710B1 (en) * | 2010-10-11 | 2011-02-09 | 주식회사 퍼시픽카드 | A combine structure ic chip with antenna coil for plastic card inlay sheet |
CN102024176A (en) * | 2010-12-09 | 2011-04-20 | 武汉天喻信息产业股份有限公司 | Manufacturing method of double-interface smart card |
CA2826196A1 (en) | 2011-01-31 | 2012-08-09 | American Bank Note Company | Dual-interface smart card |
EP2492847A1 (en) * | 2011-02-25 | 2012-08-29 | NagraID S.A. | Card comprising a transponder |
CN102789589B (en) * | 2011-05-17 | 2015-02-11 | 上海芯坤电子技术有限公司 | Intelligent dual-interface card and welding packaging process for intelligent dual-interface card |
MY164922A (en) * | 2011-06-10 | 2018-02-15 | Iris Corp Berhad | Method of thermocompression bonding of laser-etched copper pads to cob module |
US9639799B2 (en) | 2011-08-01 | 2017-05-02 | Avery Dennison Retail Information Services, Llc | System, method and apparatus for matrix-less inlay design |
US10867235B2 (en) | 2011-08-08 | 2020-12-15 | Féinics Amatech Teoranta | Metallized smartcard constructions and methods |
BR112014003130A2 (en) | 2011-08-08 | 2017-06-06 | Féinics Amatech Teoranta | coupling enhancements to and from rfid smart cards |
CN103930906A (en) | 2011-08-08 | 2014-07-16 | 菲尼克斯阿美特克有限公司 | Improving coupling in and to RFID smart cards |
US9390364B2 (en) | 2011-08-08 | 2016-07-12 | Féinics Amatech Teoranta | Transponder chip module with coupling frame on a common substrate for secure and non-secure smartcards and tags |
MX336040B (en) | 2011-09-11 | 2016-01-07 | Feinics Amatech Teoranta | Rfid antenna modules and methods of making. |
DE102011114635A1 (en) * | 2011-10-04 | 2013-04-04 | Smartrac Ip B.V. | Chip card and method for producing a chip card |
US8649820B2 (en) | 2011-11-07 | 2014-02-11 | Blackberry Limited | Universal integrated circuit card apparatus and related methods |
TWI453677B (en) * | 2011-12-01 | 2014-09-21 | Mutual Pak Technology Co Ltd | Radio frequency identification tag and cloth having the same |
US10235543B2 (en) * | 2011-12-13 | 2019-03-19 | Infineon Technologies Ag | Booster antenna structure for a chip card |
EP2605188A1 (en) * | 2011-12-14 | 2013-06-19 | Gemalto SA | Method for manufacturing chip cards |
EP2618292A1 (en) | 2012-01-17 | 2013-07-24 | Assa Abloy Ab | Dual interface card with metallic insert connection |
AU2013211649A1 (en) | 2012-01-23 | 2014-07-31 | Feinics Amatech Teoranta | Offsetting shielding and enhancing coupling in metallized smart cards |
CA2860936A1 (en) | 2012-02-05 | 2013-08-08 | Feinics Amatech Teoranta | Rfid antenna modules and methods |
US9178265B2 (en) * | 2012-02-09 | 2015-11-03 | Hid Global Gmbh | Anti-crack means for wire antenna in transponder |
US9652705B1 (en) * | 2012-02-21 | 2017-05-16 | Automated Assembly Corporation | RFID tag on flexible substrate arrangement |
DE102012203265B4 (en) | 2012-03-01 | 2021-09-23 | Bundesdruckerei Gmbh | Contactless data transmission device and value and / or security document containing it |
USD703208S1 (en) | 2012-04-13 | 2014-04-22 | Blackberry Limited | UICC apparatus |
US8936199B2 (en) | 2012-04-13 | 2015-01-20 | Blackberry Limited | UICC apparatus and related methods |
USD701864S1 (en) * | 2012-04-23 | 2014-04-01 | Blackberry Limited | UICC apparatus |
FR2992761B1 (en) * | 2012-07-02 | 2015-05-29 | Inside Secure | METHOD FOR MANUFACTURING CONTACTLESS MICROCIRCUIT |
CN103544519B (en) * | 2012-07-13 | 2016-05-11 | 东莞市锐祥智能卡科技有限公司 | The method of double-interface card sheet automatic wire arrangement and groove milling and device thereof |
US10783426B2 (en) | 2012-08-30 | 2020-09-22 | David Finn | Dual-interface metal hybrid smartcard |
TWI537094B (en) * | 2012-09-08 | 2016-06-11 | 西凱渥資訊處理科技公司 | Systems and methods related to ablation and cleaning during manufacture of radio-frequency modules |
WO2014082401A1 (en) * | 2012-11-30 | 2014-06-05 | Xue Yuan | Bi-interface smart card and manufacturing method thereof |
CN103164739A (en) * | 2013-03-05 | 2013-06-19 | 江苏远洋数据股份有限公司 | Double-interface card production process |
CN104063735A (en) * | 2013-03-22 | 2014-09-24 | 程金先 | Dual-interface card and contact card production technique |
US9167691B2 (en) * | 2013-04-16 | 2015-10-20 | Identive Group, Inc. | Dual interface module and dual interface card having a dual interface module manufactured using laser welding |
US10789524B2 (en) | 2013-09-08 | 2020-09-29 | Amatech Group Limited | Smartcard with a booster antenna and a wireless connection between modules |
FR3010565B1 (en) * | 2013-09-12 | 2015-09-25 | Oberthur Technologies | MEDICINAL CONTACT MICROCIRCUIT CARD IN CENTRIFUGAL SPIRAL |
US9424507B2 (en) | 2014-04-01 | 2016-08-23 | Nxp B.V. | Dual interface IC card components and method for manufacturing the dual-interface IC card components |
FR3026529B1 (en) * | 2014-09-30 | 2017-12-29 | Linxens Holding | METHOD FOR MANUFACTURING CHIP CARD AND CHIP CARD OBTAINED THEREBY |
EP3032468A1 (en) * | 2014-12-11 | 2016-06-15 | Gemalto Sa | Method for manufacturing a device including a wire interconnection pad |
EP3079105B1 (en) * | 2015-04-08 | 2021-03-31 | Nxp B.V. | Dual-interface ic card components and method for manufacturing the dual-interface ic card components |
US10685943B2 (en) * | 2015-05-14 | 2020-06-16 | Mediatek Inc. | Semiconductor chip package with resilient conductive paste post and fabrication method thereof |
EP3159832B1 (en) | 2015-10-23 | 2020-08-05 | Nxp B.V. | Authentication token |
FR3045157B1 (en) * | 2015-12-11 | 2019-07-26 | Idemia France | QUALITY CONTROL OF AN ELECTRICAL CONTACT |
US10388636B2 (en) * | 2015-12-21 | 2019-08-20 | Intel Corporation | Integrating system in package (SIP) with input/output (IO) board for platform miniaturization |
EP3232369B1 (en) * | 2016-04-15 | 2021-06-16 | Nxp B.V. | Fingerprint authentication system and method |
FR3051063B1 (en) * | 2016-05-06 | 2021-02-12 | Linxens Holding | PROCESS FOR MANUFACTURING CHIP CARDS AND CHIP CARD OBTAINED BY THIS PROCESS |
TWI769995B (en) | 2016-06-24 | 2022-07-11 | 日商半導體能源研究所股份有限公司 | Display devices, electronic devices |
FR3063555B1 (en) * | 2017-03-03 | 2021-07-09 | Linxens Holding | CHIP CARD AND PROCESS FOR MANUFACTURING A CHIP CARD |
EP3688669B1 (en) | 2017-09-29 | 2021-07-28 | Avery Dennison Retail Information Services, LLC | Systems and methods for transferring a flexible conductor onto a moving web |
WO2019068068A1 (en) * | 2017-09-29 | 2019-04-04 | Avery Dennison Retail Information Services, Llc | Strap mounting techniques for wire format antennas |
FR3073307B1 (en) * | 2017-11-08 | 2021-05-28 | Oberthur Technologies | SECURITY DEVICE SUCH AS A CHIP CARD |
US10799403B2 (en) | 2017-12-28 | 2020-10-13 | Stryker Corporation | Patient transport apparatus with controlled auxiliary wheel deployment |
CN108564159B (en) * | 2018-07-09 | 2023-11-24 | 东莞市芯安智能科技有限公司 | Double-interface smart card |
DE102018117364A1 (en) * | 2018-07-18 | 2020-01-23 | Infineon Technologies Ag | Method and device for trimming an antenna mounted on a carrier, method for producing a carrier structure, carrier structure and chip card |
US10779403B2 (en) * | 2018-09-20 | 2020-09-15 | Apple Inc. | Shorting pattern between pads of a camera module |
US11600912B2 (en) * | 2019-12-12 | 2023-03-07 | Au Optronics Corporation | Antenna device and manufacturing method thereof |
KR102177516B1 (en) * | 2020-04-22 | 2020-11-11 | 강원자석기술 주식회사 | Transceiver antenna module using multi-wire embedding |
EP4392895A1 (en) * | 2021-08-27 | 2024-07-03 | Linxens Holding | Wire pad design of a connection pad in a prelam body of a smart card, prelam body, smart card, method of forming a wire pad design, and method of forming a smart card |
US11907787B2 (en) | 2022-03-01 | 2024-02-20 | Anomatic Corporation | Dual interface metallic transaction cards and methods of manufacturing the same |
DE102022209975A1 (en) | 2022-09-22 | 2024-03-28 | Infineon Technologies Ag | Chip arrangement, method for forming a chip arrangement, document structure and method for forming a document structure |
EP4379601A1 (en) * | 2022-11-29 | 2024-06-05 | Thales Dis France Sas | Poor antenna positioning detection |
Family Cites Families (93)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US619942A (en) * | 1899-02-21 | Annunciator for telephone-exchanges | ||
US3674914A (en) * | 1968-02-09 | 1972-07-04 | Photocircuits Corp | Wire scribed circuit boards and method of manufacture |
ZA775455B (en) | 1977-08-09 | 1978-07-26 | Kollmorgen Tech Corp | Improved methods and apparatus for making scribed circuit boards |
JPS5698900A (en) * | 1980-01-07 | 1981-08-08 | Hitachi Ltd | Device for automatically wiring printed circuit board |
DE3153768C2 (en) * | 1981-04-14 | 1995-11-09 | Gao Ges Automation Org | Plastics identity card with an internal integrated circuit |
US4533787A (en) * | 1981-11-26 | 1985-08-06 | Autophon Ag. | Printed circuit assembly |
JPS60171475A (en) * | 1984-02-15 | 1985-09-04 | アイデンティフィケ−ション・デバイセス・インコ−ポレ−テッド | Discriminating system |
JP2567219B2 (en) | 1985-07-03 | 1996-12-25 | 日本エルエスアイカード 株式会社 | Non-contact method for writing / reading between memory substrate and read / write device |
US4693778A (en) * | 1985-07-19 | 1987-09-15 | Kollmorgen Technologies Corporation | Apparatus for making scribed circuit boards and circuit board modifications |
US4641773A (en) * | 1985-08-09 | 1987-02-10 | Kollmorgen Technologies Corp. | Ultrasonic stylus position stabilizer |
US5340946A (en) * | 1985-12-20 | 1994-08-23 | Advanced Interconnection Technology, Inc. | Heat activatable adhesive for wire scribed circuits |
US4884334A (en) * | 1986-02-05 | 1989-12-05 | International Business Machines, Corp. | Resonant stylus support |
US5211129A (en) * | 1986-02-25 | 1993-05-18 | Destron/Idi, Inc. | Syringe-implantable identification transponder |
JPH071837B2 (en) * | 1987-09-04 | 1995-01-11 | 宇部興産株式会社 | Electromagnetic wave absorber |
KR900008544B1 (en) * | 1988-06-22 | 1990-11-24 | 동양나이론 주식회사 | Resin composition for absorbing electromagnetic waves |
DE3935364C1 (en) | 1989-10-24 | 1990-08-23 | Angewandte Digital Elektronik Gmbh, 2051 Brunstorf, De | |
EP0526484B1 (en) | 1990-04-19 | 1994-03-16 | GUSTAFSON, Ake | Method for assembling a coil on a printed circuit |
US5083087A (en) * | 1990-07-17 | 1992-01-21 | Advanced Interconnection Technology, Inc. | Broken wire detector for wire scribing machines |
US5281855A (en) * | 1991-06-05 | 1994-01-25 | Trovan Limited | Integrated circuit device including means for facilitating connection of antenna lead wires to an integrated circuit die |
US5201453A (en) * | 1991-09-30 | 1993-04-13 | Texas Instruments Incorporated | Linear, direct-drive microelectronic bonding apparatus and method |
DE4205084A1 (en) | 1992-02-17 | 1993-09-02 | Karl Harms Handels Gmbh & Co K | Electromagnetic radiation receiver e.g. for antitheft security systems - consists of adjacent pairs of conductors in common planes, each pair wound into octagonal coils with equal numbers of turns and density |
US5365657A (en) * | 1993-02-01 | 1994-11-22 | Advanced Interconnection Technology | Method and apparatus for cutting wire |
JPH06351194A (en) | 1993-06-10 | 1994-12-22 | Matsushita Electric Ind Co Ltd | Motor with built-in sensor |
DE4403753C1 (en) * | 1994-02-08 | 1995-07-20 | Angewandte Digital Elektronik | Combined chip card |
DE4406704C1 (en) * | 1994-03-02 | 1995-07-20 | Angewandte Digital Elektronik | Smart card |
DE4410732C2 (en) * | 1994-03-28 | 1997-05-07 | Amatech Gmbh & Co Kg | Method for arranging a transponder unit having at least one chip and a wire coil on a substrate, as well as chip card with a correspondingly arranged transponder unit |
US6471878B1 (en) * | 1994-08-30 | 2002-10-29 | Gordion Holding Corporation | Method for forming a radio frequency responsive target and apparatus for verifying the authenticity of same |
DE4431605C2 (en) * | 1994-09-05 | 1998-06-04 | Siemens Ag | Method for producing a chip card module for contactless chip cards |
US5491302A (en) * | 1994-09-19 | 1996-02-13 | Tessera, Inc. | Microelectronic bonding with lead motion |
DE4443980C2 (en) * | 1994-12-11 | 1997-07-17 | Angewandte Digital Elektronik | Process for the production of chip cards and chip card produced according to this process |
DE19525933C5 (en) | 1995-07-17 | 2004-02-19 | Finn, David | Method and device for embedding a coil in the carrier substrate of an IC card |
DE19534480C2 (en) * | 1995-09-18 | 1999-11-11 | David Finn | IC card module for the production of an IC card and IC card with an IC card module |
DE19541039B4 (en) | 1995-11-03 | 2006-03-16 | Assa Abloy Identification Technology Group Ab | Chip module and method for its production |
DE19541996C2 (en) * | 1995-11-10 | 1997-09-25 | David Finn | Device for applying connecting material units |
AU709049B2 (en) | 1996-02-12 | 1999-08-19 | Smartrac Ip B.V. | Process and device for contacting a wire conductor |
DE59701709C5 (en) * | 1996-02-12 | 2014-01-09 | Smartrac Ip B.V. | METHOD AND DEVICE FOR CONTACTING A WIRE GUIDE |
DE19610507C2 (en) | 1996-03-15 | 1997-12-04 | David Finn | Smart card |
DE19654902C2 (en) * | 1996-03-15 | 2000-02-03 | David Finn | Smart card |
DE19616424A1 (en) | 1996-04-25 | 1997-10-30 | Manfred Dr Michalk | Electrically isolating material with electronic module |
DE19634473C2 (en) | 1996-07-11 | 2003-06-26 | David Finn | Process for the production of a chip card |
DE19632813C2 (en) * | 1996-08-14 | 2000-11-02 | Siemens Ag | Method for producing a chip card module, chip card module produced using this method and combination chip card containing this chip card module |
CN1155913C (en) * | 1996-10-09 | 2004-06-30 | Pav卡有限公司 | Method and connection arrangement for producing chip card |
DE19646717B4 (en) | 1996-11-12 | 2004-05-06 | Manfred Rietzler | Chip card with chip card module |
DE19651566B4 (en) * | 1996-12-11 | 2006-09-07 | Assa Abloy Identification Technology Group Ab | Chip module and method for its production and a chip card |
DE19710144C2 (en) * | 1997-03-13 | 1999-10-14 | Orga Kartensysteme Gmbh | Method for producing a chip card and chip card produced according to the method |
DE19716912B4 (en) | 1997-04-22 | 2006-06-08 | Assa Abloy Identification Technology Group Ab | Method for fixing a chip module in a chip card |
JPH1129748A (en) * | 1997-05-12 | 1999-02-02 | Fujitsu Ltd | Adhesive, adhesion, and mounted substrate board assembly |
DE19741984B4 (en) | 1997-09-23 | 2006-04-27 | Assa Abloy Identification Technology Group Ab | Chip carrier for the production of a chip card and method for producing such a chip card |
FR2769390B1 (en) * | 1997-10-08 | 2003-02-14 | Gemplus Card Int | METHOD FOR MANUFACTURING CHIP CARDS SUITABLE FOR PROVIDING CONTACT AND NON-CONTACT OPERATION, AND CONTACTLESS CHIP CARDS |
US6095915A (en) * | 1998-02-09 | 2000-08-01 | Destron Fearing Corporation | Premise identification system |
DE19814118A1 (en) | 1998-03-30 | 1999-10-14 | F&K Delvotec Bondtechnik Gmbh | Device for thermocompression bonding, and thermocompression bonding |
US6140707A (en) * | 1998-05-07 | 2000-10-31 | 3M Innovative Properties Co. | Laminated integrated circuit package |
US6107920A (en) * | 1998-06-09 | 2000-08-22 | Motorola, Inc. | Radio frequency identification tag having an article integrated antenna |
FR2780848A1 (en) * | 1998-07-06 | 2000-01-07 | Solaic Sa | ANTENNA WITH SLOTTED CONNECTION TERMINALS FOR INTEGRATED CIRCUIT BOARD, AND INTEGRATED CIRCUIT BOARD INCLUDING SUCH ANTENNA |
US6161761A (en) * | 1998-07-09 | 2000-12-19 | Motorola, Inc. | Card assembly having a loop antenna formed of a bare conductor and method for manufacturing the card assembly |
JP2002522850A (en) * | 1998-08-10 | 2002-07-23 | クレフト,ハンス−ディートリヒ | Chip card with increased card security |
WO2000021030A1 (en) | 1998-10-06 | 2000-04-13 | Intermec Ip Corp. | Rfid transponder having improved rf characteristics |
DE19850353C1 (en) | 1998-11-02 | 2000-03-16 | David Finn | Identification label for surface fixture or wrap-around fixture to object comprises multi-layer structure with identification layer for optical designation, reinforcement layer |
DE19850595C2 (en) | 1998-11-03 | 2002-07-04 | Hahn Schickard Ges | Process for laser soldering semiconductor chips |
DE69919030T2 (en) | 1998-12-14 | 2005-08-18 | Advanced Interconnection Technology, Inc. | IMPROVED METHOD FOR LAYING A WIRE-SHAPED LADDER ON LEVELS AND NON-SURFACE AREAS, IMPROVED PANEL CONNECTION CARDS WITH WIRES THEREIN AND CHIP CARD PRODUCED BY THIS PROCESS |
FR2788646B1 (en) † | 1999-01-19 | 2007-02-09 | Bull Cp8 | CHIP CARD HAVING A LOOP ANTENNA, AND ASSOCIATED MICROMODULE |
EP1035503B2 (en) * | 1999-01-23 | 2010-03-03 | X-ident technology GmbH | RFID-Transponder with printable surface |
US6521829B2 (en) * | 1999-03-25 | 2003-02-18 | Japan Science And Technology Corporation | Electromagnetic wave absorbing sheet |
DE19920593B4 (en) | 1999-05-05 | 2006-07-13 | Assa Abloy Identification Technology Group Ab | Chip carrier for a chip module and method for producing the chip module |
US6259369B1 (en) * | 1999-09-30 | 2001-07-10 | Moore North America, Inc. | Low cost long distance RFID reading |
JP4299414B2 (en) * | 1999-10-12 | 2009-07-22 | 富士通マイクロエレクトロニクス株式会社 | Combination card, IC card module, and combination card manufacturing method |
US6956182B2 (en) * | 2000-05-26 | 2005-10-18 | Sts Atl Corporation | Method of forming an opening or cavity in a substrate for receiving an electronic component |
JP2002074298A (en) * | 2000-08-30 | 2002-03-15 | Fujitsu Ltd | Non-contact type ic card |
US6628240B2 (en) * | 2000-11-08 | 2003-09-30 | American Pacific Technology | Method and apparatus for rapid staking of antennae in smart card manufacture |
GB2371264A (en) * | 2001-01-18 | 2002-07-24 | Pioneer Oriental Engineering L | Smart card with embedded antenna |
DE10114355A1 (en) * | 2001-03-22 | 2002-10-17 | Intec Holding Gmbh | Process for the production of a contactless multifunctional chip card as well as the chip card produced accordingly |
US6606247B2 (en) * | 2001-05-31 | 2003-08-12 | Alien Technology Corporation | Multi-feature-size electronic structures |
US6604686B1 (en) * | 2001-10-09 | 2003-08-12 | Vahid Taban | High speed system for embedding wire antennas in an array of smart cards |
US6677917B2 (en) * | 2002-02-25 | 2004-01-13 | Koninklijke Philips Electronics N.V. | Fabric antenna for tags |
US7091860B2 (en) * | 2002-08-08 | 2006-08-15 | Neology, Inc. | Multi-frequency identification device |
US6667092B1 (en) * | 2002-09-26 | 2003-12-23 | International Paper Company | RFID enabled corrugated structures |
TWI284842B (en) * | 2003-07-14 | 2007-08-01 | Nec Tokin Corp | Communication medium capable of carrying out contactless communication and method of producing the same |
JP4113812B2 (en) * | 2003-08-05 | 2008-07-09 | 北川工業株式会社 | Radio wave absorber and method of manufacturing radio wave absorber |
DE102004008840A1 (en) | 2004-02-20 | 2005-09-01 | Bundesdruckerei Gmbh | Method for producing document of value, e.g. passport, involves formation of laminate cover with surrounding sealed edge, by covering security insert and transponder unit with at least one laminate layer |
US7158037B2 (en) * | 2004-03-22 | 2007-01-02 | Avery Dennison Corporation | Low cost method of producing radio frequency identification tags with straps without antenna patterning |
US7292148B2 (en) * | 2004-06-18 | 2007-11-06 | Avery Dennison Corporation | Method of variable position strap mounting for RFID transponder |
US20050282355A1 (en) * | 2004-06-18 | 2005-12-22 | Edwards David N | High density bonding of electrical devices |
WO2006003851A1 (en) * | 2004-07-01 | 2006-01-12 | Lintec Corpolation | Antenna circuit, ic inlet, and ic tag |
DE102004043747A1 (en) | 2004-08-04 | 2006-03-16 | Mühlbauer Ag | Transponder manufacturing method, involves displacing and fastening antenna aerial on substrate surface by displacement of sonotrode to form antenna, and connecting end piece of aerial with connection surface of chip by thermo compression |
EP2039460A3 (en) | 2004-11-02 | 2014-07-02 | HID Global GmbH | Relocation device, contacting device, delivery system, relocation and contacting unit production facility, production method and a transponder unit |
EP1838145B1 (en) * | 2004-11-17 | 2016-03-09 | GT Acquisition Sub, Inc. | Radio frequency animal tracking system |
US7011980B1 (en) * | 2005-05-09 | 2006-03-14 | International Business Machines Corporation | Method and structures for measuring gate tunneling leakage parameters of field effect transistors |
US7176053B1 (en) * | 2005-08-16 | 2007-02-13 | Organicid, Inc. | Laser ablation method for fabricating high performance organic devices |
DE202005016382U1 (en) | 2005-10-19 | 2006-02-02 | Mühlbauer Ag | Wire-winding system for manufacture of antenna, e.g. for transponder, has integrated guides for laying antenna wire on surface of substrate and includes heater and sonotrode for embedding wire |
US20070130754A1 (en) | 2005-12-14 | 2007-06-14 | Michael Fein | Laser ablation prototyping of RFID antennas |
EP1868140A1 (en) | 2006-06-16 | 2007-12-19 | Assa Abloy Identification Technology Group AB | Contactless card with membrane switch made of an elasto-resistive material |
DE102006055744A1 (en) * | 2006-11-25 | 2008-05-29 | Atmel Germany Gmbh | Antenna for rear scatter-based passive or semi passive transponder of radio frequency identification system, has branch with section connected with another section, where thin layer of branch and integrated circuit are formed on substrate |
DE202007013680U1 (en) | 2007-07-02 | 2007-12-06 | Ruhlamat Automatisierungstechnik Gmbh | Device for producing a chip card |
-
2008
- 2008-05-09 US US12/117,748 patent/US7980477B2/en not_active Expired - Fee Related
- 2008-05-14 EP EP08759585.6A patent/EP2147401B2/en not_active Not-in-force
- 2008-05-14 DE DE602008004762T patent/DE602008004762D1/en active Active
- 2008-05-14 AT AT08759585T patent/ATE497223T1/en not_active IP Right Cessation
- 2008-05-14 WO PCT/EP2008/055902 patent/WO2008141990A1/en active Application Filing
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011009577A1 (en) * | 2011-01-27 | 2012-08-02 | Texas Instruments Deutschland Gmbh | RFID transponder and method for connecting a semiconductor die to an antenna |
Also Published As
Publication number | Publication date |
---|---|
WO2008141990A1 (en) | 2008-11-27 |
DE602008004762D1 (en) | 2011-03-10 |
EP2147401A1 (en) | 2010-01-27 |
EP2147401B2 (en) | 2013-08-21 |
US20080283615A1 (en) | 2008-11-20 |
ATE497223T1 (en) | 2011-02-15 |
US7980477B2 (en) | 2011-07-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2147401B1 (en) | Dual interface inlays | |
US8240022B2 (en) | Methods of connecting an antenna to a transponder chip | |
US7581308B2 (en) | Methods of connecting an antenna to a transponder chip | |
US20080179404A1 (en) | Methods and apparatuses to produce inlays with transponders | |
US8955759B2 (en) | Inlays for security documents | |
US9027227B2 (en) | Transferring an antenna to an RFID inlay substrate | |
EP2070016B1 (en) | Method of connecting an antenna to a transponder chip and corresponding inlay substrate | |
US20110011939A1 (en) | Contact-less and dual interface inlays and methods for producing the same | |
US7979975B2 (en) | Methods of connecting an antenna to a transponder chip | |
US11222861B2 (en) | Dual-interface IC card module | |
WO2011154061A1 (en) | Mounting and connecting an antenna wire in a transponder | |
JP2000182017A (en) | Ic card used as contacing/noncontacting type and its manufacture | |
KR100192728B1 (en) | Method of making radio frequency identification tags | |
CN103026371B (en) | Chip electronic device and carry out the method that manufactures by winding | |
EP2070017B2 (en) | Method of connecting an antenna to a transponder chip and corresponding transponder inlay | |
JP2010117833A (en) | Inlay, production method thereof, and non-contact type information medium | |
WO2008037592A1 (en) | Method of connecting an antenna to a transponder chip and corresponding transponder inlay | |
EP3079105B1 (en) | Dual-interface ic card components and method for manufacturing the dual-interface ic card components | |
JP2015228234A (en) | Manufacturing method of non-contact communication medium, and connection method of antenna and circuit device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20091125 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MT NL NO PL PT RO SE SI SK TR |
|
AX | Request for extension of the european patent |
Extension state: AL BA MK RS |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
DAX | Request for extension of the european patent (deleted) | ||
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: FEINICS AMATECH TEORANTA |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MT NL NO PL PT RO SE SI SK TR |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: EP |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FG4D |
|
REF | Corresponds to: |
Ref document number: 602008004762 Country of ref document: DE Date of ref document: 20110310 Kind code of ref document: P |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R096 Ref document number: 602008004762 Country of ref document: DE Effective date: 20110310 |
|
REG | Reference to a national code |
Ref country code: NL Ref legal event code: VDEP Effective date: 20110126 |
|
LTIE | Lt: invalidation of european patent or patent extension |
Effective date: 20110126 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: HR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: ES Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110507 Ref country code: SE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: PT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110526 Ref country code: LV Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: GR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110427 Ref country code: NO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110426 Ref country code: LT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20110607 Year of fee payment: 4 Ref country code: IE Payment date: 20110520 Year of fee payment: 4 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: BE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: PL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: AT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: BG Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110426 Ref country code: CY Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: FI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
PLBI | Opposition filed |
Free format text: ORIGINAL CODE: 0009260 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: EE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: DK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
26 | Opposition filed |
Opponent name: SMARTRAC IP B.V. Effective date: 20111019 |
|
PLAX | Notice of opposition and request to file observation + time limit sent |
Free format text: ORIGINAL CODE: EPIDOSNOBS2 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: RO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: SK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: CZ Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 Ref country code: MC Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20110531 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R026 Ref document number: 602008004762 Country of ref document: DE Effective date: 20111019 |
|
PLBB | Reply of patent proprietor to notice(s) of opposition received |
Free format text: ORIGINAL CODE: EPIDOSNOBS3 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20120514 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LI Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20120531 Ref country code: CH Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20120531 |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: MM4A |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST Effective date: 20130131 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20120514 Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20120514 Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20120531 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LU Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20110514 |
|
PUAH | Patent maintained in amended form |
Free format text: ORIGINAL CODE: 0009272 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: PATENT MAINTAINED AS AMENDED |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
27A | Patent maintained in amended form |
Effective date: 20130821 |
|
AK | Designated contracting states |
Kind code of ref document: B2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MT NL NO PL PT RO SE SI SK TR |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: TR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R102 Ref document number: 602008004762 Country of ref document: DE Effective date: 20130821 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: HU Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20110126 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LV Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20130821 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20161128 Year of fee payment: 9 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R119 Ref document number: 602008004762 Country of ref document: DE |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20171201 |