EP2015193A2 - Computer system with processor expansion device - Google Patents
Computer system with processor expansion device Download PDFInfo
- Publication number
- EP2015193A2 EP2015193A2 EP08011434A EP08011434A EP2015193A2 EP 2015193 A2 EP2015193 A2 EP 2015193A2 EP 08011434 A EP08011434 A EP 08011434A EP 08011434 A EP08011434 A EP 08011434A EP 2015193 A2 EP2015193 A2 EP 2015193A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- processor
- expansion device
- computer system
- expansion
- motherboard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/409—Mechanical coupling
Definitions
- the invention relates to a computer system and, more particularly, to a computer system with a processor expansion device.
- a multi-processor computer system has been developed to satisfy the high processing demand. More than one CPU are provided in the multi-processor computer system for processing a plurality of computations in a time-sharing handling method or in parallel to improve the performance of the computer system.
- Hyper Transport technology providing a low-latency and high-bandwidth point-to-point transmission architecture for processor-to-processor and processor-to-I/O connections by a parallel or serial bus.
- two or four processors are usually provided on a motherboard to optimize the processor performance.
- three processors are provided on the motherboard. This method breaks the common one and is more flexible in the layout of the multi-processor computer system.
- a high-bandwidth and low-latency transmission channel can be provided by the Hyper Transport technology between processors, system chips, and peripheral devices in the aforementioned computer system.
- Hyper Transport extension (HTX) expansion slots compliant with the Hyper Transport, an expandable HTX adaptor card thereof can only expand I/O at most.
- the processors are disposed on the motherboard in advance, the processor number is fixed and fails to be expanded dynamically.
- the processor accesses a memory by the north bridge chip in a system chipset. That is, a memory controller is integrally disposed in the north bridge chip. To reduce the load of the north bridge chip, the memory controller is directly disposed in the processor chip in the aforementioned Opteron server further to reduce the signal delay between the processor and the memory.
- a memory controller is integrally disposed in the north bridge chip.
- the memory controller is directly disposed in the processor chip in the aforementioned Opteron server further to reduce the signal delay between the processor and the memory.
- Each processor on the motherboard has an independent memory resource, and it can also share the memory resources of the other processors.
- the processor number is limited by the motherboard areas (the areas for the processors and that for the memory independently controlled by each processor should be provided) thus to fail to be expanded. Therefore it fails to increase the processors of the conventional multi-processor computer system with two to four processors to improve the processing performance of the computer system.
- the invention provides a computer system with a processor expansion device.
- the computer system includes a motherboard having an expansion slot, a first processor disposed on the motherboard, and a processor expansion device including a second processor.
- the processor expansion device is detachably electrically connected to the expansion slot.
- the first processor is connected to the second processor via a bus interface.
- the invention further provides a processor expansion device detachably electrically connected to an expansion slot of a motherboard.
- the processor expansion device includes a processor and a power module.
- the power module is used for providing power for the processor.
- the processor expansion device is electrically connected to the expansion slot, the processor is connected to a processor on the motherboard via a bus interface.
- a processor expansion device is disposed in an expansion slot conforming to the bus agreement to expand processors in the computer system.
- the processor expansion device has one or more processors and the corresponding memories thereon.
- the basic input/output system (BIOS) of the computer system ports a bus routing of the processor on the processor expansion device and addresses a memory thereon.
- BIOS basic input/output system
- FIG. 1 is a schematic diagram showing a computer system 10 with a processor expansion device according to the embodiment of the invention.
- the computer system 10 includes a motherboard 11, a first processor 14, and a processor expansion device 30.
- the motherboard 11 has a plurality of expansion slots 12 which conform to an HTX agreement in the embodiment of the invention.
- the first processor 14 is disposed on the motherboard 11.
- the first processor 14 is connected to the plurality of expansion slots 12 and the expansion module disposed in the expansion slots 12 and transmits data therewith by a plurality of buses 20 and a system chip 22 on the motherboard 11.
- the buses 20 conforming to the hyper transport agreement between the system chip 22 and the first processor 14 and that between the expansion slots 12 are transmission channels of high-bandwidth and low-latency.
- a first memory 16 on the motherboard 11 is directly connected to the first processor 14 by a memory bus 21.
- the first processor 14 can fast access data in the first memory 16 by the memory bus 21 without the system chip 22.
- the motherboard 11 further has a BIOS 18 for executing power-on self test (POST) of the computer system 10, initializing the first memory 16, the system chip 22, and the peripheral devices, and providing basic setting parameters of the motherboard 11 and each component connected thereto.
- POST power-on self test
- the number of the processors in the computer system 10 can be expanded by disposing the processor expansion devices 30 in the plurality of expansion slots 12 thus to improve the processing performance of the device.
- FIG. 2 is a schematic diagram showing the processor expansion device 30. Please refer to FIG. 1 and FIG. 2 .
- the processor expansion device 30 is an expansion card conforming to the HTX agreement. It can be connected to the system chip 22 on the motherboard 11 and the other processors to form a multi-processor system by being disposed in the expansion slot 12 conforming to the HTX agreement.
- the processor expansion device 30 includes a second processor 34 and a fourth processor 34' on a circuit board 32 which are connected with each other by the HT bus 20 conforming to the Hyper Transport agreement.
- the circuit board 32 of the processor expansion device 30 can be provided with a second memory 36 and a fourth memory 36' which establish channels with the second processor 34 and the fourth processor 34' by the memory buses 21, respectively.
- a power module 35 which is independent of the motherboard 11 and is electrically connected to the circuit board 32, is provided at the processor expansion device 30 to provide the needed power for the second processor 34 and the fourth processor 34' (the motherboard 11 also has a power module for providing power for each component, which is not shown in the drawings).
- the processor expansion device 30 is an HTX expansion card, and therefore it can be electrically connected to any expansion slot 12 conforming to the HTX agreement in the motherboard 11 via a plurality of connecting pins 38 (golden figures).
- the second processor 34 or more than one processor as shown in FIG. 2
- the processor expansion device 30 is connected with the original first processor 14 (or more than one processor) on the motherboard 11 via the HT buses; when the processor expansion device 30 is removed from the expansion slot 12, the processors 34, 34' (and the corresponding memories 36, 36') on the processor expansion device 30 are removed from the computer system 10.
- the BIOS 18 of the computer system 10 should execute the aforementioned setting and testing when the computer system 10 is booted. Further, the BIOS 18 should port the bus routing of the second processor 34 and the fourth processor 34' when the processor expansion device 30 is electrically connected to the expansion slot 12, and therefore the bus routing of the second processor 34 and the fourth processor 34' is integrated with the first processor 14 on the motherboard 11 to allow the multiple processors to cooperatively operate.
- the BIOS 18 also addresses the memories 36, 36' thereon (such as reading the SMBus slave address of the DDR memory) when the processor expansion device 30 is electrically connected to the expansion slot 12. Therefore, the memories 36, 36' can be recognized when the system operates and can be also recognized and utilized by the processors (either the processors 34, 34' on the processor expansion device 30 or the first processor 14 on the motherboard 11).
- the computer system 10 Since the plurality of expansion slots 12 conforming to the HTX agreement are usually provided at the motherboard 11, more than one processor expansion device 30 (respectively including one or more processors and memories) can be plugged into the expansion slots 12 of the computer system 10.
- the computer system 10 has the ability of expanding the processors without replanning the layout of the motherboard 11, compressing space of the other components on the motherboard 11, or modifying the size of the motherboard 11.
- the size of the motherboard thereof is limited.
- the computer system 10 conforms to the E-ATX or the SSI housing standard, it can still achieve the function of expanding processors by the processor expansion device 30.
- a sideband connector 40 is electrically connected to the plurality of the expansion slots 12 to produce a sideband signal, and therefore the first processor 14, the second processor 34, and the fourth processor 34' form a close loop in the computer system 10.
- the sideband connector 40 can be also an adapter plate or a signal cable.
- FIG. 3 is a schematic diagram showing a connection of a plurality of processors in a computer system according to the invention.
- the first processor 14 and a third processor 14' are provided at the motherboard, and they are respectively provided with the first memory 16 and a third memory 16' by the memory buses 21.
- the processor expansion device 30 and the sideband connector 40 are respectively electrically connected to an expansion slot HTX 1 and an expansion slot HTX 2 of the motherboard.
- the processor expansion device 30 is provided with the second processor 34 and the fourth processor 34'.
- the first processor 14, the second processor 34, the third processor 14', the fourth processor 34', and the sideband connector 40 form a close loop by the HT buses 20.
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Abstract
Description
- The invention relates to a computer system and, more particularly, to a computer system with a processor expansion device.
- Besides a computer system with a single processor where the single central processing unit (CPU) executes all the computations, a multi-processor computer system has been developed to satisfy the high processing demand. More than one CPU are provided in the multi-processor computer system for processing a plurality of computations in a time-sharing handling method or in parallel to improve the performance of the computer system.
- At present AMD Opteron severs employ the Hyper Transport technology providing a low-latency and high-bandwidth point-to-point transmission architecture for processor-to-processor and processor-to-I/O connections by a parallel or serial bus. On the other hand, for the multi-processor system adopting the Hyper Transport technology, two or four processors are usually provided on a motherboard to optimize the processor performance. Further, in some marketable servers such as IBM System x3755 servers, three processors are provided on the motherboard. This method breaks the common one and is more flexible in the layout of the multi-processor computer system.
- A high-bandwidth and low-latency transmission channel can be provided by the Hyper Transport technology between processors, system chips, and peripheral devices in the aforementioned computer system. However, for Hyper Transport extension (HTX) expansion slots compliant with the Hyper Transport, an expandable HTX adaptor card thereof can only expand I/O at most. Even for the aforementioned servers with two to four processors, since the processors are disposed on the motherboard in advance, the processor number is fixed and fails to be expanded dynamically.
- Further, in the past, the processor accesses a memory by the north bridge chip in a system chipset. That is, a memory controller is integrally disposed in the north bridge chip. To reduce the load of the north bridge chip, the memory controller is directly disposed in the processor chip in the aforementioned Opteron server further to reduce the signal delay between the processor and the memory. Each processor on the motherboard has an independent memory resource, and it can also share the memory resources of the other processors. For a multi-processor computer system, the processor number is limited by the motherboard areas (the areas for the processors and that for the memory independently controlled by each processor should be provided) thus to fail to be expanded. Therefore it fails to increase the processors of the conventional multi-processor computer system with two to four processors to improve the processing performance of the computer system.
- The invention provides a computer system with a processor expansion device. The computer system includes a motherboard having an expansion slot, a first processor disposed on the motherboard, and a processor expansion device including a second processor. The processor expansion device is detachably electrically connected to the expansion slot. When the processor expansion device is electrically connected to the expansion slot, the first processor is connected to the second processor via a bus interface.
- The invention further provides a processor expansion device detachably electrically connected to an expansion slot of a motherboard. The processor expansion device includes a processor and a power module. The power module is used for providing power for the processor. When the processor expansion device is electrically connected to the expansion slot, the processor is connected to a processor on the motherboard via a bus interface.
- In a computer system with a uniformed bus agreement according to the invention, a processor expansion device is disposed in an expansion slot conforming to the bus agreement to expand processors in the computer system. The processor expansion device has one or more processors and the corresponding memories thereon. When the processor expansion device is provided at the computer system, the basic input/output system (BIOS) of the computer system ports a bus routing of the processor on the processor expansion device and addresses a memory thereon. Thus the number of the processors and the memories is expanded when the processor expansion device is provided at the computer system.
- These and other features, aspects, and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings.
-
-
FIG. 1 is a schematic diagram showing a computer system with a processor expansion device according to the embodiment of the invention; -
FIG. 2 is a schematic diagram showing a processor expansion device; and -
FIG. 3 is a schematic diagram showing a connection of a plurality of processors in a computer system according to the embodiment of the invention. - Please refer to
FIG. 1 which is a schematic diagram showing acomputer system 10 with a processor expansion device according to the embodiment of the invention. Thecomputer system 10 includes amotherboard 11, afirst processor 14, and aprocessor expansion device 30. Themotherboard 11 has a plurality ofexpansion slots 12 which conform to an HTX agreement in the embodiment of the invention. Thefirst processor 14 is disposed on themotherboard 11. Thefirst processor 14 is connected to the plurality ofexpansion slots 12 and the expansion module disposed in theexpansion slots 12 and transmits data therewith by a plurality ofbuses 20 and asystem chip 22 on themotherboard 11. In the embodiment of the invention, thebuses 20 conforming to the hyper transport agreement between thesystem chip 22 and thefirst processor 14 and that between theexpansion slots 12 are transmission channels of high-bandwidth and low-latency. - For the
first processor 14 with a memory controller therein, afirst memory 16 on themotherboard 11 is directly connected to thefirst processor 14 by amemory bus 21. Thus thefirst processor 14 can fast access data in thefirst memory 16 by thememory bus 21 without thesystem chip 22. Themotherboard 11 further has aBIOS 18 for executing power-on self test (POST) of thecomputer system 10, initializing thefirst memory 16, thesystem chip 22, and the peripheral devices, and providing basic setting parameters of themotherboard 11 and each component connected thereto. - The number of the processors in the
computer system 10 can be expanded by disposing theprocessor expansion devices 30 in the plurality ofexpansion slots 12 thus to improve the processing performance of the device. -
FIG. 2 is a schematic diagram showing theprocessor expansion device 30. Please refer toFIG. 1 and FIG. 2 . In the embodiment of the embodiment of the invention, theprocessor expansion device 30 is an expansion card conforming to the HTX agreement. It can be connected to thesystem chip 22 on themotherboard 11 and the other processors to form a multi-processor system by being disposed in theexpansion slot 12 conforming to the HTX agreement. Theprocessor expansion device 30 includes asecond processor 34 and a fourth processor 34' on acircuit board 32 which are connected with each other by the HTbus 20 conforming to the Hyper Transport agreement. Since theprocessors 34, 34' can be provided with a memory controller therein, thecircuit board 32 of theprocessor expansion device 30 can be provided with asecond memory 36 and a fourth memory 36' which establish channels with thesecond processor 34 and the fourth processor 34' by thememory buses 21, respectively. - Further, since processors are usually high-power electronic components, a
power module 35, which is independent of themotherboard 11 and is electrically connected to thecircuit board 32, is provided at theprocessor expansion device 30 to provide the needed power for thesecond processor 34 and the fourth processor 34' (themotherboard 11 also has a power module for providing power for each component, which is not shown in the drawings). - The
processor expansion device 30 is an HTX expansion card, and therefore it can be electrically connected to anyexpansion slot 12 conforming to the HTX agreement in themotherboard 11 via a plurality of connecting pins 38 (golden figures). When theprocessor expansion device 30 is disposed in theexpansion slot 12, the second processor 34 (or more than one processor as shown inFIG. 2 ) on theprocessor expansion device 30 is connected with the original first processor 14 (or more than one processor) on themotherboard 11 via the HT buses; when theprocessor expansion device 30 is removed from theexpansion slot 12, theprocessors 34, 34' (and thecorresponding memories 36, 36') on theprocessor expansion device 30 are removed from thecomputer system 10. To make theprocessors 34, 34' and thememories 36, 36' work normally with the original system in themotherboard 11 when they are disposed in theexpansion slot 12, theBIOS 18 of thecomputer system 10 should execute the aforementioned setting and testing when thecomputer system 10 is booted. Further, theBIOS 18 should port the bus routing of thesecond processor 34 and the fourth processor 34' when theprocessor expansion device 30 is electrically connected to theexpansion slot 12, and therefore the bus routing of thesecond processor 34 and the fourth processor 34' is integrated with thefirst processor 14 on themotherboard 11 to allow the multiple processors to cooperatively operate. Further, as thefirst memory 16 on themotherboard 11 is addressed, theBIOS 18 also addresses thememories 36, 36' thereon (such as reading the SMBus slave address of the DDR memory) when theprocessor expansion device 30 is electrically connected to theexpansion slot 12. Therefore, thememories 36, 36' can be recognized when the system operates and can be also recognized and utilized by the processors (either theprocessors 34, 34' on theprocessor expansion device 30 or thefirst processor 14 on the motherboard 11). - Please refer to
FIG. 1 . Since the plurality ofexpansion slots 12 conforming to the HTX agreement are usually provided at themotherboard 11, more than one processor expansion device 30 (respectively including one or more processors and memories) can be plugged into theexpansion slots 12 of thecomputer system 10. Thus thecomputer system 10 has the ability of expanding the processors without replanning the layout of themotherboard 11, compressing space of the other components on themotherboard 11, or modifying the size of themotherboard 11. For the present computer system conforming to the E-ATX or the SSI housing standard, the size of the motherboard thereof is limited. However, in the embodiments of the invention, even if thecomputer system 10 conforms to the E-ATX or the SSI housing standard, it can still achieve the function of expanding processors by theprocessor expansion device 30. To obtain the best method for connecting the multiple processors of thecomputer system 10 advised by designers, that is, to allow the processors to form a close loop, asideband connector 40 is electrically connected to the plurality of theexpansion slots 12 to produce a sideband signal, and therefore thefirst processor 14, thesecond processor 34, and the fourth processor 34' form a close loop in thecomputer system 10. Thesideband connector 40 can be also an adapter plate or a signal cable. - Please refer to
FIG. 3 which is a schematic diagram showing a connection of a plurality of processors in a computer system according to the invention. Thefirst processor 14 and a third processor 14' are provided at the motherboard, and they are respectively provided with thefirst memory 16 and a third memory 16' by thememory buses 21. Theprocessor expansion device 30 and thesideband connector 40 are respectively electrically connected to an expansion slot HTX 1 and an expansion slot HTX 2 of the motherboard. Theprocessor expansion device 30 is provided with thesecond processor 34 and the fourth processor 34'. In the computer system inFIG. 3 , thefirst processor 14, thesecond processor 34, the third processor 14', the fourth processor 34', and thesideband connector 40 form a close loop by theHT buses 20. - Although the present invention has been described in considerable detail with reference to certain preferred embodiments thereof, the disclosure is not for limiting the scope of the invention. Persons having ordinary skill in the art may make various modifications and changes without departing from the scope and spirit of the invention. Therefore, the scope of the appended claims should not be limited to the description of the preferred embodiments described above.
Claims (13)
- A computer system with a processor expansion device, characterized by:a motherboard having an expansion slot;a first processor disposed on the motherboard; anda processor expansion device comprising a second processor, the processor expansion device detachably electrically connected to the expansion slot;wherein when the processor expansion device is electrically connected to the expansion slot, the first processor is connected to the second processor via a bus interface.
- The computer system according to claim 1, characterized in that wherein the processor expansion device further comprises a power module for providing power for the second processor.
- The computer system according to claim 1, characterized in that wherein the computer system further comprises a basic input/output system (BIOS) provided at the motherboard, and when the processor expansion device is electrically connected to the expansion slot, the BIOS ports a bus routing of the second processor.
- The computer system according to claim 3, characterized in that wherein the processor expansion device further comprises a memory, and when the processor expansion device is electronically connected to the expansion slot, the BIOS addresses the memory.
- The computer system according to claim 4, characterized in that wherein the processor expansion device further comprises a memory expansion slot, and the memory is detachably electrically connected to the memory expansion slot to be disposed on the processor expansion device.
- The computer system according to claim 1, characterized in that wherein the computer system further comprises a sideband connector, and the sideband connector forms a close loop with the first processor and the second processor when the sideband connector is disposed at the motherboard.
- The computer system according to claim 1, characterized in that wherein the processor expansion device is an expansion card conforming to a hyper transport extension (HTX) agreement.
- The computer system according to claim 1, characterized in that wherein the expansion slot conforms to an HTX agreement.
- The computer system according to claim 1, characterized in that wherein the bus conforms to a hyper transport agreement.
- A processor expansion device detachably electrically connected to an expansion slot of a motherboard, the processor expansion device characterized by:a circuit board having a connecting pin for being electrically connected with the expansion slot of the motherboard;a processor electrically connected to the circuit board; anda power module electrically connected to the circuit board for providing power for the processor,wherein when the processor expansion device is electrically connected to the expansion slot, the processor is connected to a processor on the motherboard via a bus.
- The processor expansion device according to claim 10, characterized in that wherein the processor expansion device further comprises a memory.
- The processor expansion device according to claim 11, characterized in that wherein the processor expansion device further comprises a memory expansion slot, and the memory is detachably electrically connected to the memory expansion slot to be disposed on the processor expansion device.
- The processor expansion device according to claim 10, characterized in that wherein the processor expansion device is an expansion card conforming to an HTX agreement.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW096122906A TW200900953A (en) | 2007-06-25 | 2007-06-25 | Computer system having a processor expansion device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP2015193A2 true EP2015193A2 (en) | 2009-01-14 |
| EP2015193A3 EP2015193A3 (en) | 2011-02-02 |
Family
ID=39874160
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP08011434A Withdrawn EP2015193A3 (en) | 2007-06-25 | 2008-06-24 | Computer system with processor expansion device |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20080320196A1 (en) |
| EP (1) | EP2015193A3 (en) |
| TW (1) | TW200900953A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI499919B (en) * | 2013-04-30 | 2015-09-11 | Univ Nat Cheng Kung | Electronic system and processing method |
| CN112363977A (en) * | 2020-11-11 | 2021-02-12 | 北京大地信合信息技术有限公司 | VPX single-board computer main board |
| DE102021117275A1 (en) * | 2021-07-05 | 2023-01-05 | Connaught Electronics Ltd. | Electronic computing device for an assistance system in a motor vehicle, assistance system and method for producing an electronic computing device |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5887145A (en) * | 1993-09-01 | 1999-03-23 | Sandisk Corporation | Removable mother/daughter peripheral card |
| US5748912A (en) * | 1995-06-13 | 1998-05-05 | Advanced Micro Devices, Inc. | User-removable central processing unit card for an electrical device |
| US5896513A (en) * | 1996-07-03 | 1999-04-20 | Intel Corporation | Computer system providing a universal architecture adaptive to a variety of processor types and bus protocols |
| US7007125B2 (en) * | 2003-06-24 | 2006-02-28 | International Business Machines Corporation | Pass through circuit for reduced memory latency in a multiprocessor system |
| US7120789B2 (en) * | 2003-08-14 | 2006-10-10 | International Business Machines Corporation | System and method for portable on-demand central processing unit |
| US6985152B2 (en) * | 2004-04-23 | 2006-01-10 | Nvidia Corporation | Point-to-point bus bridging without a bridge controller |
| WO2006074239A2 (en) * | 2005-01-05 | 2006-07-13 | Xtremedata, Inc. | Systems and methods for providing co-processors to computing systems |
| TW200638219A (en) * | 2005-04-29 | 2006-11-01 | Elitegroup Computer Systems Co Ltd | Interface circuit capable of setting a central processing unit |
| US20070067535A1 (en) * | 2005-09-20 | 2007-03-22 | Ta-Wei Liu | Motherboard capable of selectively supporting dual graphic engine |
| TW200712841A (en) * | 2005-09-30 | 2007-04-01 | Tyan Computer Corp | Processor configuration architecture of multi-processor system |
| US8244793B2 (en) * | 2007-05-14 | 2012-08-14 | International Business Machines Corporation | Resetting a HyperTransport link in a blade server |
-
2007
- 2007-06-25 TW TW096122906A patent/TW200900953A/en unknown
-
2008
- 2008-06-16 US US12/139,505 patent/US20080320196A1/en not_active Abandoned
- 2008-06-24 EP EP08011434A patent/EP2015193A3/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| TW200900953A (en) | 2009-01-01 |
| EP2015193A3 (en) | 2011-02-02 |
| US20080320196A1 (en) | 2008-12-25 |
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