EP1985026A2

EP1985026A2 - Wireless communication unit and method for receiving a wireless signal

Info

Publication number: EP1985026A2
Application number: EP07763525A
Authority: EP
Inventors: Jean Sidon; Yaniv Alon; Salomon Serfaty
Original assignee: Motorola Inc
Current assignee: Motorola Solutions Inc
Priority date: 2006-02-03
Filing date: 2007-02-02
Publication date: 2008-10-29
Also published as: GB2434948B; EP1985026A4; WO2007092744A3; WO2007092744A2; GB0602195D0; GB2434948A; WO2007092744B1

Abstract

A wireless communication unit (100) comprises a receiver for receiving a wireless signal having signal-to-noise ratio (SNR) measurement logic (112) for measuring a SNR value of the received signal and signal processing logic (108) arranged to process the received wireless signal. The signal processing logic comprises demodulator logic (255) operably coupled to log likelihood ratio (LLR) logic (262) and decoding logic (265). A scaling factor (Q) is applied to the LLR logic (262) dependent upon the measured signal-to-noise ratio.

Description

WIRELESS COMMUNICATION UNIT AND METHOD FOR RECEIVING A

WIRELESS SIGNAL

Field of the Invention

The present invention relates to a wireless communication unit and a method of receiving a wireless signal. In particular, the invention relates to quantization of a received digital signal.

Background of the Invention

Mobile communication systems typically operate according to a set of industry standards or protocols. One example of such a standard is the TETRA (TErrestrial Trunked Radio) standards which have been defined by the European Telecommunications Standards Institute (ETSI) . A system that operates according to TETRA standards is known as a TETRA system. TETRA systems are primarily designed for use by professional radio users such as the emergency services.

TETRA systems operating according to the existing standards are used primarily for voice communication and provide limited slow data communication. A new, second generation of TETRA standards is being developed. This is aimed at use in providing high speed data communication, for example for fast accessing of police databases, and for transfer of picture, image and video data and the like. The existing generation of TETRA standards is referred to as ^λTETRA-l' standards and the new standards are referred to as ^ΛTETRA-2' standards and in one form are known as ^TEDS' (^λTETRA Enhanced Data Services') standards. TETRA-I provides a uniform spacing between radio frequency (RF) channels of 25 kHz. TETRA-2 (TEDS) provides channel spacings of 25 KHz, 50 KHz, 100 KHz and 150 kHz depending on required data rate. A TETRA-I system and a TETRA-2 system may share a common spectrum. For example there may be a TETRA-I channel having a channel width of 25 kHz channel and a channel centre frequency at 380.100 MHz and there may be a TETRA-2 (TEDS) channel having a channel width of 100 kHz and a channel centre frequency at 380.1625 MHz.

It has been proposed that a single dual-mode receiver may be used to receive both TETRA-I signals and TETRA-2 signals. However, there are significant differences between TETRA-I signals and TETRA-2 signals. A TETRA-I signal has a π/4 DQPSK (differential quadrature phase shift keying) modulation with a peak to average ratio of 3.3 dB. In contrast, a TETRA-2 (TEDS) signal has a 4/16/64 QAM (quadrature amplitude modulation) with a peak to average ratio of 12 dB. The peak to average ratio of 12 dB may be reduced to about β dB by operation of a suitable ^Λpeak reduction' algorithm, e.g. applied in a transmitter of a base transceiver station.

Differences between TETRA-I and TETRA-2 signals in the design of a receiver, in order to receive both signal types, also gives rise to problems, for example within error correction coding logic.

Error correction coding is a well known technique employed in digital receivers to improve the power efficiency at the cost of bandwidth efficiency. It is known that the performance of the error correction coding can be improved (albeit at the cost of increased complexity) when a ^λsoft decision' technique is exploited. In comparison to a general hard decision technique, which detects a received bit as a hard bit (i.e. detecting whether the bit has either of only two levels, a ^Λ0' or a ^λl')_/ the soft decision technique detects a bit as a ^λsoft' bit, which has more than two levels. These soft bits provide more detailed information of the transmitting data, given the same channel distortions applied to the transmitted data. Accordingly, a soft decoding scheme provides better error correction capability than a corresponding hard decoding scheme.

A quadrature amplitude modulated (QAM) symbol of a single- carrier or a multi-carrier signal is received as a complex number Xr. The received symbol is demodulated to true ^λsoft' bits, which are real numbers, by a log likelihood ratio ( ^ΛLLR' ) calculation. The true soft bit, that is, the LLR of a soft bit, shows the degree of ^λ0' or ^λl' of a received bit. A large positive number means the received bit is a strong ^λl', and a large negative number means that the received bit is a strong ^Λ0' . In comparison, the small positive number means the received bit is a weak ^Λl' and the small negative number means the received bit is a weak ^y0' . However, it is also known that continuous use of soft bits should be quantized to a discrete soft bit when implemented in a practical scenario.

A primary goal of such a quantization procedure should be to maximize the decoder performance. Generally, quantization to a discrete soft bit is accomplished, with a linear quantization process, which determines the quantization range from ^x-a' to ^Λ+b' (where ^λb' can be equal to ^λa' ) and divides the range evenly to the more than 2 levels. The LLR having a value smaller than ^x-a' is assigned to the first level and the LLR having a value larger than ^Λ+b' is assigned to the last level. The quantized soft bits then become the input for a soft decoder, often a forward error correction (FEC) decoder, which decodes the coded soft bits to the decoded binary bits.

In a linear quantization, each measurement within the entire range of the distribution is assigned to one of the levels, for example, to one of sixteen levels. Significant, however, is the fact that for each measurement the quantization range is changing. The change occurs in the range because, for every block, the LLR distribution is changing which makes accurate demodulation and decoding problematic and complex.

This invention seeks to provide a wireless communication unit and a method for receiving a digital wireless signal that aims to mitigate at least some of the above-mentioned disadvantages .

Summary of the Invention

According to embodiments of the present invention there is provided a wireless communication unit and a method for receiving a digital signal in a wireless communication unit are described, as claimed in the appended Claims. Brief Description of the Drawings

One embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which.

FIG. 1 shows a block diagram of a wireless communication unit adapted to support embodiments of the present invention;

FIG. 2 shows a block diagram of a digital communication architecture adapted to support embodiments of the present invention; and

FIG. 3 is a flow chart showing a method of receiving a digital signal in a wireless communication unit according to embodiments of the invention.

Description of Embodiments of the Invention

The inventors of the present invention have recognised and appreciated that the change of the LLR distribution shape is caused by the different fading channels. In particular, the variance of the distribution is due to the change of the ratio of energy per symbol (E_s) to noise density (N₀) , also referred to as ^ΛEs/No' .

Thus, determination of the quantization range is important because the bit error rate ("BER") performance of the communication system is improved when the quantization range is determined properly. However, a significant amount of information, such as the estimated noise level, is required to decide the correct quantization level, because the LLR distribution changes rapidly according to the signal power and the current channel characteristics.

For example, in a static channel, if the signal power is very strong, then the distribution has the appearance of a too-narrow Gaussian distribution, centred at both a positive number and a negative number with each of the distributions having similar amplitude. In contrast, in a fading environment, generally, the distribution is centred around zero .

Thus, the inventors have recognised that two problems arise with respect to linear quantization of LLR values. First, there is a problem of estimating an Es/No that is always changing. Secondly, there is a problem of determining an appropriate quantization range of LLR when the range is always changing.

In summary, the aforementioned problems, at least with respect to LLR calculations being responsive to a constantly changing Es/No, are resolved by assuming a substantially linear quantization of LLR values, and performing an offline simulation of scaling factor (Q) versus signal-to-noise ratio (SNR) values. The simulated results are then stored in a wireless communication unit, which interpolates between the simulated values to obtain a less complex computation of LLR values .

Although the preferred embodiment of the present invention is described with reference to a TETRA-I/TETRA-2 private/public mobile radio system, it is envisaged that the inventive concept may be applied in any wireless communication unit employing a modem that required quantization of fading channels, for example using LLR calculations.

Referring now to FIG. 1, a block diagram of a wireless dual- mode TETRA-I/TETRA-2 subscriber communication unit, otherwise referred to as a mobile station (MS), 100 is shown adapted to support embodiments of the present invention. The MS 100 contains an antenna 102 preferably coupled to a duplex filter or antenna switch 104 that provides isolation between receive chain 110 and transmit chain 120 within MS 100. The receiver chain 110 includes receiver front-end circuit 106 (effectively providing reception, filtering and intermediate or base-band frequency conversion) . The front- end circuit 106 scans signal transmissions from its associated base transceiver station (BTS) . The front-end circuit 106 is serially coupled to a signal processing function, generally realised by a digital signal processor (DSP), 108.

The signal processing logic 108 is arranged to perform the signal manipulation and processing of signals that are to be transmitted and/or received. In accordance with one embodiment of the invention, the signal processing logic 108 has been adapted as further described with respect to FIG. 2 and FIG. 3.

The front-end circuit 106 is operably coupled to a received signal strength indication (RSSI) 112 function/ so that the receiver can calculate receive bit-error-rate (BER) or frame-error-rate (FER) or similar link-quality measurement data from a received digital signal. A memory element 116 is operably coupled to the signal processing logic 108 and stores a wide array of MS-specific data, such as decoding/encoding data parameters and the like, as well as link quality measurement information, to enable an optimal communication link to be selected.

A timer 118 is operably coupled to a controller 114 to control the timing of operations, namely the transmission or reception of time-dependent signals, within the MS 100. As known in the art, received signals that are processed by the signal processing logic 108 are typically input to user interface 130, such as a speaker or visual display unit (VDU) .

As regards the transmit chain 120, this essentially includes an input device such as a keypad, of the user interface 130. The user interface 130 is coupled in series via the signal processing function 108 through transmitter/ modulation circuitry 122 and a power amplifier 124 to the antenna 102. The transmitter/ modulation circuitry 122 and the power amplifier 124 are operationally responsive to the controller 114.

Referring now to FIG. 2, an overview of a digital communication system architecture 200 adapted in accordance with one embodiment of the present invention is shown. The digital communication system architecture 200 includes a transmitter 210. The transmitter 210 receives a data stream 212 di for transmission and performs FEC (forward error correction) encoding 215 of the data stream to produce an output bi 217. The coded output bi 217 is input to a mapping function 220, which associates a subset of bits Xk

222 to a location on a constellation. The constellation generated by the transmitter 210 is fed to the modulation scheme employed by the modulator 225. The modulator 225 then outputs the modulated signal s^ 227 over the communication channel 235.

A receiver 250 receives the modulated signal r^ 252 over the communication channel 235. In effect, the receiver 250 performs the inverse operations of the transmitter 210. In this regard, the receiver 250 includes a demodulator 255 to translate the received samples into a number of symbols. The symbols are then input to a de-mapping function 260. In the de-mapping function 260, bit metrics are computed and input to a LLR logic element 262. The LLR logic element outputs quantized bits to FEC decoder 265. This computation involves the frequency channel coefficients, which must thus be estimated periodically. FEC decoder 265 outputs the decoded bits d_t 267

In accordance with one embodiment of the present invention, the LLR logic element 262 has been adapted to perform adaptive quantization of soft bits that overcome the hereinbefore-mentioned disadvantages. Notably, the improved wireless communication unit comprising the adapted LLR logic element is arranged to adaptively determine a suitable LLR quantization range with reduced computational complexity.

In one embodiment, the quantization range is predetermined by the number of bits used for the LLR field within the FEC decoder. In accordance with one embodiment of the present invention, the LLR logic element 262 utilises signal to noise estimation values 270, in order to identify a scaling factor to be applied to the calculated LLR values.

An example algorithm for the quantization performed by the LLR logic element 262, in one embodiment of the present invention, is described as follows. Let us assume that the required range for the LLRs is from -A to A, where A is a positive integer. Let us also denote ^ΛQ' as a scaling factor. The (received) input data to the algorithm performed by the LLR logic element 262 is the vector of the LLRs (floating point values) , as provided by the de-mapping logic 260. The input data is multiplied by the identified scaling factor (Q) for the measured SNR value. Then a saturation is applied to these values, by replacing all values outside the interval [-A, +A] by the closest end of this interval. Thus, in one embodiment of the present invention, if a number is positive and larger than A, it is replaced by the specific value ^λA' , and if a number is negative and is smaller than -A, then it is replaced by ^λ- A' .

The final stage of the algorithm performed by the LLR logic element 262 is to take the integer part of the above process, e.g. values only between ^λ-A' and ^ΛA' , and obtain the discretized (rounded) soft bits, to be used by the FEC decoding algorithm.

In accordance with one embodiment of the present invention, the inventors have determined that for each value of the SNR, a different value for the scaling factor (Q) is optimal. Thus, in one embodiment of the present invention, a series of extensive simulations are performed to obtain the optimum value of the scaling factor (Q) for a representative set of measured values of SNR. A limited number of scaling factor (Q) values for each SNR value are stored in memory element 116 of FIG. 1.

In one embodiment, the range of scaling factor (Q) for each required SNR value may be stored as a table of values in memory element 116 of FIG. 1. The SNR value, for a particular received signal, is obtained by the front-end circuit 106 receiving a digital signal that is then computed and processed by RSSI function 112. In this manner, the stored table of values may be utilised by the LLR logic element 262 of the signal processing logic 108. Thereafter, a simple interpolation is performed between the two closest stored SNR values to the measured SNR value, in order to obtain the optimum scaling factor (Q) for each required SNR.

In one embodiment of the present invention, it is envisaged that the extensive simulations may be performed off-line. In this regard, the results may be incorporated into memory element 116 at device manufacture, or downloaded via a codeplug or programmed over-the-air . Thus, in this off-line embodiment, a table of scaling factor (Q) values vs. SNR factors, to minimize the frame error rate, may be identified for, say the following SNR values: 5dB, 10 dB, 15dB, 2OdB, 25dB, 3OdB, and 35dB. For example, simulation results for the aforementioned SNR values were identified as follows, for various modulation schemes :

QAM4

SNR_interρ/dB = [ 5 10 15 20 25 30 35];

1/Q = [ 1.4 0.9 0.6 0.4 0.1 0.1 0.1].

QAMl6

SNR_interp/dB = [ 5 10 15 20 25 30 35];

1/Q = [5.6 1.9 1.2 0.4 0.1 0.1 0.1].

QAM64

SNR_interp/dB = [ 5 10 15 20 25 30 35]; 1/Q = [7.7 6.6 3.1 1.3 0.2 0.1 0.1].

Using these values, the LLR logic 262 or noise estimation logic 270 performs a linear (or substantially linear) interpolation between the stored simulation values in order to obtain a particular scaling factor (Q) for a measured SNR.

One example of the quantization performed on these received signals, where ^λLLR' denotes the vector of LLRs, is as follows:

for (1=0, Klength (LLR) ;I++) {

QLLR[I] = round(LLR[I]*scaling factor (Q)*127); If (QLLR[I]>127)

QLLR[I] = 127; If (QLLR[I]<-127) QLLR[I] - -127;

} The output from the above algorithm is the quantized LLR values.

Referring now to FIG. 3, a flowchart 300 illustrates one embodiment of the present invention in obtaining scaling factors (Q) for changing SNR values. First, an off-line simulation process is run, in step 305. The simulation scenario is set, in step 310, for example by defining typical communication parameters regarding say, mobile speed, communication environment, etc. An initial value for the scaling factor (Q) is set in step 315. The input data to the algorithm is a vector of floating point values of the LLRs.

A series of simulations are performed, calculating respective frame error rates (FER) for varying SNR values, as shown in step 320. Values of the scaling factor (Q) for each simulation using a different SNR value are calculated, as shown in step 325.

A determination of the optimum scaling factor (Q) to minimise FER, is found in step 330, for each of the SNR values, as shown in step 335. These simulated scaling factors (Q) for respective SNR values are stored in the wireless communication unit for subsequent use, as shown in step 350. Thus, thereafter, the wireless communication unit measures a SNR value of the received signal and utilises these stored scaling factors (Q) , and interpolates between them to scale the calculated LLR value, as in step 355.

Thus, embodiments of the present invention aim to provide at least one or more of the following advantages: (i) Since the FEC engine is generally a fixed point algorithm, the aforementioned use of a scaling factor (Q) to be applied to calculated LLR values assists in properly- quantizing the inputs to the FEC decoder. (ϋ) By incorporating a substantially linear interpolation between simulated scaling factors (Q) , a reduced complexity, and improved accuracy of the received demodulated signal can be achieved.

In this manner, a wireless communication unit and a method for receiving a digital wireless signal are provided that aim to mitigate one or more of the aforementioned disadvantages with present communications systems, methods or units.

Whilst specific embodiments of the present invention have been described, it is clear that one skilled in the art could readily apply further variations and modifications of such embodiments within the scope of the accompanying claims .

It will be appreciated that references to specific functional devices or elements are only to be seen as references to suitable means for providing the described functionality, rather than indicative of a strict logical or physical structure or organization of components.

Aspects of the invention may be implemented in any suitable form. The elements and components of an embodiment of the invention may be physically, functionally and/or logically implemented in any suitable way. Indeed, the functionality of scaling any calculated LLR value may be performed by another element within the receiver architecture.

Although the present invention has been described in connection with some embodiments, it is not intended to be limited to the specific form set forth herein. Rather, the scope of the present invention is limited only by the accompanying claims. Additionally, although a feature may appear to be described in connection with particular embodiments, one skilled in the art would recognize -that various features of the described embodiments may be combined in accordance with the invention. In the claims, the term Comprising' does not exclude the presence of other elements or steps.

Furthermore, although individual features may be included in different claims, these may possibly be advantageously combined, and the inclusion in different claims does not imply that a combination of features is not feasible and/or advantageous. Also, the inclusion of a feature in one category of claims does not imply a limitation to this category, but rather indicates that the feature is equally applicable to other claim categories, as appropriate.

Furthermore, the order of features in the claims does not imply any specific order in which the features must be performed and in particular the order of individual steps in a method claim does not imply that the steps must be performed in this order. Rather, the steps may be performed in any suitable order. In addition, singular references do not exclude a plurality. Thus, references to "a", "an", "first", "second", etc. do not preclude a plurality.

Claims

1. A wireless communication unit (100) comprising a receiver for receiving a wireless signal having signal-to- noise ratio (SNR) measurement logic (112) for measuring a

SNR value of the received signal and signal processing logic (108) arranged to process the received wireless signal wherein the signal processing logic comprises demodulator logic (255) for demodulating the received wireless signal operably coupled to log likelihood ratio (LLR) logic (262) and decoding logic (265) for decoding the demodulated received wireless signal, the wireless communication unit (100) characterised in that a scaling factor (Q) is applied to the LLR logic (262) dependent upon the measured signal- to-noise ratio.

2. The wireless communication unit (100) according to Claim 1 further characterised by a memory element (116) arranged to store a plurality of scaling factors (Q) applied to the LLR logic (262) .

3. The wireless communication unit (100) according to Claim 2 further characterised in that the memory element (116) is arranged to store a plurality of simulated values of scaling factors (Q) applied to the LLR logic (262) for respective SNR values.

4. The wireless communication unit (100) according to Claim 1 further characterised in that the LLR logic (262) applies a limit to the range of output LLR values to be calculated.

5. The wireless communication unit (100) according to Claim 2 wherein the LLR logic (262) interpolates between measured SNR values to obtain the scaling factor (Q) .

6. The wireless communication unit (100) according to Claim 1 further characterised in that the wireless communication unit is capable of operating in a TETRA communication system (100) .

7. A method for receiving a signal in a wireless communication unit (300) comprising the steps of: receiving a wireless signal; measuring a signal-to-noise ratio (SNR) value of the received wireless signal; demodulating the received wireless signal; and applying log likelihood ratio (LLR) calculation on the demodulated signal; wherein the method (300) is characterised by: applying (355) a scaling factor (Q) to the log likelihood ratio (LLR) calculation dependent upon the measured signal-to-noise ratio.

8. The method of Claim 7 further characterised by the step of: interpolating between measured SNR values to identify the scaling factor (Q) to be applied to the LLR calculation.