EP1730591A4 - Lithographie electrique a l'echelle nanometrique - Google Patents

Lithographie electrique a l'echelle nanometrique

Info

Publication number
EP1730591A4
EP1730591A4 EP20050705521 EP05705521A EP1730591A4 EP 1730591 A4 EP1730591 A4 EP 1730591A4 EP 20050705521 EP20050705521 EP 20050705521 EP 05705521 A EP05705521 A EP 05705521A EP 1730591 A4 EP1730591 A4 EP 1730591A4
Authority
EP
Grant status
Application
Patent type
Prior art keywords
conductive
substrate
mask
layer
method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP20050705521
Other languages
German (de)
English (en)
Other versions
EP1730591A2 (fr )
EP1730591B1 (fr )
Inventor
Yong Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of California
Original Assignee
University of California
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G13/00Electrographic processes using a charge pattern
    • G03G13/26Electrographic processes using a charge pattern for the production of printing plates for non-xerographic printing processes
    • G03G13/28Planographic printing plates
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G13/00Electrographic processes using a charge pattern
    • G03G13/26Electrographic processes using a charge pattern for the production of printing plates for non-xerographic printing processes
    • G03G13/28Planographic printing plates
    • G03G13/283Planographic printing plates obtained by a process including the transfer of a tonered image, i.e. indirect process
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G13/00Electrographic processes using a charge pattern
    • G03G13/26Electrographic processes using a charge pattern for the production of printing plates for non-xerographic printing processes
    • G03G13/28Planographic printing plates
    • G03G13/286Planographic printing plates for dry lithography

Abstract

L'invention concerne un procédé lithographique à l'échelle nanométrique dans lequel un masque conducteur réutilisable qui comprend un motif de surfaces conductrices et de surfaces isolantes est positionné sur un substrat dont la surface contient une couche de réserve à réactivité électrique disposée sur une couche conductrice enterrée. Lorsqu'un champ électrique est appliqué entre le masque conducteur et la couche conductrice enterrée, la couche de réserve est altérée dans des parties adjacentes aux zones conductrices du masque. Un traitement sélectif est effectué sur la surface du substrat, après élimination du masque, afin d'éliminer des parties de la couche de réserve en fonction du motif transféré à partir du masque. Le substrat peut être un substrat cible, ou peut être utilisé pour une étape de formation de masque lithographique sur un autre substrat. Selon un aspect de l'invention, les électrodes aux bornes desquelles la charge est appliquée sont divisées, par exemple en une pluralité de lignes et de colonnes dans lesquelles un motif désiré peut être créé sans que la fabrication de masques spécifiques ne soit nécessaire.
EP20050705521 2004-01-12 2005-01-12 Lithographie electrique a l'echelle nanometrique Active EP1730591B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US53611504 true 2004-01-12 2004-01-12
PCT/US2005/000901 WO2005070167A3 (fr) 2004-01-12 2005-01-12 Lithographie electrique a l'echelle nanometrique

Publications (3)

Publication Number Publication Date
EP1730591A2 true EP1730591A2 (fr) 2006-12-13
EP1730591A4 true true EP1730591A4 (fr) 2009-06-03
EP1730591B1 EP1730591B1 (fr) 2011-08-03

Family

ID=34806986

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20050705521 Active EP1730591B1 (fr) 2004-01-12 2005-01-12 Lithographie electrique a l'echelle nanometrique

Country Status (6)

Country Link
US (2) US7455788B2 (fr)
EP (1) EP1730591B1 (fr)
JP (1) JP4892684B2 (fr)
KR (1) KR100868887B1 (fr)
CN (1) CN101124089B (fr)
WO (1) WO2005070167A3 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4892684B2 (ja) * 2004-01-12 2012-03-07 ザ・リージェンツ・オブ・ザ・ユニバーシティ・オブ・カリフォルニアThe Regents of the University of California ナノスケール電気リソグラフィー法
JP4804028B2 (ja) * 2005-04-25 2011-10-26 東京応化工業株式会社 ナノ構造体の製造方法
US20070048448A1 (en) * 2005-08-17 2007-03-01 Kim Dae H Patterning method using coatings containing ionic components
DE102010046730A1 (de) * 2010-09-24 2012-03-29 Helmholtz-Zentrum Berlin Für Materialien Und Energie Gmbh Fotolithografisches Verfahren zum Ausbilden einer dreidimensionalen Struktur
JP6178651B2 (ja) 2013-07-19 2017-08-09 株式会社東芝 パターン転写用モールド及びパターン形成方法
US9396958B2 (en) * 2014-10-14 2016-07-19 Tokyo Electron Limited Self-aligned patterning using directed self-assembly of block copolymers

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4119688A (en) * 1975-11-03 1978-10-10 International Business Machines Corporation Electro-lithography method
EP0404742A2 (fr) * 1989-06-19 1990-12-27 International Business Machines Corporation Méthode de réalisation et d'utilisation d'un masque lithographique de haute résolution
US20020005391A1 (en) * 1999-12-23 2002-01-17 Erik Schaffer Methods and apparatus for forming submicron patterns on films
US20020118369A1 (en) * 2001-02-26 2002-08-29 James Misewich Assembling arrays of small particles using an atomic force microscope to define ferroelectric domains
WO2003099536A1 (fr) * 2002-05-24 2003-12-04 Chou Stephen Y Procedes et appareil d'empreinte lithographique par pression induite par des champs

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US3774079A (en) * 1971-06-25 1973-11-20 Ibm Monolithically fabricated tranistor circuit with multilayer conductive patterns
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JPS5651499B2 (fr) * 1978-07-19 1981-12-05
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US5098860A (en) * 1990-05-07 1992-03-24 The Boeing Company Method of fabricating high-density interconnect structures having tantalum/tantalum oxide layers
JPH05258604A (ja) 1992-03-12 1993-10-08 Toshiba Lighting & Technol Corp けい光ランプ装置
US5583378A (en) * 1994-05-16 1996-12-10 Amkor Electronics, Inc. Ball grid array integrated circuit package with thermal conductor
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JP3159237B2 (ja) * 1996-06-03 2001-04-23 日本電気株式会社 半導体装置およびその製造方法
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US6077775A (en) * 1998-08-20 2000-06-20 The United States Of America As Represented By The Secretary Of The Navy Process for making a semiconductor device with barrier film formation using a metal halide and products thereof
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JP2001118772A (ja) * 1999-10-18 2001-04-27 Seiichi Iwamatsu 電子線転写露光装置
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US4119688A (en) * 1975-11-03 1978-10-10 International Business Machines Corporation Electro-lithography method
EP0404742A2 (fr) * 1989-06-19 1990-12-27 International Business Machines Corporation Méthode de réalisation et d'utilisation d'un masque lithographique de haute résolution
US20020005391A1 (en) * 1999-12-23 2002-01-17 Erik Schaffer Methods and apparatus for forming submicron patterns on films
US20020118369A1 (en) * 2001-02-26 2002-08-29 James Misewich Assembling arrays of small particles using an atomic force microscope to define ferroelectric domains
WO2003099536A1 (fr) * 2002-05-24 2003-12-04 Chou Stephen Y Procedes et appareil d'empreinte lithographique par pression induite par des champs

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ATSUSHI YOKOO: "Nanoelectrode Lithography", JPN. J. APPL. PHYS., vol. 42, 1 February 2003 (2003-02-01), pages L92 - L94, XP002524187 *
See also references of WO2005070167A2 *
TH. MÜHL ET AL.: "Parallel nanolithography in carbon layers with conductive imprint stamps", APPLIED PHYSICS LETTERS, vol. 76, no. 6, 7 February 2000 (2000-02-07), pages 786 - 788, XP002524186 *

Also Published As

Publication number Publication date Type
WO2005070167A2 (fr) 2005-08-04 application
EP1730591A2 (fr) 2006-12-13 application
JP4892684B2 (ja) 2012-03-07 grant
JP2007525832A (ja) 2007-09-06 application
KR100868887B1 (ko) 2008-11-17 grant
US7455788B2 (en) 2008-11-25 grant
CN101124089A (zh) 2008-02-13 application
EP1730591B1 (fr) 2011-08-03 grant
CN101124089B (zh) 2011-02-09 grant
US20090104550A1 (en) 2009-04-23 application
US8562795B2 (en) 2013-10-22 grant
KR20060128904A (ko) 2006-12-14 application
WO2005070167A3 (fr) 2007-05-31 application
WO2005070167A8 (fr) 2006-12-07 application
US20070034599A1 (en) 2007-02-15 application

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