EP1665337A4 - Doped alloys for electrical interconnects, methods of production and uses thereof - Google Patents

Doped alloys for electrical interconnects, methods of production and uses thereof

Info

Publication number
EP1665337A4
EP1665337A4 EP04783167A EP04783167A EP1665337A4 EP 1665337 A4 EP1665337 A4 EP 1665337A4 EP 04783167 A EP04783167 A EP 04783167A EP 04783167 A EP04783167 A EP 04783167A EP 1665337 A4 EP1665337 A4 EP 1665337A4
Authority
EP
European Patent Office
Prior art keywords
copper
phosphorus
ppm
based dopant
solder material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04783167A
Other languages
German (de)
French (fr)
Other versions
EP1665337A2 (en
Inventor
Nancy Dean
James Flint
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell International Inc
Original Assignee
Honeywell International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell International Inc filed Critical Honeywell International Inc
Publication of EP1665337A2 publication Critical patent/EP1665337A2/en
Publication of EP1665337A4 publication Critical patent/EP1665337A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262Sn as the principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01027Cobalt [Co]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01032Germanium [Ge]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01049Indium [In]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01051Antimony [Sb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01057Lanthanum [La]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01067Holmium [Ho]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01084Polonium [Po]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • H01L2924/13034Silicon Controlled Rectifier [SCR]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19042Component type being an inductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor

Definitions

  • the field of the invention is thermal interconnect systems, thermal interface systems and interface materials in electronic components, semiconductor components and other related layered materials applications.
  • the spheres, balls, powder, preforms or some other solder-based component that can provide an electrical interconnect between two components are utilized.
  • the spheres form the electrical interconnect between a package and a printed circuit board and/or the electrical interconnection between a semiconductor die and package or board.
  • the locations where the spheres contact the board, package or die are called bond pads.
  • the interaction of the bond pad metallurgy with the sphere during solder reflow can determine the quality of the joint, and little interaction or reaction will lead to a joint that fails easily at the bond pad.
  • the Niedrich patents and application show copper used as a dopant in Sn-Pb-In solders to minimize the consumption of copper bond pads or connectors (i.e., no nickel barrier layer is used).
  • the copper in the solder was found to decrease the copper connector dissolution.
  • Niedrich uses the copper to inhibit nickel barrier layer interaction through forming copper interaietallics or (Cu, Ni)Sn intennetallics.
  • the Niedrich patents are very similar in their use of copper as US 2671844, which adds copper to solder in amounts greater than 0.5 wt % to rn imize dissolution of copper soldering iron tips during fine soldering operations.
  • the copper concentration used is in excess of 1000 ppm and several other elements are also added as alloying additions to improve the liquidus, solidus, flow properties and surface finish of the solder.
  • US Issued Patent 2303193A teaches the use of 0.1 - 1.5% Cu (1000 - 15,000 ppm Cu) in addition to Cd and Sb to increase the creep resistance of the solder.
  • solder in less than the amount indicated is not sufficient materially to improve the durability over ordinary lead-tin alloys.
  • solder materials and solder dopants that have no deleterious effects on bulk solder properties, yet slows the consumption of the nickel-barrier layer and hence growth of a phosphorus rich layer, so that bond integrity is maintained during reflow and post reflow thermal aging; b) design and produce electrical interconnects that meet customer specifications while minimizing the production costs and maximizing the quality of the product incorporating the electrical interconnects; and c) develop reliable methods of producing electrical interconnects and components comprising those interconnects.
  • Solder materials and dopants described herein comprise at least one solder material, at least one phosphorus-based dopant and at least one copper-based dopant.
  • Methods of forming doped solder materials include: a) providing at least one solder material; b) providing at least one phosphorus-based dopant; c) providing at least one copper-based dopant, and d) blending the at least one solder material, the at least one phosphorus-based dopant and the at least one copper-based dopant to form a doped solder material.
  • Layered materials are also described herein that comprise: a) a surface or substrate; b) an electrical interconnect; c) a solder material comprising at least one phosphorus-based dopant and at least one copper-based dopant, such as those described herein, and d) a semiconductor die or package. Electronic and semiconductor components that comprise solder materials and/or layered materials described herein are also contemplated.
  • the metallization on a substrate, package or board to which electrical interconnects, such as BGA spheres, are typically bonded is usually copper. Copper reacts rapidly with the major constituent of most solders (tin) to form Cu-Sn intermetallic compounds, which grows rapidly and can exhibit spalling or breakage from the interface. This breakage reduces the strength and integrity of the solder joint.
  • barrier layers that prevent direct contact of Sn and Cu are utilized. These additional layers are often referred to as bond pad metallurgy or under bump metallurgy (UBM). Bond pad metallurgy for BGA spheres typically has involved the use of nickel-plating to provide a barrier layer for the copper and a thin coating of gold to maintain solderability.
  • Solder joint failures occur through this phosphorus rich layer. These types of failures are known in the industry as "Black Pad” failures, as the phosphorus rich layer that is exposed by the failure can have a blackish appearance. Since intermetallics can grow rapidly even in the solid state when the joint is exposed to elevated temperatures, these failures can occur in thermally aged joints that appeared to be good immediately after solder reflow. Solder materials and dopants contemplated herein comprise at least one solder material, at least one phosphorus-based dopant and at least one copper-based dopant.
  • Methods of forming doped solder materials described herein comprise: a) providing at least one solder material; b) providing at least one phosphorus-based dopant; c) providing at least one copper-based dopant, and d) blending the at least one solder material, the at least one phosphorus-based dopant and the at least one copper-based dopant to forai a doped solder material, hi contemplated embodiments, the dopants of copper and phosphorus that are added to the solder alloy or material reduce the consumption of the Electroless Nickel (EN) plated barrier layer.
  • EN Electroless Nickel
  • the dopants are added to the solder alloy that could be used to produce powders, paste, ingots, wire, preforms or BGA spheres through a process such as that described in coiTvmonly-owned US Issued Patent No. 6579479, which is incorporated herein in its entirety by reference.
  • Layered materials are also contemplated herein that comprise: a) a surface or substrate; b) an electrical interconnect; c) a solder material comprising a phosphorus-based dopant and a copper-based dopant, such as those described herein, and d) a semiconductor die or package.
  • Contemplated surfaces may comprise a printed circuit board or a suitable electronic component.
  • solder materials and/or layered materials described herein are also contemplated.
  • Contemplated embodiments described herein differ from the cited references in that the concentrations of alloying additions made and in the use of phosphorus as an additive to the solder are different and surprisingly effective.
  • High levels of copper in the solder are shown in multiple papers, such as the Jeon papers cited previously herein, to lower the consumption of the intermetallic layer. The levels utilized herein are lower by a factor of 2.5 - >10.
  • the work by Ho shows that a different intermetallic forms at the nickel/solder interface for copper compositions below 0.2% (2000 ppm). The combination of copper and phosphorus was not noted anywhere in the levels of the subject matter presented herein.
  • the Niedrich patents described previously herein use copper to inhibit nickel barrier layer interaction through forming copper intermetallics or (Cu, Ni)Sn intermetallics.
  • the Niedrich patents are very similar in their use of copper as US 2671844, which adds copper to solder in amounts greater than 0.5 wt % to minimize dissolution of copper soldering iron tips during fine soldering operations. Both of these copper additions need to be significantly higher than the amounts contemplated herein. The same is true for the Ozaki patent, wherein the addition of copper is significantly higher than the amounts contemplated herein.
  • the solder material may comprise any suitable solder material, alloy or metal, such as indium, lead, silver, copper, aluminum, tin, bismuth, gallium and alloys thereof, silver coated copper, silver coated aluminum or a combination thereof.
  • Preferred solder materials may comprise lead-tin alloys, including a lead (37%)-tin (63%) eutectic alloy, indium tin (InSn) compounds and alloys, indium silver (InAg) compounds and alloys, indium-based compounds, tin silver copper compounds (which already comprise copper) and alloys (SnAgCu), tin bismuth compounds and alloys (SnBi), aluminum-based compounds and alloys and combinations thereof.
  • metal means those elements that are in the d-block and f-block of the Periodic Chart of the Elements, along with those elements that have metal-like properties, such as silicon and germanium.
  • d- block means those elements that have electrons filling the 3d, 4d, 5d, and 6d orbitals surrounding the nucleus of the element.
  • f-block means those elements that have electrons filling the 4f and 5f orbitals surrounding the nucleus of the element, including the lanthanides and the actinides.
  • Preferred metals include such as indium, lead, silver, copper, aluminum, tin, bismuth, gallium and alloys thereof, silver coated copper, and silver coated aluminum.
  • metal also includes alloys, metal/metal composites, metal ceramic composites, metal polymer composites, as well as other metal composites.
  • compound means a substance with constant composition that can be broken down into elements by chemical processes.
  • Contemplated dopants comprise at least one phosphorus-based compound/dopant and at least one copper-based compound dopant. Dopant levels contemplated herein are less than about 100 ppm for phosphorus and less than about 800 ppm for copper. In some embodiments, the dopant levels are contemplated to be about 10-100 ppm for phosphorus and about 25-800 ppm copper.
  • the dopant levels are contemplated to be about 10-70 ppm for phosphorus and about 25-500 ppm copper. In other embodiments, the dopant levels are contemplated to be about 20-60 ppm for phosphorus and about 40-600 ppm copper. In yet other embodiments, the dopant levels are contemplated to be about 30 - 60 ppm for phosphorus and about 300 - 500 ppm copper.
  • the dopant materials could be added to the solder main constituents directly during casting. When small amounts of dopant are used, it may be desirable to make a master alloy and dilute that with undoped solder for better control over dopant concentration.
  • the at least one solder material, the at least one phosphorus-based compound/dopant andor the at least one copper-based compound/dopant may be provided by any suitable method, including a) buying the at least one solder material, the at least one phosphorus-based compound/dopant and/or the at least one copper-based compound/dopant a supplier; b) preparing or producing at least some .of the at least one solder material, the at least one phosphorus-based compound/dopant and/or the at least one copper-based compound/dopant a supplier in house using chemicals provided by another source and/or c) preparing or producing the at least one solder material, the at least one phosphorus-based compound/dopant and/or the at least one copper-based compound/dopant a supplier in house using chemicals also produced or provided in house or at the location.
  • Solder materials, spheres and other related materials described herein may also be used to produce solder pastes, polymer solders and other solder-based formulations and materials, such as those found in the following Honeywell International Inc.'s issued patents and pending patent applications, which are commonly-owned and incorporated herein in their entirety: US Patent Application Serial Nos. 09/851103, 60/357754, 60/372525, 60/396294, and 09/543628; and PCT Pending Application Serial No.: PCT/US02/14613, and all related continuations, divisionals, continuation-in-parts and foreign applications.
  • Solder materials, coating compositions and other related materials described herein may also be used as components or to construct electronic-based products, electronic components and semiconductor components, contemplated embodiments, the alloys, disclosed herein may be used to produce BGA spheres, may be utilized in an electronic assembly comprising BGA spheres, such as a bumped or balled die, package or substrate, and may be used as an anode, wire or paste or may also be used in bath form.
  • the spheres are attached to the package/substrate or die and reflowed in a similar manner as undoped spheres.
  • the dopant slows the consumption rate for the EN coating and results in higher integrity (higher strength) joints.
  • Electronic-based products can be "finished” in the sense that they are ready to be used in industry or by other consumers. Examples of finished consumer products are a television, a computer, a cell phone, a pager, a palm-type organizer, a portable radio, a car stereo, and a remote control. Also contemplated are “intermediate” products such as circuit boards, chip packaging, and keyboards that are potentially utilized in finished products.
  • Electronic products may also comprise a prototype component, at any stage of development from conceptual model to final scale-up/mock-up.
  • a prototype may or may not contain all of the actual components intended in a finished product, and a prototype may have some components that are constructed out of composite material in order to negate their initial effects on other components while being initially tested.
  • the term "electronic component” means any device or part that can be used in a circuit to obtain some desired electrical action.
  • Electronic components contemplated herein may be classified in many different ways, including classification into active components and passive components. Active components are electronic components capable of some dynamic function, such as amplification, oscillation, or signal control, which usually requires a power source for its operation. Examples are bipolar transistors, field-effect transistors, and integrated circuits.
  • Passive components are electronic components that are static in operation, i.e., are ordinarily incapable of amplification or oscillation, and usually require no power for their characteristic operation. Examples are conventional resistors, capacitors, inductors, diodes, rectifiers and fuses.
  • Electronic components contemplated herein may also be classified as conductors, semiconductors, or insulators.
  • conductors are components that allow charge carriers (such as electrons) to move with ease among atoms as in an electric current.
  • Examples of conductor components are circuit traces and vias comprising metals.
  • Insulators are components where the function is substantially related to the ability of a material to be extremely resistant to conduction of current, such as a material employed to electrically separate other components
  • semiconductors are components having a function that is substantially related to the ability of a material to conduct current with a natural resistivity between conductors and insulators. Examples of semiconductor components are transistors, diodes, some lasers, rectifiers, thyristors and photosensors.
  • Power source components are typically used to power other components, and include batteries, capacitors, coils, and fuel cells.
  • battery means a device that produces usable amounts of electrical power through chemical reactions.
  • rechargeable or secondary batteries are devices that store usable amounts of electrical energy through chemical reactions.
  • Power consuming components include resistors, transistors, ICs, sensors, and the like.
  • Discreet components are devices that offer one particular electrical property concentrated at one place in a circuit. Examples are resistors, capacitors, diodes, and transistors. Integrated components are combinations of components that that can provide multiple electrical properties at one place in a circuit. Examples are ICs, i.e., integrated circuits in which multiple components and connecting traces are combined to perform multiple or complex functions such as logic.
  • ICs i.e., integrated circuits in which multiple components and connecting traces are combined to perform multiple or complex functions such as logic.
  • Example #1 40 ppm +/- 10 ppm for copper and phosphorus
  • Example #2 500 ppm +/- 10 ppm for copper and 30 ppm +/- 10 ppm for phosphorus
  • Example #3 200 ppm +/- 10 ppm for copper and 30 ppm +/- 10 ppm for phosphorus
  • Example #4 200 ppm +/- 30 ppm for copper and 15 ppm +/- 5 ppm for phosphorus >
  • Example #5 Undoped Sn-37Pb alloy (control)

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Solder materials and dopants described herein comprise at least one solder material, at least one phosphorus-based dopant and at least one copper-based dopant. Methods of forming doped solder materials include: a) providing at least one solder material; b) providing at least one phosphorus-based dopant; c) providing at least one copper-based dopant, and d) blending the at least one solder material, the at least one phosphorus-based dopant and the at least one copper-based dopant to form a doped solder material. Layered materials are also described herein that comprise: a) a surface or substrate; b) an electrical interconnect; c) a solder material comprising at least one phosphorus-based dopant and at least one copper-based dopant, such as those described herein, and d) a semiconductor die or package. Electronic and semiconductor components that comprise solder materials and/or layered materials described herein are also contemplated.

Description

DOPED ALLOYS FOR ELECTRICAL INTERCONNECTS, METHODS OF PRODUCTION AND USES THEREOF
This application is a utility application based on US Provisional Application Serial No.: 60/501,384, which is commonly owned and incorporated herein in its entirety by reference.
FIELD OF THE SUBJECT MATTER
The field of the invention is thermal interconnect systems, thermal interface systems and interface materials in electronic components, semiconductor components and other related layered materials applications.
BACKGROUND OF THE SUBJECT MATTER Electronic components are used in ever increasing numbers of consumer and commercial electronic products. Examples of some of these consumer and commercial products are televisions, personal computers, Internet servers, cell phones, pagers, palm-type organizers, portable radios, car stereos, or remote controls. As the demand for these consumer and commercial electronics increases, there is also a demand for those same products to become smaller, more functional, and more portable for consumers and businesses.
As a result of the size decrease in these products, the components that comprise the products must also become smaller. Examples of some of those components that need to be reduced in size or scaled down are printed circuit or wiring boards, resistors, wiring, keyboards, touch pads, and chip packaging. Components, therefore, are being broken down and investigated to determine if there are better building and intemiediate materials, machinery and methods that will allow them to be scaled down to accommodate the demands for smaller electronic components. Part of the process of determining if there are better building materials, machinery and methods is to investigate how the manufactaring equipment and methods of building and assembling the components operates.
For those components that require electronic interconnects, the spheres, balls, powder, preforms or some other solder-based component that can provide an electrical interconnect between two components are utilized. In the case of BGA spheres, the spheres form the electrical interconnect between a package and a printed circuit board and/or the electrical interconnection between a semiconductor die and package or board. The locations where the spheres contact the board, package or die are called bond pads. The interaction of the bond pad metallurgy with the sphere during solder reflow can determine the quality of the joint, and little interaction or reaction will lead to a joint that fails easily at the bond pad. Too much reaction or interaction of the bond pad metallurgy can lead to the same problem through excessive formation of brittle intermetallics or undesirable products resulting from the formation of intermetallics. There are several approaches to correct and/or reduce the solder problems presented herein. For example, Japanese patent, JP07195189A, uses bismuth, copper and antimony simultaneously as dopants in a BGA sphere to improve joint integrity. Phosphorous may or may not be added; however, results in this patent show that phosphorus additions performed poorly. Phosphorus was added in high weight percentages, as compared to other components. Levels of copper ranged from 100 ppm to 1000 ppm. In "Effect of Cu Concentration on the reactions between Sn-Ag-Cu Solders and Ni",
Journal of Electronic Materials, Vol. 31, No 6, p 584, 2002 by C.E. Ho,et. al, and Republic of
China Patent 1490961 (March 23, 2001); C.R. Kao and C.E Ho, the effect of copper additions on improving Sn-Pb eutectic performance on ENIG bond pads is investigated. Compositions comprising less than 2000 ppm Cu were not investigated. Jeon, et. al, "Studies of Electroless Nickel Under Bump Metallurgy - Solder Interfacial Reactions and Their Effects on Flip Chip Joint Reliability", Journal of Electronic Materials, pg 520-528, Vol 31, No 5, 2002, and Jeon etal, "Comparison of Interfacial Reactions and Reliabilities of Sn3.5Ag and Sn4.0Ag0.5Cu and Sn0.7Cu Solder Bumps on Electroless Ni-P UBMs" Proceeding of Electronic Components and Technology Conference, IEEE, pg 1203, 2003 discuss that intermetallic growth is faster on pure nickel bond pads than electroless nickel bonds pads. The benefits of copper in concentrations of 0.5% (5000 ppm) or higher are also investigated and discussed in both articles. Zhang, et.al, "Effects of Substrate Metallization on Solder/UnderBump Metallization
Interfacial Reactions in Flip-Chip Packages during Multiple Reflow Cycles", Journal of Electronic Materials, Vol 32, No 3, pg 123-130, 2003 .shows there is no effect from phosphorus on slowing intermetallic consumption (which contradicts the Jeon article). Shing Yeh, "Copper Doped Eutectic Tin-Lead Bump for Power Flip Chip Applications", Proceeding of Electronic Components and Technology Conference, IEEE, pg 338, 2003 notes that a 1% copper addition reduced nickel layer consumption. The Niedrich patents and application (EP0400363 Al EP0400363B1 and US5011658) show copper used as a dopant in Sn-Pb-In solders to minimize the consumption of copper bond pads or connectors (i.e., no nickel barrier layer is used). The copper in the solder was found to decrease the copper connector dissolution. Niedrich uses the copper to inhibit nickel barrier layer interaction through forming copper interaietallics or (Cu, Ni)Sn intennetallics. The Niedrich patents are very similar in their use of copper as US 2671844, which adds copper to solder in amounts greater than 0.5 wt % to rn imize dissolution of copper soldering iron tips during fine soldering operations. The US Issued Patent 4,938,924 by Ozaki noted that the addition of 2000 - 4000 ppm of copper improves wetting and long term joint reliability of in Sn-36Pb-2Ag alloys. Japanese Patent JP60166191A "Solder Alloy Having Excellent Resistance to Fatigue Characteristic" discloses a Sn Bi Pb alloy with 300 - 5000 ppm copper added to improve fatigue resistance. US Issued Patent 6,307,160 teaches the use of at least 2 % indium to improve the bond strength of the eutectic Sn-Pb alloy on Electroless Nickel/Immersion Gold (ENIG) bond pads. US Issued Patent 4,695,428 "Solder Composition" discloses a Pb-free solder composition used for plumbing joints. The copper concentration used is in excess of 1000 ppm and several other elements are also added as alloying additions to improve the liquidus, solidus, flow properties and surface finish of the solder. US Issued Patent 2303193A, teaches the use of 0.1 - 1.5% Cu (1000 - 15,000 ppm Cu) in addition to Cd and Sb to increase the creep resistance of the solder. The reference specifically states "copper in less than the amount indicated is not sufficient materially to improve the durability over ordinary lead-tin alloys." Thus, there is a continuing need to: a) develop solder materials and solder dopants that have no deleterious effects on bulk solder properties, yet slows the consumption of the nickel-barrier layer and hence growth of a phosphorus rich layer, so that bond integrity is maintained during reflow and post reflow thermal aging; b) design and produce electrical interconnects that meet customer specifications while minimizing the production costs and maximizing the quality of the product incorporating the electrical interconnects; and c) develop reliable methods of producing electrical interconnects and components comprising those interconnects.
SUMMARY
Solder materials and dopants described herein comprise at least one solder material, at least one phosphorus-based dopant and at least one copper-based dopant. Methods of forming doped solder materials include: a) providing at least one solder material; b) providing at least one phosphorus-based dopant; c) providing at least one copper-based dopant, and d) blending the at least one solder material, the at least one phosphorus-based dopant and the at least one copper-based dopant to form a doped solder material. Layered materials are also described herein that comprise: a) a surface or substrate; b) an electrical interconnect; c) a solder material comprising at least one phosphorus-based dopant and at least one copper-based dopant, such as those described herein, and d) a semiconductor die or package. Electronic and semiconductor components that comprise solder materials and/or layered materials described herein are also contemplated.
DESCRIPTION OF THE SUBJECT MATTER Unlike the previously described references, doped solder materials and solder dopants have been developed and are described herein that have no deleterious effects on bulk solder properties, yet slow the consumption of the Ni-barrier layer and hence growth of a phosphorus rich layer, so that bond integrity is maintained during reflow and post reflow thermal aging. This solder dopant meets both goals of a) designing and producing electrical interconnects that meet customer specifications while minimizing the production costs and maximizing the quality of the product incorporating the electrical interconnects; and b) developing reliable methods of producing electrical interconnects and components comprising those interconnects. The metallization on a substrate, package or board to which electrical interconnects, such as BGA spheres, are typically bonded is usually copper. Copper reacts rapidly with the major constituent of most solders (tin) to form Cu-Sn intermetallic compounds, which grows rapidly and can exhibit spalling or breakage from the interface. This breakage reduces the strength and integrity of the solder joint. To reduce consumption of the bond pad, barrier layers that prevent direct contact of Sn and Cu are utilized. These additional layers are often referred to as bond pad metallurgy or under bump metallurgy (UBM). Bond pad metallurgy for BGA spheres typically has involved the use of nickel-plating to provide a barrier layer for the copper and a thin coating of gold to maintain solderability. While nickel will interact with Sn to form intermetallic compounds, the intermetallic growth rates are substantially slower than those of Cu-Sn intermetallics. Historically, electrolytic nickel plating has been used. The nickel deposit in this type of plating is fairly pure, with few co-deposits of undesirable elements, such as phosphorus. To reduce cost to manufacture, a newer type of plating - electroless nickel (EN) followed by immersion gold (IG) is being implemented. The electroless nickel deposition baths typically will involve the use of a hypophosphite (H2PO2-) solution that leads to phosphorus co-deposits in EN coatings to a level of 7 - 15 atom %. This additional phosphorous can cause problems during the IG plating and in reflow or subsequent thermal excursions. Lower phosphorus content coatings perfomi poorly in corrosion resistance during IG plating, requiring users to aim for higher phosphorus deposits. During solder reflow, the thin IG coating is dissolved almost instantly. The tin in the solder then reacts with the nickel in the EN coating to form Ni-Sn intermetallics. Phosphorus is not involved in this intermetallic formation, so as the intermetallic compound grows at elevated temperatures, more and more phosphorus is rejected at the intermetallic interface. This phosphorus can accumulate in a thin phosphorus-rich Ni-P layer, which weakens the solder joint, or as crystalline Ni-P, which will also weaken the solder joint. Solder joint failures occur through this phosphorus rich layer. These types of failures are known in the industry as "Black Pad" failures, as the phosphorus rich layer that is exposed by the failure can have a blackish appearance. Since intermetallics can grow rapidly even in the solid state when the joint is exposed to elevated temperatures, these failures can occur in thermally aged joints that appeared to be good immediately after solder reflow. Solder materials and dopants contemplated herein comprise at least one solder material, at least one phosphorus-based dopant and at least one copper-based dopant. Methods of forming doped solder materials described herein comprise: a) providing at least one solder material; b) providing at least one phosphorus-based dopant; c) providing at least one copper-based dopant, and d) blending the at least one solder material, the at least one phosphorus-based dopant and the at least one copper-based dopant to forai a doped solder material, hi contemplated embodiments, the dopants of copper and phosphorus that are added to the solder alloy or material reduce the consumption of the Electroless Nickel (EN) plated barrier layer. The dopants are added to the solder alloy that could be used to produce powders, paste, ingots, wire, preforms or BGA spheres through a process such as that described in coiTvmonly-owned US Issued Patent No. 6579479, which is incorporated herein in its entirety by reference. Layered materials are also contemplated herein that comprise: a) a surface or substrate; b) an electrical interconnect; c) a solder material comprising a phosphorus-based dopant and a copper-based dopant, such as those described herein, and d) a semiconductor die or package. Contemplated surfaces may comprise a printed circuit board or a suitable electronic component. Electronic and semiconductor components that comprise solder materials and/or layered materials described herein are also contemplated. Contemplated embodiments described herein differ from the cited references in that the concentrations of alloying additions made and in the use of phosphorus as an additive to the solder are different and surprisingly effective. High levels of copper in the solder are shown in multiple papers, such as the Jeon papers cited previously herein, to lower the consumption of the intermetallic layer. The levels utilized herein are lower by a factor of 2.5 - >10. The work by Ho shows that a different intermetallic forms at the nickel/solder interface for copper compositions below 0.2% (2000 ppm). The combination of copper and phosphorus was not noted anywhere in the levels of the subject matter presented herein. The mechanisms for reducing nickel consumption are different for each element. Also, the Niedrich patents described previously herein use copper to inhibit nickel barrier layer interaction through forming copper intermetallics or (Cu, Ni)Sn intermetallics. The Niedrich patents are very similar in their use of copper as US 2671844, which adds copper to solder in amounts greater than 0.5 wt % to minimize dissolution of copper soldering iron tips during fine soldering operations. Both of these copper additions need to be significantly higher than the amounts contemplated herein. The same is true for the Ozaki patent, wherein the addition of copper is significantly higher than the amounts contemplated herein. The solder material may comprise any suitable solder material, alloy or metal, such as indium, lead, silver, copper, aluminum, tin, bismuth, gallium and alloys thereof, silver coated copper, silver coated aluminum or a combination thereof. Preferred solder materials may comprise lead-tin alloys, including a lead (37%)-tin (63%) eutectic alloy, indium tin (InSn) compounds and alloys, indium silver (InAg) compounds and alloys, indium-based compounds, tin silver copper compounds (which already comprise copper) and alloys (SnAgCu), tin bismuth compounds and alloys (SnBi), aluminum-based compounds and alloys and combinations thereof. As used herein, the term "metal" means those elements that are in the d-block and f-block of the Periodic Chart of the Elements, along with those elements that have metal-like properties, such as silicon and germanium. As used herein, the phrase "d- block" means those elements that have electrons filling the 3d, 4d, 5d, and 6d orbitals surrounding the nucleus of the element. As used herein, the phrase "f-block" means those elements that have electrons filling the 4f and 5f orbitals surrounding the nucleus of the element, including the lanthanides and the actinides. Preferred metals include such as indium, lead, silver, copper, aluminum, tin, bismuth, gallium and alloys thereof, silver coated copper, and silver coated aluminum. The term "metal" also includes alloys, metal/metal composites, metal ceramic composites, metal polymer composites, as well as other metal composites. As used herein, the term "compound" means a substance with constant composition that can be broken down into elements by chemical processes. Contemplated dopants comprise at least one phosphorus-based compound/dopant and at least one copper-based compound dopant. Dopant levels contemplated herein are less than about 100 ppm for phosphorus and less than about 800 ppm for copper. In some embodiments, the dopant levels are contemplated to be about 10-100 ppm for phosphorus and about 25-800 ppm copper. In some embodiments, the dopant levels are contemplated to be about 10-70 ppm for phosphorus and about 25-500 ppm copper. In other embodiments, the dopant levels are contemplated to be about 20-60 ppm for phosphorus and about 40-600 ppm copper. In yet other embodiments, the dopant levels are contemplated to be about 30 - 60 ppm for phosphorus and about 300 - 500 ppm copper. The dopant materials could be added to the solder main constituents directly during casting. When small amounts of dopant are used, it may be desirable to make a master alloy and dilute that with undoped solder for better control over dopant concentration. The at least one solder material, the at least one phosphorus-based compound/dopant andor the at least one copper-based compound/dopant may be provided by any suitable method, including a) buying the at least one solder material, the at least one phosphorus-based compound/dopant and/or the at least one copper-based compound/dopant a supplier; b) preparing or producing at least some .of the at least one solder material, the at least one phosphorus-based compound/dopant and/or the at least one copper-based compound/dopant a supplier in house using chemicals provided by another source and/or c) preparing or producing the at least one solder material, the at least one phosphorus-based compound/dopant and/or the at least one copper-based compound/dopant a supplier in house using chemicals also produced or provided in house or at the location. Solder materials, spheres and other related materials described herein may also be used to produce solder pastes, polymer solders and other solder-based formulations and materials, such as those found in the following Honeywell International Inc.'s issued patents and pending patent applications, which are commonly-owned and incorporated herein in their entirety: US Patent Application Serial Nos. 09/851103, 60/357754, 60/372525, 60/396294, and 09/543628; and PCT Pending Application Serial No.: PCT/US02/14613, and all related continuations, divisionals, continuation-in-parts and foreign applications. Solder materials, coating compositions and other related materials described herein may also be used as components or to construct electronic-based products, electronic components and semiconductor components, contemplated embodiments, the alloys, disclosed herein may be used to produce BGA spheres, may be utilized in an electronic assembly comprising BGA spheres, such as a bumped or balled die, package or substrate, and may be used as an anode, wire or paste or may also be used in bath form.
Also in contemplated embodiments, the spheres are attached to the package/substrate or die and reflowed in a similar manner as undoped spheres. The dopant slows the consumption rate for the EN coating and results in higher integrity (higher strength) joints. Electronic-based products can be "finished" in the sense that they are ready to be used in industry or by other consumers. Examples of finished consumer products are a television, a computer, a cell phone, a pager, a palm-type organizer, a portable radio, a car stereo, and a remote control. Also contemplated are "intermediate" products such as circuit boards, chip packaging, and keyboards that are potentially utilized in finished products. Electronic products may also comprise a prototype component, at any stage of development from conceptual model to final scale-up/mock-up. A prototype may or may not contain all of the actual components intended in a finished product, and a prototype may have some components that are constructed out of composite material in order to negate their initial effects on other components while being initially tested. As used herein, the term "electronic component" means any device or part that can be used in a circuit to obtain some desired electrical action. Electronic components contemplated herein may be classified in many different ways, including classification into active components and passive components. Active components are electronic components capable of some dynamic function, such as amplification, oscillation, or signal control, which usually requires a power source for its operation. Examples are bipolar transistors, field-effect transistors, and integrated circuits. Passive components are electronic components that are static in operation, i.e., are ordinarily incapable of amplification or oscillation, and usually require no power for their characteristic operation. Examples are conventional resistors, capacitors, inductors, diodes, rectifiers and fuses.
Electronic components contemplated herein may also be classified as conductors, semiconductors, or insulators. Here, conductors are components that allow charge carriers (such as electrons) to move with ease among atoms as in an electric current. Examples of conductor components are circuit traces and vias comprising metals. Insulators are components where the function is substantially related to the ability of a material to be extremely resistant to conduction of current, such as a material employed to electrically separate other components, while semiconductors are components having a function that is substantially related to the ability of a material to conduct current with a natural resistivity between conductors and insulators. Examples of semiconductor components are transistors, diodes, some lasers, rectifiers, thyristors and photosensors.
Electronic components contemplated herein may also be classified as power sources or power consumers. Power source components are typically used to power other components, and include batteries, capacitors, coils, and fuel cells. As used herein, the term "battery" means a device that produces usable amounts of electrical power through chemical reactions. Similarly, rechargeable or secondary batteries are devices that store usable amounts of electrical energy through chemical reactions. Power consuming components include resistors, transistors, ICs, sensors, and the like.
Still further, electronic components contemplated herein may also be classified as discreet or integrated. Discreet components are devices that offer one particular electrical property concentrated at one place in a circuit. Examples are resistors, capacitors, diodes, and transistors. Integrated components are combinations of components that that can provide multiple electrical properties at one place in a circuit. Examples are ICs, i.e., integrated circuits in which multiple components and connecting traces are combined to perform multiple or complex functions such as logic. EXAMPLES
Four representative examples are shown herein that comprise Sn37Pb doped with copper and phosphorus dopants in the following amounts:
> Example #1 : 40 ppm +/- 10 ppm for copper and phosphorus Example #2: 500 ppm +/- 10 ppm for copper and 30 ppm +/- 10 ppm for phosphorus Example #3 : 200 ppm +/- 10 ppm for copper and 30 ppm +/- 10 ppm for phosphorus Example #4: 200 ppm +/- 30 ppm for copper and 15 ppm +/- 5 ppm for phosphorus > Example #5: Undoped Sn-37Pb alloy (control)
This data shows that none of the alloy dopants cause a large decrease in melting point from the undoped material (Example #5). The wetting to bare copper remains good for all alloys. The total energy required to shear balls soldered to ENIG Bond Pad metallurgy is higher for the doped spheres and the failure mode changes from brittle failure in the undoped material, to the more desired ductile failure mode as the dopant levels increase. Thus, specific embodiments and applications of doped solder materials and solder dopants utilized as electronic interconnects have been disclosed. It should be apparent, however, to those skilled in the art that many more modifications besides those already described are possible without departing from the inventive concepts herein. Moreover, in interpreting the specification, all terms should be inteφreted in the broadest possible manner consistent with the context. In particular, the terms "comprises" and "comprising" should be inteφreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, components, or steps that are not expressly referenced.

Claims

We claim: 1. A doped solder material comprising: at least one solder material, at least one phosphorus-based dopant; and at least one copper-based dopant.
2. The doped solder material of claim 1, wherein the at least one solder material comprises indium, lead, silver, copper, aluminum, tin, bismuth, gallium and alloys thereof, silver coated copper, silver coated aluminum or a combination thereof.
3. The doped solder material of claim 2, wherein the at least one solder material comprises lead-tin alloys, indium tin (InSn) compounds and alloys, indium silver (InAg) compounds and alloys, indium-based compounds, tin silver copper compounds and alloys (SnAgCu), tin bismuth compounds and alloys (SnBi), aluminum-based compounds and alloys and combinations thereof.
4. The doped solder material of claim 3, wherein the lead-tin alloy comprises a lead (37%)-tin (63%) eutectic alloy.
5. The doped solder material of claim 1, wherein the at least one phosphorus-based dopant is present in an amount less than about 100 ppm phosphorus.
6. The doped solder material of claim 5, wherein the at least one phosphorus-based dopant is present in an amount less than about 70 ppm phosphorus.
7. The doped solder material of claim 6, wherein the at least one phosphorus-based dopant is present in an amount less than about 60 ppm phosphorus. 8. The doped solder material of claim 1, wherein the at least one copper-based dopant is present in an amount less than about 800 ppm copper.
9. The doped solder material of claim 8, wherein the at least one copper-based dopant is present in an amount less than about 600 ppm copper.
10. The doped solder material of claim 9, wherein the at least one copper-based dopant is present in an amount less than about 500 ppm copper. 11. The doped solder material of claim 1, wherein the at least one phosphorus-based dopant and the at least one copper-based dopant is present in an amount of about 10- 100 ppm for phosphorus and about 25-800 ppm copper.
12. The doped solder material of claim 1, wherein the at least one phosphorus-based dopant and the at least one copper-based dopant is present in an amount of about 10- 70 ppm for phosphorus and about 25-500 ppm copper.
13. The doped solder material of claim 1, wherein the at least one phosphorus-based dopant and the at least one copper-based dopant is present in an amount of about 20- 60 ppm for phosphorus and about 40-600 ppm copper.
14. The doped solder material of claim 1, wherein the at least one phosphorus-based dopant and the' at least one copper-based dopant is present in an amount of about 30 - 60 ppm for phosphorus and about 300 - 500 ppm copper.
15. A method of forming a doped solder material, comprising: providing at least one solder material; providing at least one phosphorus-based dopant; providing at least one copper-based dopant, and blending the at least one solder material, the at least one phosphorus-based dopant and the at least one copper-based dopant to form a doped solder material.
16. The method of claim 15, wherein the at least one solder material comprises indium, lead, silver, copper, aluminum, tin, bismuth, gallium and alloys thereof, silver coated copper, silver coated aluminum or a combination thereof.
17. The method of claim 16, wherein the at least one solder material comprises lead-tin alloys, indium tin (InSn) compounds and alloys, indium silver (InAg) compounds and alloys, indium-based compounds, tin silver copper compounds and alloys (SnAgCu), tin bismuth compounds and alloys (SnBi), aluminum-based compounds and alloys and combinations thereof.
18. The method of claim 17, wherein the lead-tin alloy comprises a lead (37%)-tin (63%) eutectic alloy.
19. The method of claim 15, wherein the at least one phosphorus-based dopant is present in an amount less than about 100 ppm phosphorus.
20. The method of claim 19, wherein the at least one phosphorus-based dopant is present in an amount less than about 70 ppm phosphorus. 21. The method of claim 20, wherein the at least one phosphorus-based dopant is present in an amount less than about 60 ppm phosphorus.
22. The method of claim 15, wherein the at least one copper-based dopant is present in an amount less than about 800 ppm copper.
23. The method of claim 22, wherein the at least one copper-based dopant is present in an amount less than about 600 ppm copper.
24. The method of claim 23, wherein the at least one copper-based dopant is present in an amount less than about 500 ppm copper.
25. The method of claim 15, wherein the at least one phosphorus-based dopant and the at least one copper-based dopant is present in an amount of about 10-100 ppm for phosphorus and about 25-800 ppm copper.
26. The method of claim 15, wherein the at least one phosphorus-based dopant and the at least one copper-based dopant is present in an amount of about 10-70 ppm for phosphorus and about 25-500 ppm copper.
27. The method of claim 15, wherein the at least one phosphorus-based dopant and the at least one copper-based dopant is present in an amount of about 20-60 ppm for phosphorus and about 40-600 ppm copper.
28. The method of claim 15, wherein the at least one phosphorus-based dopant and the at least one copper-based dopant is present in an amount of about 30 - 60 ppm for phosphorus and about 300 - 500 ppm copper.
29. A layered material, comprising: a surface or substrate; an electrical interconnect; a solder material comprising at least one phosphorus-based dopant and at least one copper-based dopant; and a semiconductor die or package. 30. An electronic component comprising the doped solder material of claim 1.
31. A semiconductor component comprising the doped solder material of claim 1.
EP04783167A 2003-09-08 2004-09-07 Doped alloys for electrical interconnects, methods of production and uses thereof Withdrawn EP1665337A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50138403P 2003-09-08 2003-09-08
PCT/US2004/028837 WO2005027198A2 (en) 2003-09-08 2004-09-07 Doped alloys for electrical interconnects, methods of production and uses thereof

Publications (2)

Publication Number Publication Date
EP1665337A2 EP1665337A2 (en) 2006-06-07
EP1665337A4 true EP1665337A4 (en) 2007-10-31

Family

ID=34312272

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04783167A Withdrawn EP1665337A4 (en) 2003-09-08 2004-09-07 Doped alloys for electrical interconnects, methods of production and uses thereof

Country Status (7)

Country Link
EP (1) EP1665337A4 (en)
JP (1) JP2007533457A (en)
KR (1) KR20070027485A (en)
CN (1) CN1943030A (en)
DE (1) DE04783167T1 (en)
TW (1) TWI272152B (en)
WO (1) WO2005027198A2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10319888A1 (en) 2003-04-25 2004-11-25 Siemens Ag Solder material based on SnAgCu
JP4993916B2 (en) * 2006-01-31 2012-08-08 昭和シェル石油株式会社 In solder-coated copper foil ribbon conductor and connection method thereof
US20130045131A1 (en) * 2011-08-17 2013-02-21 Honeywell International Inc. Lead-Free Solder Compositions
HUE045443T2 (en) 2014-08-27 2019-12-30 Heraeus Deutschland Gmbh & Co Kg Soldering paste and process of cohesive connection
EP3186032B1 (en) * 2014-08-27 2018-04-25 Heraeus Deutschland GmbH & Co. KG Method for producing a solder connection
US10421161B2 (en) * 2016-05-06 2019-09-24 Honeywell International Inc. High quality, void and inclusion free alloy wire

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2319039A (en) * 1996-11-05 1998-05-13 Samsung Electronics Co Ltd Solder alloy
JPH11267880A (en) * 1998-03-23 1999-10-05 Ishikawa Kinzoku Kk Solder alloy
US20030024733A1 (en) * 2001-03-06 2003-02-06 Hitachi Cable Ltd. Lead-free solder, and connection lead and electrical component using said lead-free solder
EP1402988A1 (en) * 2002-09-25 2004-03-31 Senju Metal Industry Co., Ltd. The use of a solder on surfaces coated with nickel by electroless plating

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4853345A (en) * 1988-08-22 1989-08-01 Delco Electronics Corporation Process for manufacture of a vertical DMOS transistor
US6348740B1 (en) * 2000-09-05 2002-02-19 Siliconware Precision Industries Co., Ltd. Bump structure with dopants

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2319039A (en) * 1996-11-05 1998-05-13 Samsung Electronics Co Ltd Solder alloy
JPH11267880A (en) * 1998-03-23 1999-10-05 Ishikawa Kinzoku Kk Solder alloy
US20030024733A1 (en) * 2001-03-06 2003-02-06 Hitachi Cable Ltd. Lead-free solder, and connection lead and electrical component using said lead-free solder
EP1402988A1 (en) * 2002-09-25 2004-03-31 Senju Metal Industry Co., Ltd. The use of a solder on surfaces coated with nickel by electroless plating

Also Published As

Publication number Publication date
JP2007533457A (en) 2007-11-22
TWI272152B (en) 2007-02-01
TW200513337A (en) 2005-04-16
CN1943030A (en) 2007-04-04
KR20070027485A (en) 2007-03-09
DE04783167T1 (en) 2007-01-04
WO2005027198A2 (en) 2005-03-24
WO2005027198A3 (en) 2005-09-22
EP1665337A2 (en) 2006-06-07

Similar Documents

Publication Publication Date Title
US20210167034A1 (en) Chip arrangements
US20060113683A1 (en) Doped alloys for electrical interconnects, methods of production and uses thereof
EP3062956B1 (en) Lead-free, silver-free solder alloys
US20020155024A1 (en) Lead-free solder compositions
US10500680B2 (en) Solder alloy, solder ball, and solder joint
JPH10144718A (en) Tin group lead free solder wire and ball
US20080118761A1 (en) Modified solder alloys for electrical interconnects, methods of production and uses thereof
HU228577B1 (en) Lead-free solders
WO2005102594A1 (en) Solder and mounted article using same
KR20140110926A (en) Bonding method, bond structure, and manufacturing method for same
US20070138442A1 (en) Modified and doped solder alloys for electrical interconnects, methods of production and uses thereof
US20040241039A1 (en) High temperature lead-free solder compositions
WO2018168858A1 (en) Solder material
JP2005503926A (en) Improved composition, method and device suitable for high temperature lead-free solders
US20240238914A1 (en) Solder Alloy, Solder Paste, Solder Ball, Solder Preform, Solder Joint, Vehicle-Mounted Electronic Circuit, ECU Electronic Circuit, Vehicle-Mounted Electronic Circuit Device, and ECU Electronic Circuit Device
KR101141762B1 (en) Copper-cored solder balls for micro-electronic packages and micro-electronic packages including the same
EP1665337A2 (en) Doped alloys for electrical interconnects, methods of production and uses thereof
JP2003290974A (en) Joining structure of electronic circuit device and electronic parts used for the same
JP5699472B2 (en) Solder material, manufacturing method thereof, and manufacturing method of semiconductor device using the same
TWI795778B (en) Lead-free solder alloy, solder ball, solder paste, and semiconductor device
KR20240058199A (en) Solder alloys, solder balls, solder preforms, solder pastes and solder joints
US7578966B2 (en) Solders with intermetallic phases, solder bumps made thereof, packages containing same, and methods of assembling packages therewith
Sabri et al. High-Temperature Lead-free Solder Materials and Applications
JP7032687B1 (en) Solder alloys, solder pastes, solder balls, solder preforms, and solder fittings
US20220212293A1 (en) Lead-free solder alloy, solder paste comprising the same, and semiconductor device comprising the same

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20060403

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): DE FR GB

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 23/48 20060101AFI20060517BHEP

EL Fr: translation of claims filed
DAX Request for extension of the european patent (deleted)
RBV Designated contracting states (corrected)

Designated state(s): DE FR GB

DET De: translation of patent claims
A4 Supplementary search report drawn up and despatched

Effective date: 20070928

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 23/485 20060101ALI20070924BHEP

Ipc: H01L 23/48 20060101AFI20060517BHEP

Ipc: H01L 23/488 20060101ALI20070924BHEP

17Q First examination report despatched

Effective date: 20090205

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20101005