EP1643633A1 - Schaltungsanordnung zur Unterdrückung einer Störung , sowie Verfahren - Google Patents

Schaltungsanordnung zur Unterdrückung einer Störung , sowie Verfahren Download PDF

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Publication number
EP1643633A1
EP1643633A1 EP05020455A EP05020455A EP1643633A1 EP 1643633 A1 EP1643633 A1 EP 1643633A1 EP 05020455 A EP05020455 A EP 05020455A EP 05020455 A EP05020455 A EP 05020455A EP 1643633 A1 EP1643633 A1 EP 1643633A1
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EP
European Patent Office
Prior art keywords
signal
output
quadrature
synchronous demodulator
integral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05020455A
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German (de)
English (en)
French (fr)
Inventor
Ingo Steinbach
Hans Fiesel
Miodrang Temerinac
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Entropic Communications LLC
Original Assignee
TDK Micronas GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Micronas GmbH filed Critical TDK Micronas GmbH
Publication of EP1643633A1 publication Critical patent/EP1643633A1/de
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00—Demodulation of amplitude-modulated oscillations
    • H03D1/22—Homodyne or synchrodyne circuits
    • H03D1/2245—Homodyne or synchrodyne circuits using two quadrature channels
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems

Definitions

  • the invention relates to a method and a circuit arrangement for suppressing a disturbing quadrature component of a carrier signal of an amplitude-modulated signal in the recovery of the carrier signal in a synchronous demodulator which outputs a quadrature signal.
  • an amplitude-modulated signal (eg an analog television signal)
  • the present signal can now be digitally converted at a much lower sampling frequency f AT2 .
  • the digitized signal is mixed into baseband by means of a synchronous demodulator, the carrier frequency f T (preferably the image carrier frequency f BT ) being generated by a fully digital phase-locked loop (PLL). Further digital filtering of the resulting in-phase and quadrature component extracts the signal (eg, picture and / or sound information).
  • the input IF IN is connected via a signal path 3 to a first input E 2,1 of a mixer 2.
  • a local oscillator 5 is connected via a signal path 4 with a second input E 2,2 to the mixer 2.
  • the output A 2 of the mixer 2 is connected via a signal path 6 to an input E 7 of a bandpass filter 7.
  • An output A 7 of the bandpass filter 7 is connected via a signal path 8 to an input Eg of an analog-to-digital converter 9.
  • An output A 9 of the analog-to-digital converter 9 is connected via a signal path 10 to an input of a digital signal processor 11, which has three outputs A 11.1 , A 11.2 and A 11.3 .
  • the signal path 10 is divided at a node 12 into two partial signal paths 13 and 14.
  • the sub-signal path 13 is fed to a first input E 21,1 of an automatic gain control device for tuner (channel selector) signals 21.
  • the second partial signal path 14 is fed to an input E 15 of a synchronous demodulator 15.
  • This synchronous demodulator 15 has two outputs, namely an in-phase signal output A 15, I and a quadrature signal output A 15, Q.
  • Both signal outputs A 15, I and A 15, Q of the synchronous demodulator 15 are connected via corresponding signal paths 16, 17 to respective inputs E 18, I and E 18, Q of a filter device 18.
  • This filter device 18 itself has in turn two signal outputs, namely an in-phase signal output A 18, I and a quadrature signal output A 18, Q.
  • the in-phase signal output A 18, I of the filter device 18 is via a signal path 19 with an input E 23 of an automatic Gain controller for video signals 23 connected.
  • This automatic gain control device for video signals 23 has two outputs, namely a first with the reference numeral A 23.1 and a second marked with the reference numeral A 23.2 output.
  • the first output A 23,1 of the video signal automatic gain control device 23 is connected to a second input E 21,2 of the automatic gain control device 21 for tuner signals 21. Its single output A 21 leads via a signal path 27 to the above-mentioned first output A 11, 1 of the digital signal processor 11.
  • the second output A 23,2 of the automatic gain control device for video signals 23 is connected via a signal path 28 to the aforementioned second output A 11,2 of the digital signal processor.
  • the quadrature signal output A 18, Q of the filter device 18 is connected via a signal path 20 to an input E 25 of an automatic gain control device 25 for audio signals. Its output A 25 is connected via a further signal path 29 to the third output A 11.3 of the digital signal processor 11.
  • All outputs A 11,1 , A 11,2 , A 11,3 are connected to respective inputs E 30 , E 31 , E 32 of three analog-to-digital converters 30, 31, 32. Their outputs form the aforementioned outputs Tuner AGC, CVBS, SIF of the digital TV receiver 1.
  • the output signal of a tuner is supplied to the input IF IN of the digital TV receiver 1.
  • LO local oscillator
  • This second IF signal is present at the output A 2 of the mixer 2. It is fed to the bandpass filter 7 via the input E 7 . After the bandpass filtering unwanted mixing products are removed from the signal and it can be digitized without Signalverkennung, ie without so-called aliasing, using the analog-to-digital converter 9.
  • the signal is first mixed using the synchronous demodulator 15 in the baseband.
  • the outputs A 15, I , A 15, Q of the synchronous demodulator 15 are demodulated in-phase and quadrature signals I, Q before.
  • the video signal and the audio IF signal are obtained from the I / Q data.
  • the tuner AGC 21 acronym for Automatic Gain Control
  • the tuner output level is set to the tuner output level so that the DSP 11 of the connected A / D converter 9 is not overridden at input E 11 s.
  • u ( t ) u ⁇ B T ⁇ cos ( 2 ⁇ f B T t ) ⁇ ( 1 + m ⁇ cos ( 2 ⁇ f picture t ) ) ⁇ image ( AM modulation )
  • Figure 7a shows the phasor diagram of this amplitude modulated signal.
  • OSB upper sideband
  • USB acronym for lower sideband
  • Demodulators according to the internally known state of the art are dimensioned so that the phase modulation is constantly readjusted by the carrier preparation.
  • this results in the fact that the information is correctly reconstructed even if an orthogonal carrier component is present due to rapid tracking of the image carrier, but because e.g. in the case of analogue television, the sound carrier is mixed with the audio intermediate frequency with the aid of the reconstructed video carrier, the latter being subject to the same frequency changes, which manifests itself in additional frequency modulation;
  • the digital carrier preparation in the digital signal processor 11 according to FIG. 6, as implemented according to the state of the art known in the art, is shown in the form of a block diagram in FIG.
  • FIG. 8 shows the synchronous demodulator 15 from FIG. 6.
  • the synchronous demodulator 15 consists of the actual I / Q demodulator 15a, which converts an input signal into an in-phase signal I and a quadrature signal Q.
  • a circuit arrangement is provided which wins the image carrier signal BT from the in-phase signal I and the quadrature signal Q and a first mixer 40 of the I / Q demodulator 15a directly and a second mixer 41 of the I / Q demodulator 15a with 90 ° phase shift feeds.
  • the I / Q demodulator 15a is constructed in a conventional manner. It comprises an input E 15 and two outputs, namely an in-phase signal output A 15 , I and a quadrature signal output A 15, Q.
  • the input E 15 is connected via a signal path 14 to a node 42. This node 42 splits the signal path 14 into two partial signal paths 43 and 44.
  • the first part signal path 43 is connected to an input E 40 of the above-mentioned first mixer 40
  • the second part signal path 44 is connected to a first input E 41,1 of the aforementioned second mixer 41.
  • Both mixers 40, 41 each have a further second input E 40,2 , E 41,2 , to which the image carrier signals BT are supplied in the aforementioned manner.
  • An output A 40 of the mixer 40 is connected via a signal path 45 to an input E 38 of a low-pass filter 38.
  • An output A 41 of the mixer 41 is connected via a signal path 46 to an input E 39 of a second low-pass filter 39.
  • An output A 38 of the first low-pass filter 38 forms the abovementioned in-phase signal output A 15, I
  • an output A 39 of the second low-pass filter 39 forms the abovementioned quadrature signal output A 15, Q of the I / Q demodulator A.
  • the output A 15, I leads via a signal path 16 to a node 47. From this node 47, a signal path leads on the one hand to the filter 18 shown in FIG. 6 and via one signal path 41 to a first input E 41, 1 of a low-pass filter 51.
  • the quadrature signal output A 15, Q leads via a signal path 17 to a node 48. From this node 48 leads on the one hand a Signal connection on to the filter 16 shown in Figure 6 and on the other hand via a signal path 50 to a second input E 51,2 of the above-mentioned low-pass filter 51st
  • Two outputs A 54,1 , A 54,2 of this arithmetic unit 54 are connected via corresponding signal paths 55, 56 with inputs E 37,1 , E 37,2 a control device 37.
  • One or more outputs A 37 of the arithmetic unit 37 are connected via corresponding signal paths 57 to the corresponding inputs E 36 of a digital I / Q oscillator 36.
  • signal paths 58 lead to the inputs E 40,2 and E 41,2 of the mixers 40 and 41, respectively.
  • the low-pass filter 51 selects the image carrier which lies here in the baseband (f BT ⁇ 0 Hz).
  • the subsequent CORDIC (Coordinate Rotation Digital Computer) 54 determines the phase 55 and the amplitude 56 from the low-pass filtered I / Q value pairs (signals 52/53).
  • Phase 55 represents the phase difference between the image carrier of the received signal 14 and the local carrier 58
  • the phase 55 is converted in block 37 to a correction signal 57 to track the local I / Q oscillator 36. After several iterations (loop passes), the carrier 58 will align with the received carrier 14.
  • Fig. 9 shows the effects of a quadrature component in the in-phase signal on the demodulated video signal.
  • the sound carrier is converted to the audio intermediate frequency by means of the local I / Q oscillator 36. If due to an orthogonal noise component of the image carrier, a phase modulation of the image carrier occurs, this has an effect as a frequency modulation of the audio intermediate frequency carrier, since the local carrier 58 follows the phase modulation.
  • Fig. 9 shows a section of a CVBS signal.
  • the horizontal synchronization pulse is clearly recognizable (approximately 650 ⁇ t ⁇ 750).
  • Fig. 9b shows the same case with additional orthogonal noise component.
  • the PLL loop in this case is not fast enough to demodulate the signal without error.
  • the horizontal sync pulse is so distorted that a connected TV can not generate a stable picture from it.
  • Object of this invention is to provide a method and a circuit arrangement in which or in the carrier preparation even with poorly balanced transmitters a trouble-free demodulation of the signal is guaranteed.
  • a method and a circuit arrangement for orthogonal disturbance estimation and their compensation are to be provided.
  • the disturbing quadrature component of the carrier signal is estimated and that the estimated quadrature component is subtracted from the quadrature signal.
  • the circuit arrangement according to the invention comprises a tinctsab collectedin therapies and a subtractor in the quadrature signal path.
  • the invention it is provided to compensate the orthogonal carrier component contained in the signal for measurements and within the carrier control.
  • the bandwidth of the PLL does not have to be changed in order to demodulate the information without sacrificing quality, in order to prevent a frequency-modulated sound signal from being disturbed by the existence of an orthogonal image carrier component in the example of analogue television.
  • modulator imbalance The orthogonal noise component, which is referred to in English as “modulator imbalance”, can be estimated as follows:
  • the orthogonal noise component appears as a DC value in the Q path after the I / Q mixer.
  • the carrier recovery interprets this as a phase error (measured with Cordic) and thus controls the digital I / Q oscillator to a supposedly correct value.
  • a DC signal in the Q path is again briefly visible, which is regulated back.
  • the magnitude of the excursion of the DC signal in the Q path depends on the magnitude and direction of the amplitude jump.
  • the pointer diagram in FIG. 1 illustrates this relationship using the example of the television signal:
  • the painted coordinate system I '/ Q' shows the composition 59 of a modulated image carrier 34 with spurious component 35
  • point (a) represents the signal at small information signal amplitude 3a (eg white level at analog TV) and point (b) shows a large information signal amplitude 33b (eg Black level).
  • the other coordinate system I / Q shows the currently valid carrier recovery coordination system in the locked state.
  • the signal change from point (a) to (b) one first obtains a negative Q value q ⁇ .
  • the simple relationship applies here:
  • the amplitude change is determined using the absolute value of the current I and Q value.
  • a more cost-effective solution is obtained - assuming that the carrier recovery is locked - by only the change of the I-part is evaluated, as shown in Fig. 2 by way of example.
  • FIG. 2d shows the differential amplitude changes 79, 81, 83, 85 determined from the corresponding amplitude changes 62, 63, 68, 67 of the in-phase signal I.
  • the estimated values obtained for the above-mentioned amplitude jumps of the in-phase signal are indicated by reference numerals 87, 88 and 89.
  • FIG. 5 like FIG. 9, shows the section of a CVBS signal.
  • the signal contains a relatively strong orthogonal noise component and is distorted as previously described with a horizontal sync pulse (marked by the arrow) ( Figure 9 above) and a connected TV would not be able to generate a stable TV picture from it.
  • the imbalance compensation control is active in FIG. 9 below and has already settled to an end value.
  • the orthogonal noise component is fully compensated and the signal is demodulated without error.
  • FIG. 4 shows a synchronous demodulator 115 with orthogonal noise compensation.
  • the synchronous demodulator 115 according to FIG. 4 comprises, on the one hand, the circuit components of the synchronous demodulator 15 according to FIG. 8 as well as an implemented orthogonal disturbance estimation circuit arrangement.
  • This circuit arrangement for orthogonal disturbance estimation can be embodied identically, for example, as the circuit arrangement 90 according to FIG. 3.
  • the signal paths 52, 53 between the low-pass filter 51 and the arithmetic unit 54 are connected via corresponding nodes 117, 118 to the signal paths 99, 100 of the circuit arrangement 90 according to FIG.
  • a connection to an input E 119 of an I-controller 119 is established via a signal path 112.
  • An output A 119 carries a signal path 120 to a second input E 121 of a subtractor whose first input E 121 is connected to the output A 39 of the low-pass filter 39 in the Q path.
  • the low-pass filtered estimation signal U ⁇ q a with the amplitude ⁇ qa subtracted from the quadrature signal Q in the Q path and thus compensated U ⁇ q a with the amplitude ⁇ qa subtracted from the quadrature signal Q in the Q path and thus compensated. It goes without saying for the person skilled in the art that any other control loop could be used instead of the I-controller 119.
  • the signal 112 is first amplified or attenuated with an adjustable factor and then fed to an integrator.
  • the factor influences the speed of the control loop.
  • the current state of the integrator is also the estimated signal U ⁇ q a ,
  • control deviation is caused by the interfering orthogonal component, since this leads to the described phase modulation. Integration (and sign correction) is used to estimate the quadrature component from the control deviation. This works only with a control loop, since there is no way to directly the orthogonal noise component to calculate.
  • the actual fault estimate is defined according to reference numeral 90.
  • the filter 93 By using the filter 93, the estimation result becomes more reliable.
  • the disturbance estimation 90 alone will not be able to determine the absolute value of the disturbance component. It is only possible to identify a trend. This tendency is used by charging or discharging the integrator in the I-controller 119 in order to obtain the absolute value of the noise component in the steady state of the control loop.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Noise Elimination (AREA)
  • Circuits Of Receivers In General (AREA)
EP05020455A 2004-10-04 2005-09-20 Schaltungsanordnung zur Unterdrückung einer Störung , sowie Verfahren Withdrawn EP1643633A1 (de)

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EP (1) EP1643633A1 (ko)
JP (1) JP4594202B2 (ko)
KR (1) KR100727458B1 (ko)
CN (1) CN1812554A (ko)
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US7920653B2 (en) 2011-04-05
KR100727458B1 (ko) 2007-06-13
US20060072686A1 (en) 2006-04-06
JP2006217565A (ja) 2006-08-17
CN1812554A (zh) 2006-08-02
DE102004048572A1 (de) 2006-04-13
JP4594202B2 (ja) 2010-12-08
KR20060051967A (ko) 2006-05-19

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