EP1508197A2 - Signal processing element - Google Patents

Signal processing element

Info

Publication number
EP1508197A2
EP1508197A2 EP02804314A EP02804314A EP1508197A2 EP 1508197 A2 EP1508197 A2 EP 1508197A2 EP 02804314 A EP02804314 A EP 02804314A EP 02804314 A EP02804314 A EP 02804314A EP 1508197 A2 EP1508197 A2 EP 1508197A2
Authority
EP
European Patent Office
Prior art keywords
signal
output signal
input
output
path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP02804314A
Other languages
German (de)
French (fr)
Inventor
Paul Alun Warr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Bristol
Original Assignee
University of Bristol
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Bristol filed Critical University of Bristol
Publication of EP1508197A2 publication Critical patent/EP1508197A2/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits

Definitions

  • the present invention relates to a signal processing element, and in particular to an amplifying device which is linearised by suppression of intermodulation products in an output signal of the amplifying device.
  • an output signal of an amplifying device does not present a perfect magnified reproduction of an input waveform due to a non-linear transfer characteristic.
  • Such defects in an amplifying device are generally known as non-linear distortion and can be considered as an error in the output of an amplifier.
  • Amplitude, harmonic and intermodulation distortion are examples and results of non-linear distortion.
  • linearisation schemes include synthesis techniques (for example, LINC, CALLU or EER) , pre-and post-distortion methods, direct RF (radio frequency) feedback, envelope feedback technique, second harmonic injection and feedforward method.
  • synthesis techniques function by decomposing an input signal of varying-envelope type to form two or more signals.
  • LINC Linear amplification with Non-linear Components
  • CALLUM Combined Analogue Locked Loop Universal Modulator
  • EER envelope Elimination and Restoration
  • the input signal is decomposed to form one constant-envelope signal for amplification and one varying-envelope control signal which does not require amplification.
  • the last step in each of the synthesis techniques is the re-combination of the signals to form a high-power varying-envelope signal.
  • the present invention seeks to provide an amplifying device in which non-linear distortion and connected problems associated with prior art devices, are at least alleviated.
  • a circuit comprising a signal processing element for receiving an input signal, the signal processing element generating a first output signal at an output thereof, and a second output signal at an input thereof, wherein the second output signal is used to form an error signal to correct the first output signal .
  • a method for processing a signal comprising the steps of receiving an input signal at an input of a signal processing element, generating a first output signal at an output of the signal processing element and a second output signal at an input of the signal processing element, and forming an error signal from the second output signal with which to correct the first output signal .
  • the signal processing element can be any analogue signal processing element, and more specifically any non-linear electrical device. Generally, the signal processing element operates at radio frequency.
  • the signal processing element can be, for example, a mixer, a gain/phase controller or an amplifier.
  • an amplifier circuit comprising a main amplifier for receiving an input signal, the main amplifier generating a first output signal at an output thereof, and a second output signal at an input thereof, wherein the second output signal is used to form an error signal to correct the first output signal .
  • a method for amplifying a signal comprising the steps of receiving an input signal at an input of a main amplifier, generating a first output signal at an output of the main amplifier and a second output signal at an input of the main amplifier., and forming an error signal from the second output signal with which to correct the first output signal .
  • the error signal may be applied to the main amplifier output, or may be used to pre-distort the amplifier input.
  • Figure 1 is schematic diagram of an amplifying device in accordance with an embodiment of the invention
  • Figure 2 is a schematic diagram of an amplifying device in accordance with a second embodiment of the invention.
  • Figure 3 is a schematic diagram of an amplifying device in accordance with a third embodiment of the invention.
  • an input signal 2 is supplied to a coupler 4, which passes it into a main signal path 6 whilst isolating it from an error signal path 8.
  • the signal in the main signal path 6 is supplied to an input port of a main amplifier 10.
  • the signal from the output port of main amplifier 10 is then passed to an output coupler 16 via a fixed delay line 12 and a variable delay line 14.
  • the main amplifier 10 generates a distortion signal within the device and therefore, even under perfect port matching conditions, some distortion signal is observed in the amplifier output signal leaving the output port and in an amplifier return signal leaving the input port of the main amplifier 10.
  • the magnitude ratio of distortion spurious present at the output port of the main amplifier to distortion spurious present at the input port of the main amplifier is defined as the Device Distortion Ratio (DDR) . More specifically, if the main amplifier output signal contains a particular distortion spurious at a power of X dB , then the main amplifier return signal will contain a linearly related distortion spurious at a power of (X-DDR) dBW, if the DDR is expressed in dB.
  • the main amplifier return signal is passed to the input port of an error amplifier 18 via the coupler 4.
  • the main amplifier return signal In order for the main amplifier return signal to function as an error signal it must comprise a greater ratio of distortion signal to desired signal than is present in the main amplifier output signal. This condition is satisfied if the main amplifier 10 offers a good match to its source and load.
  • the error signal is amplified by amplifier 18 and the resulting signal is then magnitude-phase conditioned by a fixed attenuator 20 and a variable attenuator 22.
  • the error signal is then supplied to an input port of an amplifier 24.
  • the resulting error signal is then passed to the output coupler 16, where it is compared to the main signal to give a linearised system output.
  • the amplification required in the error signal path 8 is a function of the main amplifier gain, the main amplifier DDR, passive losses in the network, and the type .of couplers used. Therefore, the order and number of amplification and control components utilised in the error signal path can be varied provided the overall amplification in the error signal path remains at the required level .
  • variable delay element 14 can be positioned in either the main signal path 6 or the error signal path 8.
  • variable attenuation element 22 should be located in the error signal path 8 rather than the main signal path 6, to minimise power loss to the main signal after amplification by the main amplifier 10.
  • variable delay element 14 in the configuration shown in Figure 1 may be replaced or supplemented by a phase control element without any detrimental effect on device functionality.
  • a particular advantage of the invention is that the near-band instantaneous dynamic range of an amplifying device is increased. Also, due to the error 5 signal path 8 and the main signal path 6 being coupled together after the main amplifier 10, the amplifying device can operate in broadband with the associated advantages .
  • the dynamic range of the error signal may be increased by further suppressing the residual wanted signal in the error path by controlled addition of the input signal 2 into the error signal path 8, either via the coupler 4 or by a separate path possibly containing
  • Figure 1 shows an architecture in which an error signal is used to cancel the distortion in the amplifier output. It is also possible to use the error 0 signal to pre-distort the amplifier input.
  • Figure 2 shows an input signal 26, which is supplied to a first coupler 28 and then passed to a second coupler 32, via a main signal path 30.
  • the 5 first coupler 28 isolates the input signal 26 from an amplifier 40.
  • the signal output from the second coupler 32 is passed to an input port of a main amplifier 42.
  • the main amplifier 42 generates a distortion signal within the device and, as described in respect of Figure 1, some distortion signal is observed in an amplifier return signal leaving the input port of the main amplifier 42. A substantial part of this distortion signal is passed to a signal path 34 including a magnitude controller 36 and variable delay element 38.
  • the signal path 34 may be considered to be an error signal path when certain conditions are fulfilled. Namely, the second coupler 32 must offer good isolation and the main amplifier 42 must be well matched at its input, with the result that the signal in path 34 contains a greater ratio of distortion signal to desired signal than at an output of the main amplifier 42.
  • the error signal is passed to an input of the first coupler 28 via an amplifier 40.
  • the error signal is injected into the main signal path 30 and is passed to the main amplifier 42 via the second coupler 32.
  • the amplifier 40 functions to provide sufficient gain to overcome passive system losses and coupling losses, and to bring the error signal to an appropriate level for cancellation of the distortion within the main amplifier 42.
  • the coupler 28 can be used to sample the signal in the main signal path 30, while the coupler 32 is then used to reinject the error signal into the signal which is being supplied to the amplifier 42.
  • Figure 3 shows a third embodiment of the amplifying device of the present invention.
  • An input signal 44 is incident to an input port of a coupler 46, and then passed to an input of a main amplifier 58 via main signal path 56.
  • the main amplifier 58 generates a distortion signal within the device and, as described in respect of Figure 1, an amplifier return signal includes some distortion signal .
  • the amplifier return signal passes to a magnitude controller 50 and a variable delay element 52 via the coupler 46. Again, where the coupler 46 offers efficient isolation and the main amplifier 58 is well matched at its input, then the signal in the error signal path 48 may be considered to be an error signal .
  • the error signal is then passed to a negative resistance device 54 which functions to amplify the signal and return it along the error signal path 48.
  • the negative resistance device 54 can be realised, for example, by an Impatt diode or Gunn diode.
  • the same polar operation occurs on the error signal as it returns along the error signal path 48, resulting in a doubling of system sensitivity to variable delay element 52 and magnitude controller 50.
  • the error signal is injected into the main signal path 56 (via coupler 46) and is passed to the input of the main amplifier 58. The error signal efficiently cancels the distortion within the main amplifier 58.
  • the inventive concept of the present invention can be applied to the linearisation of analogue signal processing elements other than amplifiers, for example gain/phase controllers or mixers.
  • the error signal can be isolated from either the input port or the local oscillator port.
  • the present invention provides an amplifying device which has significant advantages over the conventional devices.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Transmitters (AREA)

Abstract

A signal processing element for a high frequency application for minimising distortion introduced to an input signal by a main amplifier. The distortion generated in the main amplifier is present in a return signal originating from the main amplifier input and also in a main signal originating from the main amplifier output. The return signal is isolated from the input signal to form an error signal and then magnitude-phase conditioned. A comparison of the main signal and the error signal at a coupler results in a linearised output signal with any intermodulation products suppressed. Alternatively, the amplifier can be replaced by other non-linear radio frequency devices, for example, a mixer or a gain/phase controller.

Description

Signal Processing Element
The present invention relates to a signal processing element, and in particular to an amplifying device which is linearised by suppression of intermodulation products in an output signal of the amplifying device.
In many situations, an output signal of an amplifying device does not present a perfect magnified reproduction of an input waveform due to a non-linear transfer characteristic. Such defects in an amplifying device are generally known as non-linear distortion and can be considered as an error in the output of an amplifier. Amplitude, harmonic and intermodulation distortion are examples and results of non-linear distortion.
Prior art devices in this field utilise various schemes to produce a linearised output. Such linearisation schemes include synthesis techniques (for example, LINC, CALLU or EER) , pre-and post-distortion methods, direct RF (radio frequency) feedback, envelope feedback technique, second harmonic injection and feedforward method. Specifically, the synthesis techniques function by decomposing an input signal of varying-envelope type to form two or more signals. In LINC (Linear amplification with Non-linear Components) and CALLUM (Combined Analogue Locked Loop Universal Modulator) , the input signal is decomposed into two or more constant-envelope signals, which can be amplified by a non-linear device without generating distortion. In EER (Envelope Elimination and Restoration) the input signal is decomposed to form one constant-envelope signal for amplification and one varying-envelope control signal which does not require amplification. The last step in each of the synthesis techniques is the re-combination of the signals to form a high-power varying-envelope signal.
Each of these prior art linearisation schemes is subject to disadvantages either in terms of circuit complexity, reliability, output constancy, DC-RF power conversion efficiency, or otherwise.
Accordingly, the present invention seeks to provide an amplifying device in which non-linear distortion and connected problems associated with prior art devices, are at least alleviated.
According to a first aspect of the present invention, there is provided a circuit comprising a signal processing element for receiving an input signal, the signal processing element generating a first output signal at an output thereof, and a second output signal at an input thereof, wherein the second output signal is used to form an error signal to correct the first output signal .
According to a second aspect of the present invention, there is provided a method for processing a signal comprising the steps of receiving an input signal at an input of a signal processing element, generating a first output signal at an output of the signal processing element and a second output signal at an input of the signal processing element, and forming an error signal from the second output signal with which to correct the first output signal .
The signal processing element can be any analogue signal processing element, and more specifically any non-linear electrical device. Generally, the signal processing element operates at radio frequency. The signal processing element can be, for example, a mixer, a gain/phase controller or an amplifier.
According to a third aspect of the present invention, there is provided an amplifier circuit comprising a main amplifier for receiving an input signal, the main amplifier generating a first output signal at an output thereof, and a second output signal at an input thereof, wherein the second output signal is used to form an error signal to correct the first output signal .
According to a fourth aspect of the present invention, there is provided a method for amplifying a signal comprising the steps of receiving an input signal at an input of a main amplifier, generating a first output signal at an output of the main amplifier and a second output signal at an input of the main amplifier., and forming an error signal from the second output signal with which to correct the first output signal .
The error signal may be applied to the main amplifier output, or may be used to pre-distort the amplifier input.
For a better understanding of the present invention, and to show how it may be put into effect, reference will now be made, by way of example, to the accompanying drawing which:
Figure 1 is schematic diagram of an amplifying device in accordance with an embodiment of the invention; Figure 2 is a schematic diagram of an amplifying device in accordance with a second embodiment of the invention; and
Figure 3 is a schematic diagram of an amplifying device in accordance with a third embodiment of the invention.
As shown in Figure 1, an input signal 2 is supplied to a coupler 4, which passes it into a main signal path 6 whilst isolating it from an error signal path 8. The signal in the main signal path 6 is supplied to an input port of a main amplifier 10. The signal from the output port of main amplifier 10 is then passed to an output coupler 16 via a fixed delay line 12 and a variable delay line 14.
The main amplifier 10 generates a distortion signal within the device and therefore, even under perfect port matching conditions, some distortion signal is observed in the amplifier output signal leaving the output port and in an amplifier return signal leaving the input port of the main amplifier 10.
It has now been found that there is a relationship between the distortion signals leaving the output port and the input port. The magnitude ratio of distortion spurious present at the output port of the main amplifier to distortion spurious present at the input port of the main amplifier is defined as the Device Distortion Ratio (DDR) . More specifically, if the main amplifier output signal contains a particular distortion spurious at a power of X dB , then the main amplifier return signal will contain a linearly related distortion spurious at a power of (X-DDR) dBW, if the DDR is expressed in dB. The main amplifier return signal is passed to the input port of an error amplifier 18 via the coupler 4. In order for the main amplifier return signal to function as an error signal it must comprise a greater ratio of distortion signal to desired signal than is present in the main amplifier output signal. This condition is satisfied if the main amplifier 10 offers a good match to its source and load. The error signal is amplified by amplifier 18 and the resulting signal is then magnitude-phase conditioned by a fixed attenuator 20 and a variable attenuator 22. The error signal is then supplied to an input port of an amplifier 24. The resulting error signal is then passed to the output coupler 16, where it is compared to the main signal to give a linearised system output.
The amplification required in the error signal path 8 is a function of the main amplifier gain, the main amplifier DDR, passive losses in the network, and the type .of couplers used. Therefore, the order and number of amplification and control components utilised in the error signal path can be varied provided the overall amplification in the error signal path remains at the required level .
The variable delay element 14 can be positioned in either the main signal path 6 or the error signal path 8. To obtain maximum advantage, the variable attenuation element 22 should be located in the error signal path 8 rather than the main signal path 6, to minimise power loss to the main signal after amplification by the main amplifier 10. It should be noted that the variable delay element 14 in the configuration shown in Figure 1 may be replaced or supplemented by a phase control element without any detrimental effect on device functionality. A particular advantage of the invention is that the near-band instantaneous dynamic range of an amplifying device is increased. Also, due to the error 5 signal path 8 and the main signal path 6 being coupled together after the main amplifier 10, the amplifying device can operate in broadband with the associated advantages .
10 The dynamic range of the error signal may be increased by further suppressing the residual wanted signal in the error path by controlled addition of the input signal 2 into the error signal path 8, either via the coupler 4 or by a separate path possibly containing
15. further gain and phase control elements.
Figure 1 shows an architecture in which an error signal is used to cancel the distortion in the amplifier output. It is also possible to use the error 0 signal to pre-distort the amplifier input.
Figure 2 shows an input signal 26, which is supplied to a first coupler 28 and then passed to a second coupler 32, via a main signal path 30. The 5 first coupler 28 isolates the input signal 26 from an amplifier 40. The signal output from the second coupler 32 is passed to an input port of a main amplifier 42.
0 The main amplifier 42 generates a distortion signal within the device and, as described in respect of Figure 1, some distortion signal is observed in an amplifier return signal leaving the input port of the main amplifier 42. A substantial part of this distortion signal is passed to a signal path 34 including a magnitude controller 36 and variable delay element 38. The signal path 34 may be considered to be an error signal path when certain conditions are fulfilled. Namely, the second coupler 32 must offer good isolation and the main amplifier 42 must be well matched at its input, with the result that the signal in path 34 contains a greater ratio of distortion signal to desired signal than at an output of the main amplifier 42. The error signal is passed to an input of the first coupler 28 via an amplifier 40. Thus, the error signal is injected into the main signal path 30 and is passed to the main amplifier 42 via the second coupler 32. The amplifier 40 functions to provide sufficient gain to overcome passive system losses and coupling losses, and to bring the error signal to an appropriate level for cancellation of the distortion within the main amplifier 42.
Again, it will be apparent that other architectures that operate in the same way would also be possib.le. For example, the order of the components could be altered, or additional amplification or control components could be included.
In particular, by oppositely orienting the amplifier 40, the coupler 28 can be used to sample the signal in the main signal path 30, while the coupler 32 is then used to reinject the error signal into the signal which is being supplied to the amplifier 42.
Figure 3 shows a third embodiment of the amplifying device of the present invention. An input signal 44 is incident to an input port of a coupler 46, and then passed to an input of a main amplifier 58 via main signal path 56. The main amplifier 58 generates a distortion signal within the device and, as described in respect of Figure 1, an amplifier return signal includes some distortion signal . The amplifier return signal passes to a magnitude controller 50 and a variable delay element 52 via the coupler 46. Again, where the coupler 46 offers efficient isolation and the main amplifier 58 is well matched at its input, then the signal in the error signal path 48 may be considered to be an error signal . The error signal is then passed to a negative resistance device 54 which functions to amplify the signal and return it along the error signal path 48. In practice, the negative resistance device 54 can be realised, for example, by an Impatt diode or Gunn diode. The same polar operation occurs on the error signal as it returns along the error signal path 48, resulting in a doubling of system sensitivity to variable delay element 52 and magnitude controller 50. Finally, the error signal is injected into the main signal path 56 (via coupler 46) and is passed to the input of the main amplifier 58. The error signal efficiently cancels the distortion within the main amplifier 58.
Again, it will be apparent that other architectures that operate in the same way would also be possible. For example, the order of the components could be altered, or additional amplification or control components could be included.
The inventive concept of the present invention can be applied to the linearisation of analogue signal processing elements other than amplifiers, for example gain/phase controllers or mixers. In the case of a mixer, the error signal can be isolated from either the input port or the local oscillator port. Thus, it will be apparent to the skilled person that the above described circuit architectures are not exhaustive and variations on these structures may be employed to achieve a similar result whilst employing the same inventive concept. Furthermore, comments in respect of principles and practical implementation associated with the first embodiment generally apply equally to the second and third embodiments.
It can therefore be seen that the present invention provides an amplifying device which has significant advantages over the conventional devices.

Claims

1. A circuit, comprising: a signal processing element for receiving an input signal, the signal processing element generating a first output signal at an output thereof, and a second output signal at an input thereof, wherein the second output signal is used to form an error signal to correct the first output signal .
2. The circuit as claimed in claim 1, further comprising a combining means for combining the first output signal and the error signal to correct the first output signal .
3. The circuit as claimed in claim 1, further comprising a combining means for combining the input signal and the error signal to correct the first output signal .
4. The circuit as claimed in claim 1, further comprising at least one delay control component located in a path of the first output signal.
5. The circuit as claimed in claim 1, further comprising at least one delay control component located in a path of the second output signal.
6. The circuit as claimed in claim 5, further comprising at least one amplitude control component located in the path of the first output signal.
7. The circuit as claimed in claim 4, further comprising at least one amplitude control component located in the path of the second output signal .
8. The circuit as claimed in claim 1, further comprising at least one means for routing the input signal to the signal processing element and also routing the second output signal to an amplifier in the path of the second output signal .
9. The circuit as claimed in claim 1, further comprising" a negative resistance device in the path of the error signal .
10. The circuit of any preceding claim, wherein the input signal is a radio frequency signal .
11. The circuit as claimed in claim 1, further comprising means for subtracting the error signal from the input signal, in order to compensate for any distortion introduced by the signal processing element.
12. The circuit of any preceding claim, wherein the signal processing element is a mixer.
13. The circuit of any preceding claim, wherein the signal processing element is a gain controller or a phase controller.
14. The circuit of any preceding claim, wherein the input signal is additionally fed into the path of the error signal prior to input to the signal processing element .
15. A method for processing a signal comprising the steps of : receiving an input signal at an input of a signal processing element, generating a first output signal at an output of the signal processing element and a second output signal at an input of the signal processing element, and forming an error signal from the second output signal with which to correct the first output signal.
16. The method as claimed in claim 15, further comprising the step of: combining the input signal and the error signal to correct the first output signal .
17. The method as claimed in claim 15, further comprising the step of : delaying the first output signal by a predetermined delay.
18. The method as claimed in claim 15, further comprising the step of: delaying the second output signal by a predetermined delay.
19. The method as claimed in claim 17, further comprising the step of: attenuating the second output signal by a predetermined amount .
20. The method as claimed in claim 18, further comprising the step of : attenuating the first output signal by a predetermined amount .
21. The method as claimed in claim 19, further comprising the step of: routing the input signal to the signal processing element, and routing the second output signal to an amplifier in the path of the second output signal .
22. The method as claimed in any of claims 15 to 21, wherein the input signal is a radio frequency signal.
23. The method as claimed in any of claims 15 to 22, wherein the signal processing element is a mixer,
24. The method as claimed in any of claims 15 to 22, wherein the signal processing element is a gain controller or a phase controller.
25. The method as claimed in any of claims 15 to 24, wherein the input signal is additionally fed into the path of the error signal prior to input to the signal processing element.
26. An amplifying circuit, comprising: a main amplifier for receiving an input signal, the main amplifier generating a first output signal at an output thereof, and a second output signal at an input thereof, wherein the second output signal is used to form an error signal to correct the first output signal .
27. The amplifying circuit as claimed in claim 26, further comprising a combining means for combining the first output signal and the error signal to correct the first output signal.
28. The amplifying circuit as claimed in claim 26, further comprising a combining means for combining the input signal and the error signal to correct the first output signal.
29. The amplifying circuit as claimed in claim 26, further comprising at least one delay control component located in a path of the first output signal .
30. The amplifying circuit as claimed in claim 26, further comprising at least one delay control component located in a path of the second output signal .
31. The amplifying circuit as claimed in claim 30, further comprising at least one amplitude control component located in the path of the first output signal .
32. The amplifying circuit as claimed in claim 29, further comprising at least one amplitude control component located in the path of the second output signal .
33. The amplifying circuit as claimed in claim 26, further comprising at least one means for routing the input signal to the main amplifier and also routing the second output signal to a further amplifier in the path of the second output signal.
34. The amplifying circuit as claimed in claim 26, further comprising a negative resistance device in the path of the error signal .
35. The amplifying circuit of any of claims 26 to 34, wherein the input signal is a radio frequency signal .
36. The amplifying circuit as claimed in claim 26, further comprising means for subtracting the error signal from the input signal, in order to compensate for any distortion introduced by the main amplifier.
37. The amplifying circuit of any of claims 26 to 36, wherein the input signal is additionally fed into the path of the error signal prior to input to the nonlinear radio frequency device.
38. A method for amplifying a signal comprising the steps of: receiving an input signal at an input of a main amplifier, generating a first output signal at an output of the main amplifier and a second output signal at an input of the main amplifier, and forming an error signal from the second output signal with which to correct the first output signal .
39. The method as claimed in claim 38, further comprising the step of: combining the input signal and the error signal to correct the first output signal.
40. The method as claimed in claim 38, further comprising the step of: delaying the first output signal by a predetermined delay.
41. The method as claimed in claim 38, further comprising the step of: delaying the second output signal by a predetermined delay.
42. The method as claimed in claim 40, further comprising the step of: attenuating the second output signal by a predetermined amount .
43. The method as claimed in claim 41, further comprising the step of : attenuating the first output signal by a predetermined amount .
44. The method as claimed in claim 42, further comprising the step of: routing the input signal to the main amplifier, and routing the second output signal to a further amplifier in the path of the second output signal.
45. The method as claimed in any of claims 38 to 44, wherein the input signal is a radio frequency signal .
46. The method as claimed in claim 38, wherein the input signal is additionally fed into the path of the error signal prior to input to the non-linear radio frequency device .
EP02804314A 2001-12-06 2002-12-05 Signal processing element Withdrawn EP1508197A2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB0129309A GB2382936A (en) 2001-12-06 2001-12-06 Amplifier linearisation utilising amplifier return signal
GB0129309 2001-12-06
PCT/GB2002/005509 WO2003049278A2 (en) 2001-12-06 2002-12-05 Signal processing element

Publications (1)

Publication Number Publication Date
EP1508197A2 true EP1508197A2 (en) 2005-02-23

Family

ID=9927191

Family Applications (1)

Application Number Title Priority Date Filing Date
EP02804314A Withdrawn EP1508197A2 (en) 2001-12-06 2002-12-05 Signal processing element

Country Status (3)

Country Link
EP (1) EP1508197A2 (en)
GB (1) GB2382936A (en)
WO (1) WO2003049278A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11502650B2 (en) 2020-06-29 2022-11-15 Kabushiki Kaisha Toshiba Power amplifier and method of linearizing a power amplifier

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3638134A (en) * 1969-11-26 1972-01-25 Bell Telephone Labor Inc Reflectionless amplifier
US4056785A (en) * 1976-12-06 1977-11-01 Bell Telephone Laboratories, Incorporated Low-noise microwave amplifier
DE19528844C1 (en) * 1995-08-04 1996-10-24 Daimler Benz Aerospace Ag Amplification and phase linearisation system for travelling wave tube and semiconductor amplifiers
KR19980703507A (en) * 1996-02-01 1998-11-05 요트. 게. 아. 롤페즈 Distortion compensation of capacitively loaded followers

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO03049278A3 *

Also Published As

Publication number Publication date
GB2382936A (en) 2003-06-11
WO2003049278A3 (en) 2004-12-16
GB0129309D0 (en) 2002-01-23
WO2003049278A2 (en) 2003-06-12

Similar Documents

Publication Publication Date Title
US5644268A (en) Feed forward RF amplifier for combined signal and error amplification
EP0411180B1 (en) Feed forward distortion correction circuit
US5157346A (en) Rf wideband high power amplifier
US4554514A (en) Predistortion circuit with feedback
JP3041805B2 (en) Predistortion equalizer with resistive coupler and voltage divider
US4453133A (en) Active predistorter for linearity compensation
KR100597157B1 (en) High frequency amplifier
KR20120116104A (en) Power amplifier with advanced linearity
CA2286531A1 (en) Feedforward amplification system having mask detection compensation
US4531098A (en) Wide dynamic range amplifier with second harmonic signal cancellation
US5774018A (en) Linear amplifier system and method
EP1066680B1 (en) Predistorter
EP2277262B1 (en) Feedforward linearization of rf power amplifiers
JP3206722B2 (en) Method and apparatus for linearizing the amplification and phase response of traveling wave tubes and semiconductor amplifiers at different output levels
JPH0785523B2 (en) Non-linear distortion compensation circuit
US6249183B1 (en) High-efficiency amplifying device
EP1508197A2 (en) Signal processing element
US4359696A (en) Amplifiers
US6191652B1 (en) Amplifier distortion correction using cross-modulation
KR100313919B1 (en) Predistortion Power Amplifier having gain and phase compens ation function
KR100371531B1 (en) Feedforward linear power amplifier using error feedback
Meier et al. Error-feedback for amplifier linearization
KR100291146B1 (en) Linear power amplifier
KR100406872B1 (en) A postdistortion linearizer using diode mixer for improving intermodulation distortion of power amplifier
GB2335813A (en) A cubic and higher order predistorter for linearizing an amplifier

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20040705

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR IE IT LI LU MC NL PT SE SI SK TR

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20060701