EP1297525A2 - Method of traceback matrix storage in a speech recognition system - Google Patents

Abstract

A device (100) including a voice recognition system (204, 206, 207, 208) that generates a signal representative of the speech utterance. The utterance is divided into frames (Ft) representative of the utterance. Frames are allocated to states (S1-S5) using an alignment algorithm. A path representing frame to state allocations is stored in memory (110) using state transition types identifying a state transition to each state. Lattice traceback information for the voice recognition system is stored and updated by generating a traceback array having a plurality of rows and one or more columns, with each row of the plurality of rows corresponding to one of a plurality of states in which a traceback path terminates, and each column containing one or more dwell counts for states in the traceback path. An optimal state transition path into a given state of the plurality of states is determined, and the generated traceback array is updated in response to the determined optimal state transition path.

Description

METHOD OF TRACEBACK MATRIX STORAGE IN A SPEECH RECOGNITION SYSTEM

FIELD OF THE INVENTION The present invention is related to speech recognition, and more particularly to a method for storing lattice traceback information for a speech recognition system.

BACKGROUND OF THE INVENTION In a speaker dependent speech recognition system, users must enroll the vocabulary words they wish to have available when using the system. A vocabulary "word" can be a single spoken word or a short phrase, and the vocabulary words chosen depend on the particular application. For example, a speech recognition implementation for a portable radiotelephone might require the user to provide the names and locations of frequently called people (e.g., "Fred's office"), or commands for frequently used features usually available in a user interface (e.g., "battery meter", "messages", or "phone lock").

During the enrollment procedure, the speech recognition system is responsive to the user's input to derive a representative template for each vocabulary word. In some systems, this template is represented by a hidden

Markov model (HMM) which consists of a series of states. Each state represents a finite section of a speech utterance; utterance as used herein referring to a "vocabulary word", which may comprise one or more words. A statistical representation of each state of the HMM is calculated using one or more enrollment speech samples of a particular vocabulary word uttered by the user. This is accomplished through frame-to-state assignments.

Such state assignments are used both for training and voice recognition modes of operation. In particular, the assigned states are used to create models in a training mode which are used as a comparison reference during speech recognition mode. The assignments for input utterances in a voice recognition mode of operation can be used to generate score information and compare the input utterances to stored reference models. An alignment algorithm, such as a Viterbi algorithm, is used for frame- to-state alignment of an utterance. This alignment algorithm, which provides the best match of the speech utterance onto the model, is used to assign each frame of the vocabulary word utterance to individual states of the model. Using this assignment, the statistical representations for each state can be refined.

During frame alignment, a "path" is defined by finding the optimal match of the utterance frames with the states in the model. To do this, an evaluation is performed for each state of the HMM at every frame. A portion of this evaluation determines, given the observed speech up to frame t, which of the states leading into a given state was best at frame t-1. For HMMs that are fully connected, any state can transition to any other state. Therefore, N paths into each state are possible, where N is the number of states.

Using this technique, there is a need during the alignment algorithm to keep track of which speech frames are mapped to each state in the model. Using conventional techniques, this requires a large memory. Prior art methods use an array, called a traceback matrix, to store information for every frame, detailing the best path to every state. This would normally require an array of size NxT, where N is the number of states in the model and T is the maximum number of frames in an utterance. Since it is not uncommon for N to equal 20 and T to equal 300, such an implementation requires 6000 words of memory.

In order to implement a speaker dependent training algorithm on a portable device, such as wireless communication device where very little random access memory (RAM) is available, the technique used for storing lattice traceback information needs to minimize the memory required. Accordingly, there is a need for a method for storing lattice traceback information, needed to train a HMM, that reduces the amount of memory space required

BRIEF DESCRIPTION OF THE DRAWINGS The features of the present invention which are believed to be novel are set forth with particularity in the appended claims. The invention, together with further objects and advantages thereof, may best be understood by making reference to the following description, taken in conjunction with the accompanying drawings, in the several figures of which like reference numerals identify like elements, and wherein:

FIG. 1 is a circuit schematic in block diagram form of a radiotelephone storing lattice traceback information according to the present invention. FIG. 2 is a circuit schematic in block diagram form illustrating an input circuit for a voice recognition circuit in the radiotelephone according to FIG. 1.

FIG. 3 is an illustration of a left-right Hidden Markov Model with two associated speech utterances segmented into frames.

FIG. 4 is a state transition diagram for a model in which a self loop, a single step, and a single skip transition are allowed

FIG. 5 is a traceback lattice associated with each permitted path between states in the state transition diagram of FIG. 4.

FIG. 6 is a traceback array for storage of state dwell counts, according to the present invention. FIG. 7 is a schematic diagram of array update procedures for updating lattice traceback information stored in the traceback array of dwell counts using memory locations, according to the present invention.

FIG. 8 is a schematic diagram of a memory array for storing rows of state dwell counts, according to the present invention. FIGS. 9 and 10 are flowcharts corresponding to a method for updating traceback information stored as a traceback array of dwell counts using memory locations, according to the present invention.

FIG. 11 is a flowchart illustrating a procedure for generating a linear array, corresponding to the present invention, used to store a frame assignment for each frame based on the results of the array updating procedure of FIGS. 9 and 10. FIG. 12 is a schematic diagram of a linear array generated using the generating procedure of FIG. 11. FIG. 13 is a schematic diagram of storage of an array of state dwell counts using numeric encoded symbols, according to an alternative embodiment of the present invention.

FIG. 14 is a schematic diagram of array update procedures for updating traceback information using numeric encoding, according to the present invention.

FIG. 15 is a flowchart of a method for updating lattice traceback information stored as a traceback array of dwell counts using numeric encoding, according to the present invention.

FIG. 16 is a flowchart of a process for generating a linear array, according to the present invention, used to store a frame assignment for each frame based on results of the array updating procedure of FIG. 15.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of traceback matrix update and storage for speech recognition is disclosed. During a speaker dependent enrollment procedure, the user provides one or more repetitions of the speech utterance to be enrolled. Each of these utterances is matched against an existing hidden Markov model using a frame alignment procedure. Lattice traceback information for the speech recognition system is stored and updated by generating a traceback array having a plurality of rows and one or more columns, with each row of the plurality of rows corresponding to one of a plurality of states in which a traceback path terminates, and each column containing one or more dwell counts for states in the traceback path. An optimal state transition path into a given state of the pluralityof states is determined, and the generated traceback array is updated in response to the determined optimal state transition path. As this procedure is performed, an efficient method of recording the association between short-time analysis frames in the utterances and the states of the model is affected by storing a set of state dwell counts for each state.

A device 100, in which the invention can be advantageously employed is disclosed in FIG. 1. The device 100 is described to be a portable radiotelephone herein for illustrative purposes, but could be a computer, a personal digital assistant, or any other device that can advantageously employ voice recognition, and in particular a device which can take advantage of a memory efficient voice recognition system. The illustrated radiotelephone includes a transmitter 102 and a receiver 104 coupled to an antenna 106. The transmitter 102 and receiver 104 are coupled to a call processor 108, which performs call processing functions. The call processor 108 can be implemented using a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic unit, a combination of two or more of the above, or any other suitable digital circuitry.

The call processor 108 is coupled to a memory 110. Memory 110 contains RAM, electronically erasable programmable read only memory (EEPROM), read only memory (ROM), flash ROM, or the like, or a combination of two or more of these memory types. The memory 110 supports operation of the call processor 108, including the voice recognition operation, and must include an electronically alterable memory to support the state transition path memory described in greater detail herein below. The ROM can be provided to store the device operating programs. An audio circuit 112 provides digitized signals from a microphone 114 to call processor 108. The audio circuit 112 drives speaker 116 responsive to digital signals from the call processor 108.

The call processor 108 is coupled to a display processor 120. The display processor is optional if additional processor support is desired for the device 100. In particular, the display processor 120 provides display control signals to the display 126 and receives inputs from keys 124. The display processor 120 can be implemented using a microprocessor, a microcontroller, a digital signal processor, a programmable logic unit, a combination thereof, or the like. A memory 122 is coupled to the display processor to support the digital logic therein. The memory 122 can be implemented using RAM, EEPROM, ROM, flash ROM, or the like, or a combination of two or more of these memory types.

With reference to FIG. 2, the audio signals received by microphone 114 are converted to digital signals in an analog-to-digital converter 202 of audio circuit 112. Those skilled in the art will recognize that the audio circuit 112 provides additional signal processing, such as filtering, which are not described herein for brevity. The call processor, 108, performs feature extraction 204 on the processed digital signal representation of the analog signal output by microphone 114 and produces a set of feature vectors representative of the user utterance. A feature vector is produced for each short time analysis window. The short time analysis window is a frame, which in the example illustrated herein is 20 ms. Thus there is one feature vector per frame. The processor 108 uses the features for speech recognition 206 or training 207.

In training, the feature vectors of the utterance are used to create templates in the form of HMMs that are stored in memory 208. In speech recognition, the feature vectors representing the input utterance are compared to the templates of stored vocabulary words in memory 208 to determine what the user said. The system may output the best match, a set of the best matches, or optionally, no match. Memory 208, is preferably a non-volatile memory portion of memory 110 (FIG. 1), and may for example be an EEPROM or flash ROM. As used herein, "words" can be more than one word, such as "John Doe," or a single word such as "call". As mentioned briefly above, the stored vocabulary words in memory 208 are created in a training mode. For example, stored vocabulary words are each initially derived from two training signals, utterances Ul and U2 (FIG. 3), composed of respective feature vectors. Utterance Ul represents the signal stored the first time that a speaker says a particular word during training. Utterance U2 represents the signal the second time a speaker says a particular word during training. I-n the illustrated example, utterance Ul is of a different length than utterance U2. Those skilled in the art will recognize that more or fewer utterances may be used.

Because frames have the same length, whereas utterances Ul and U2 have different lengths, when each utterance is represented by frames, utterances Ul and U2 having different lengths will likewise have different numbers of frames. A plurality of frames F_t make up an utterance. Although in general utterances will be identified as F_t, where t is from 1 to T, in the notation for FIG. 3 the frames of the utterance are identified by notation F_ab, where a is the utterance number and b is the frame number.. In particular, utterance Ul has 10 frames: namely F_11; Fι₂, F₁₃, F₁₄, F₁₅, F₁₆, F₁₇, Fis, F₁₉, and F₁₁₀. Utterance U2 has 12 frames, namely: F₂₁, F22, F₂₃, F₂ , F₂₅, F ₆, F₂₇, F₂₈, F₂₉, F₂₁₀, F₂₁₁, and F₂₁₂. By way of example, each frame comprises features representing 20 milliseconds of sound.

A feature vector may be generated in any conventional manner. For example, a feature vector may comprise cepstral and delta-cepstral features that are generated from the output of A/D converter 202 (FIG. 2).

With reference to FIG. 3, initially, state 1 (SI) is formed from frames Fπ and F₁₂ of utterance Ul, and frames F ₁ and F₂₂ of utterance 2. These frame values are used to initially calculate some or all of the parameters composing the statistical representation of State 1. In the preferred embodiment, the statistical representation is a mean of frames from utterance Ul and utterance U2. Thus, state 1 is initially set to the mean of frames Fπ and F₁₂ of utterance Ul and frames F₂₁ and F₂₂ of utterance U2. Those skilled in the art will recognize that a variance can also be included in the state. Statistical representations of the other states are also generated. The second state S2 is the mean of the values of frames F₁₃ and F₁₄ of utterance Ul and frames F ₃ and F₂ of utterance U2. The state S3 is similarly the mean of the values of frames F₁₅ and F₁₆ of utterance Ul and frames F ₅ and F₂₆ of utterance U2. The state S4 is the mean of frames F₁₇ and F₁₈ of utterance Ul and frames F₂₇, F₂₈ and F₂₉ of utterance U2.

As exemplified above, extra frames in utterance U2 are allocated to the last two states. If the second utterance has only one extra frame, only the last state will get an extra frame. If the second utterance has three extra frames, each of the last three states are allocated an extra frame. Similarly, if the first utterance has extra frames, such as four extra frames, the last four states will each have an extra frame. If either utterance has five more frames than the other utterance, then each state receives three frames from the utterance with more frames and two frames from the utterance having fewer frames.

The above frame allocation is provided as an example of how the frames may be initially allocated to states and how a statistical representation of a state could be formed. However, those skilled in the art will recognize that numerous other methods exist both for initial allocation of states and for statistically representing the states, and thus it is not intended that the invention be limited to the above environment. In the example, five states are used regardless of the length of the utterance. Those skilled in the art will recognize that any number of states may be used, and it is envisioned that more than ten states will be employed for each utterance. Additionally, the number of states may be fixed regardless of the length of the utterance, or the number of states can depend on the length of the utterance. The remaining discussion will be made with respect to a system using five states for any utterance, regardless of its length.

Once the states SI through S5 are created from the statistics of frames from utterances Ul and U2, a Hidden Markov Model (HMM) is created. The call processor 108 employs an alignment algorithm to run each of the utterances through the states of the HMM created. The alignment can then be used to reestimate the statistical representation of the states. In particular, the alignment algorithm operates to determine the best path back from any point based upon a score for each path considered. A method, according to the present invention, for storing and updating this information, commonly referred to as lattice traceback information, will be described generally with respect to FIGS. 6 and 7.

FIG. 4 is a state transition diagram for a model in which a self loop, a single step, and a single skip transition are allowed. While only states 1-6 are illustrated in the state transition diagram of FIG. 4, it is understood that any number of states can be included, and that the number of states has been limited to six states merely to simplify the discussion.

In order to better model the sequential, ordered nature of acoustic events in a speech utterance, the possible paths from state to state, or state transitions, in a model are typically restricted. For example, in one of the most common hidden Markov model architectures, and one that has proven to be effective for many speech recognition tasks, the allowable state transitions are restricted to either a self loop, a single step, or a single skip. Generally, HMM state transitions are restricted to being left-to-right in nature, as shown in FIG. 4, where the allowable transition paths into a particular state Sn come from either that state Sn, or from one of the two preceding states, S(n-l) or S(n-2). A state transition path into a particular state Sn that comes from that state Sn is known as a self loop, and is denoted generally by a_nn, a state transition path into a particular state Sn that comes from a first preceding state S(n-1) is known as a single step, and is denoted generally by a^_n, and a state transition path into a particular state Sn that comes from a second preceding state S(n-2) is known as a single skip, and is denoted generally by a_(n-_2)n. In particular, as illustrated in FIG. 4, the allowable state transition paths into a fifth state 300, for example, result from either a self loop transition a₅₅ in which the previous frame state is the same as the present frame state, a single step transition a₄₅ in which the previous frame state was a fourth state 302, or a single skip transition a₃₅ in which the previous frame state was a third state 304. Similarly, the allowable state transition paths into the fourth state 302 result from either a self loop transition a in which the previous frame state is the same as the present frame state, a single step transition a₃₄ in which the previous frame state was the third state 304, or a single skip transition a₂ in which the previous frame state was a second state 306. FIG. 5 is a traceback lattice associated with each permitted path between states in the state transition diagram of FIG. 4. As illustrated in FIG. 5, each point 308 of the lattice 310 corresponds to a frame and state location in the lattice 310. A path extends through the points, with each permitted path between states being one of the three state transition types, i.e., the self loop, single step, or single skip state transition. For example, each of the three allowable state transition paths ass, a*₅ and a₃₅ into the fifth state 300 illustrated in FIG. 4 at time t=5 are designated by the paths leading into point A of the lattice 310. The self loop state transition path a₅₅ into point A is designated by a path 312 originating from point B, with point B being located at the same state at time t=4 as point A, namely state 5 on the vertical axis. The single step state transition path a ₅ into point A is designated by a path 314 originating from point C, with point C being located one state prior to the state of point A at time t=4, namely state 4 on the vertical axis. Finally, the single skip state transition path a₃₅ into point A is designated by a path 316 originating from point D, with point D being located two states prior to the state of point A at time t=4, namely state 3 on the vertical axis.

As can be seen from FIGS. 4 and 5, only three states can precede any given state. Although such restrictions on allowable transitions are inherent to this type of HMM architecture, traditional traceback matrix storage techniques do not make use of this property. The present invention uses this knowledge of the restricted state transitions, and provides further improvement to the traceback matrix which significantly reduces the size of the memory needed to record the traceback path. In particular, according to the present invention, traceback information is maintained using an array of state dwell counts in which the path traversed through the model is recorded. Given the current state, the path back through the lattice is recorded as the number of frames spent in that state (i.e., the dwell count for that state) and the number of frames spent in each preceding state. A traceback memory array 318 for storage of state dwell counts, according to the present invention, where the number of states N is equal to five, for example, is illustrated in FIG. 6. The traceback array 318 of the present invention can be visualized as being triangular in shape with each row corresponding to one of the five states 1-5 in which a traceback path terminates, and in each column the dwell count is recorded for each of the states in that traceback path.

According to the present invention, therefore, a path back from each state n of the five states, n=l,2,...5 corresponding to rows 1-5, is stored by updating a set of n dwell counts, enumerating how many frames, or time ticks, were spent in each of the states 1 though n. For example, as illustrated in FIG. 6, row 320 corresponds to a state transition path terminating in state 5, and information stored in column 322 of row 322 indicates the number of frames spent in state 5 for that path, information stored in column 324 of row 320 indicates the number of frames spent in state 4 for that path, information stored in column 326 of row 320 indicates the number of frames spent in state 3 for that path, information stored in column 328 of row 320 indicates the number of frames spent in state 2 for that path, and information stored in column 330 of row 320 indicates the number of frames spent in state 1 for that path. Similarly, row 332 corresponds to a state transition path terminating in state 4, and information stored in column 324 of row 332 indicates the number of frames spent in state 4 for that path, information stored in column 326 of row 332 indicates the number of frames spent in state 3 for that path, information stored in column 328 of row 332 indicates the number of frames spent in state 2 for that path, and information stored in column 330 of row 332 indicates the number of frames spent in state 1 for that path, and so forth in rows 334-338.

While the traceback array of FIG. 6 includes five states, it is understood that the present invention is not limited to the use of five states, but can be applied for any number of states.

By using the model for a traceback array according to the present invention

N(N + 1) in an HMM with Ν states, an array of size is required. Since Ν can be

up to an order of magnitude smaller than the maximum number of frames in an utterance T, the traceback array of the present invention represents a significant savings in memory required over the Ν x T size array required by the conventional technique.

Array update procedures for updating traceback information stored in the traceback array of dwell counts using memory locations according to the present invention are illustrated in FIG. 7. The examples of FIG. 7 show a case where the number of states Ν=4, although it is understood that any number of states can be included and that the number of states has been limited to four states merely to simplify the discussion. According to the present invention, update procedures are available for a self loop state transition path, indicated by lattice 340 and traceback arrays 342 and 360, a single step state transition path, indicated by lattice 344 and traceback arrays 346 and 364, a single skip state transition path, indicated by lattice 348 and traceback arrays 350 and 368, a double skip state transition path, indicated by lattice 352 and traceback arrays 354 and 372, and so forth extending to an N-state skip state transition path.

Each point of the lattice corresponds to a frame and state location in the lattice, with the horizontal axis corresponding to the frame, and the vertical axis corresponding to the state.

As illustrated in FIG. 7, the best path for each path termination state at frame 4 is indicated by rows of dwell counts in array 342 (equivalently arrays 346, 350, and 354). The traceback paths recorded in the arrays can be seen by following the paths backward from frame 4 in lattice 340 for state 4, in lattice 344 for state 3, in lattice 348 for state 2, and in lattice 352 for state 1. For example, a traceback path terminating in (frame 4, state 4) is one frame in state 4, one frame in state 3, one frame in state 2, and one frame in state 1. A traceback path terminating in (frame 4, state 3) is one frame in state 3, two frames in state 2, and one frame in state 1. A traceback path terminating in (frame 4, state 2) is three frames in state 2, and one frame in state one. Finally, a traceback path terminating in (frame 4, state one) is four counts in state 1.

While, each of the paths terminating at one of the four states corresponds to the best path for that one state, i.e., the traceback path terminating in state four is the best path for state four, the traceback path terminating in state three is the best path for state three, etc., these best paths do not necessarily overlap.

Therefore, for each state there is a corresponding, possibly unique, best path, as shown in the lattices 340, 344, 348, and 352. According to the present invention, the traceback path for each state is recorded separately in a row of the array of traceback information. According to the present invention, certain updating procedures are applied, depending upon the state transition path determined to be optimal. The optimal path is determined using an alignment algorithm, such as the Viterbi alignment algorithm, and path information stored in the traceback array is updated to reflect the chosen path using the updating procedures of the present invention. Each time a new frame is received, for example when frame 5 is considered in the illustration of FIG. 7, the alignment algorithm is run and the path information is updated.

To update the path information for a newly received frame, each state is considered. For example, consider state 4, frame 5, where possible paths going from frame 4 to frame 5 are under consideration. If the optimal path into a state is the self loop state transition path, as illustrated going from frame 4 to frame 5 in lattice 340 of FIG. 7, i.e., the state transition into state four at frame 5 comes from state four, a first column 356 of row 358, which corresponds to the number of frames (time ticks) spent in state 4, is incremented by one. As a result, an updated array 360 indicates that the optimal traceback path terminating in state 4 consists of two frames in state 4, one frame in state 3, one frame in state 2, and one frame in state 1. If the optimal path into a state is a single step state transition path, as illustrated going from frame 4 to frame 5 in lattice 344 of FIG. 7, i.e., the state transition into state four at frame five comes from state three, a row 362 corresponding to the first preceding state, i.e., state three, is copied into row 358, and the first column entry of row 358 is reset to 1. As a result, an updated array 364 indicates that the optimal traceback path terminating in state 4 consists of one frame in state 4, one frame in state 3, two frames in state 2, and one frame in state 1.

If the optimal path into a state is a single skip state transition path, as illustrated going from frame 4 to frame 5 in lattice 348 of FIG. 7, i.e., the state transition into state four at frame five comes from state two, a row 366 corresponding to the second preceding state, i.e., state two, is copied into row 358, and the first column entry of row 358 is reset to 1. Since state 3 has been skipped and row 366 does not include a dwell count for state three, the dwell count for state three is set to zero in row 358. In this example, an updated array 368 indicates that the optimal traceback path terminating in state 4 consists of one frame in state 4, zero frames in state 3, three frames in state 2, and one frame in state 1.

Similar to the situation where the optimal path into a state is a single skip state transition path, if the optimal path into a state is a double skip state transition path, as illustrated going from frame 4 to frame 5 in lattice 352 of FIG. 7, i.e., the state transition into state four at frame five comes from state one, a row 370 corresponding to the third preceding state, i.e., state one, is copied into row 358 and the first column entry of row 358 is reset to 1. Since states three and two have been skipped and row 370 does not include a dwell count for state three and state two, the dwell count for states two and three is set to zero in row 358. In this example, an updated array 372 indicates that the optimal traceback path terminating in state 4 consists of one frame in state 4, zero frames in state 3, zero frames in state 2, and four frames in state 1. A similar update procedure is applied to a triple skip state transition path, and so forth, so that the update procedures according to the present invention can be extended to an N-state skip. With careful consideration, it can be observed that the single step, single skip, double skip, and all skips up to an N-state skip, all employ the same generic update procedure. Namely, all updates are generically handled by resetting the current state dwell count in first column to one, copying the row of dwell counts corresponding to the relevant preceding state, and setting all skipped state dwell counts to zero (if any). Furthermore, by proceeding at every frame evaluating the last state first and working down toward the first state, it is possible to perform the traceback array updates in-place therefore requiring minimal working memory during the alignment procedure. Accordingly, while the update procedures described in reference to FIG. 7 involves four states, it is understood that the update procedures of the present invention can be applied for any number of states.

The memory array 342 (equivalently 346, 350, and 354) for storing rows of state dwell counts, according to the present invention, is shown generally in FIG 8. The memory array 342 includes a number of state dwell count memory locations 343, with each of the memory locations 343 being identified generally by L_n[i], so that a value located in each of the memory locations 343 corresponds to the number of frames assigned to state i in a path traced back from state n. For example, the memory location corresponding to L₄[3] is a location in the memory array 342 indicating, for the path traced back from state 4, the number of frames assigned to state 3, while the memory location corresponding to L₂[2] indicates, for the path traced back from state 2, the number of frames assigned to state two, and so forth.

In the procedures outlined for update of the traceback information based on state dwell counts, e.g. FIG. 7, references to the "rows" and "columns" of the array are made. It should be obvious to those familiar with the state of the art that memory, such as dynamic RAM and other storage media, are not typically organized in such a triangular or rectangular format. Typically, memory is accessed in a linear fashion with a single reference pointer to a memory word. Therefore, in order to unwrap the traceback array of the present invention, arithmetic will be performed to convert a "row" and "column" number for a state dwell count to a linear memory word pointer. Such arithmetic operations will vary slightly depending on how the triangular array is mapped onto a linearly organized memory device, and therefore are not included as part of this specification but are considered to be obvious to those skilled in the art of software development.

FIGS. 9 and 10 are flowcharts corresponding to a method for updating traceback information stored as a traceback array of dwell counts using memory locations, according to the present invention. As illustrated in FIGS. 8 and 9, the memory array is first initialized in Step 400 by setting the dwell count for L^l] equal to one, setting the dwell counts in the remaining locations of the array equal to zero, and setting a frame counter to the next frame, t = 2. A determination is then made in Step 402 as to whether all of the all frames have been evaluated, i.e. if t > T.

If it is determined that all of the frames have been evaluated, the update procedure is completed, Step 404. However, if it is determined that all of the frames have not been evaluated, current state n is set equal to the total number of states N in Step 408, so that the highest, or last state is evaluated first. For example, as illustrated in FIG. 7, according to the present invention, current state n is set equal to four so that the evaluation begins at the point of lattice 340 (equivalently lattices 344, 348, 352) corresponding to frame two, state four.

A determination is then made in Step 410 as to whether all states have been evaluated, i.e. if n < 1. If all states have been evaluated, the frame counter is incremented, i.e. frame t = 3 in Step 412, and the evaluation returns to Step 402. However, if it is determined in Step 410 that all states have not been evaluated, a search for the best path into the current state n at frame t is performed in Step 414, using Viterbi search methods. If the best path into the current state n at frame t is determined to be from current state n (i.e. a self loop), state dwell count memory location L_n[n], corresponding to the current state n, is incremented in Step 418, the current state n is decremented in Step 420, and the process then returns to Step 410. As can be seen from FIG. 7, the process corresponding to the sequence of Steps 410 and 414-416 of FIG. 9 corresponds to the traceback information updating procedure for updating array 342 to updated array 360 when the state transition is a self loop, described above.

If it is determined in Step 416 that the best path to state n is not from state n (i.e., something other than a self -loop state transition), the process continues at Step A, which is shown in FIG. 10. As illustrated in FIG. 10, since the best path is not a self -loop state transition, the best path must be from a previous state m other than state n. As a result, according to the present invention, state dwell count memory location Ln[n] is reset to one in Step 422, and the process is continued in Step 424 by going to the prior state dwell count memory location, L_n[i], where state i is equal to the state prior to state n, or i = n-1. A determination is then made in Step 426 as to whether all skipped states have been evaluated, i.e. if i is less than or equal to m.

If it is determined that all skipped states have not been evaluated, the state dwell count memory location L_nfi] is cleared so that state dwell count memory location L_n[i] is equal to zero in Step 436, state i is decremented in Step 438, and the process returns to Step 426. If it is determined in Step 426 that all skipped states have been evaluated, or equivalently if no states were skipped, a determination is made in Step 428 as to whether all states have been evaluated, i.e. if i < 1.

If it is determined that all states have been evaluated, the process continues at Step 420 of FIG. 9, Step 430. However, if it is determined in Step 428 that all states have not been evaluated, a state dwell count memory location corresponding to the previous state m, L_m[i], is copied into prior state dwell count memory location L_n[i] in Step 432, state i is decremented in Step 434, and the process resumes at Step 428.

As can be seen from FIG. 7, the process corresponding to the sequence of Steps 426-434 of FIG. 10 corresponds to the traceback information updating procedure for updating array 346 to updated array 364 corresponding to when the state transition is a single step, described above. Likewise, as can be seen from FIG. 7, the process corresponding to the sequence of Steps 426, 436, 438, 428, 432, and 434 of FIG. 10 corresponds to the traceback information updating procedure for updating arrays 350 and 354 to updated arrays 368 and 372, respectively, corresponding to when the state transition is a single skip or a double skip step, described above.

FIG. 11 is a flowchart illustrating generation of a linear array A[t], corresponding to the present invention, used to store a frame assignment for each frame based on the results of the array updating procedure of FIGS. 9 and 10 described above. According to the present invention, the triangular shaped memory array 342 of FIG. 8 is unwrapped into the linear array A[t] having a length corresponding to the total number of frames T in the utterance being aligned. For example, as illustrated in updated array 360 of FIG. 7, if the results of the update procedure of the present invention indicate that in the path traced back from state 4, the number of frames assigned to state four, L₄[4], is equal to two, and correspondingly, L₄[3] is equal to one, L₄[2] is equal to one, and L₄[l] is equal to one, the total number of frames is equal to five. Using this known number of frames for a path traced back from each state, the generation of the linear array A[t], according to the present invention, is performed using the procedure of FIG. 11, resulting in a linear array shown generally in FIG 12. As illustrated in FIG. 12, a generated linear array 440 includes memory locations corresponding to each of the five frames, f =1 to f=5, for storing values corresponding to the state number that the frames are associated with. For example, frames 4 and 5 are associated with state 4.

Once a determination has been made that all frames have been evaluated, in Step 404 of FIG. 9, updating of the array of state dwell counts has been completed and the process, according to the present invention, for generating the linear array A[t] to store frame assignments for each frame is initiated. If, as described above, the updated array of state dwell counts indicates that L [4]=2, L₄[3]=l, L [2]=l, and L [l]=l, there are a total of four states and a total of fives frames corresponding to the path traced back from state four. As a result, the current frame t is initialized as being equal to the total number of frames, and the current state n is set equal to the total number of states, Step 442. It is understood that the present invention applies to any number of states, and to any possible values for L_N[1] through L_N[N], and that the values for the number of states and for L₄[l]-L₄[4] have been chosen merely to assist in the explanation of the present invention. A counter k, corresponding to the number of frames assigned to state n in the path traced back from state N, which is obtained from the updated array of state dwell counts, is set in Step 444 by setting the counter k equal to LN[Π]. Since L₄[4]=2 in the example of the updated array of state dwell counts above, the current value k is equal to 2. A determination is made at Step 450 as to whether all state assignments for the current state n have been accounted for, i.e., is the current value k less than one. If all state assignments have not been accounted for, a frame assignment for the linear array is recorded in Step 446, the frame t and the counter k are then decremented in Step 448, and the process returns to Step 450. However, if it is determined in Step 450 that all state assignments have been accounted for, the current state n is decremented in Step 452, and a determination as to whether all states have been evaluated is made in Step 454, i.e. if n < 1. If all states have been evaluated, the process is completed, Step 456, and in the example above, the linear array A[t] is generated. However, if all states have not been evaluated, the process returns to Step 444.

According to an alternative embodiment of the present invention, the traceback and frame assignment procedures are performed using numeric encoding rather than memory locations. For example, FIG. 13 is a diagram of storage of an array of state dwell counts using base-B numeric encoded symbols, according to the present invention. An array of state dwell counts 457 includes state dwell count memory locations Li-L , noted generally by LQ. Each state dwell count memory location LQ contains encoded path information back from a state n, corresponding to state dwell counts for each state in a path back from state n, that is updated using an array updating procedure according to the present invention, and describe below in reference to FIG. 14. The array of state dwell counts 457 uses a base-B numeric value, such that the dwell time in any state cannot exceed B frames. In a preferred embodiment of the present invention, the base number B is chosen to be a power of two (e.g., 2, 4, 8, 16, 32, etc.) to facilitate calculations on a typical computing device, however, it is understood that any value for base number B may be chosen. In an alternative embodiment of the present invention, the base number B is chosen to be 10, and this value is used in the example shown in FIG. 14 and the corresponding discussion that follows. Array update procedures for updating traceback information stored in the traceback array of dwell counts using numeric encoding according to the alternative embodiment of the present invention are illustrated in FIG. 14. Similar to the discussion of FIG. 7 above, the updating examples of FIG. 14 illustrate a case where the number of states N is equal to four, although it is understood that any number of states can be included and that the number of states has been limited to four states merely to simplify the discussion. According to the alternative embodiment of the present invention, update procedures are available for a self loop state transition path, indicated by lattice 458 and traceback arrays 460, 462, a single step state transition path, indicated by lattice 464 and traceback arrays 460, 466, a single skip state transition path, indicated by lattice 468 and traceback arrays 460, 470, a double skip state transition path, indicated by lattice 472 and traceback arrays 460, 474, and so forth extending to an N-state skip state transition path.

According to the present invention, certain updating procedures are applied, depending upon the state transition path determined to be optimal. The optimal path is determined using an alignment algorithm, such as the Viterbi alignment algorithm, and path information stored in the traceback array is updated to reflect the chosen path using the updating procedures according to the alternative embodiment of the present invention. Each time a new frame is received, for example, when frame 5 is considered in the illustration of FIG. 14, the alignment algorithm is run and the path information is updated. To update the path information for a newly received frame, each state is considered. If the state being considered is state n, and the optimal path into state n is determined to come from state m (where m is less than or equal to n), then the updated encoded base-B value recording the traceback path from state n is given by L_n = L_m + B^(n-1). For example, consider state n=4, frame 5, where possible paths going from frame 4 to frame 5 are under consideration. If the optimal path into a state is the self loop state transition path, as illustrated going from frame 4 to frame 5 in lattice 458 of FIG. 14, traceback array 460 is updated according to the present invention by taking the sum of B^n_1 and the state dwell counts for the current state n corresponding to state dwell count location Ln from traceback array 460.

For example, since the dwell count for state dwell count location L in the current traceback array 460 is one dwell count in state four, one dwell count in state three, one dwell count in state two and one dwell count in state one, and the current state n is equal to four, the current traceback array 460 is updated by taking the sum of state dwell count location L₄ and B^4"1. Therefore, using the updating procedure of the present invention, an updated dwell count for state dwell count location L is equal to 2111 , as shown in updated traceback array 462.

If the optimal path into a state is the single step state transition path, as illustrated going from frame 4 to frame 5 in lattice 464 of FIG. 14, traceback array 460 is updated according to the present invention by taking the sum of B^n_1 and the value of the state dwell counts in a state dwell count location corresponding to the previous state from traceback array 460. For example, since the dwell count for state dwell count location L₃ of traceback array 460 is one dwell count in state three, two dwell counts in state two and one dwell count in state one, and the current state n is equal to four, traceback array 460 is updated by taking the sum of state dwell count location L₃ and B^4"1, resulting in the updated dwell count of state dwell count location L equal to 1121, as shown in updated traceback array 466. Similarly, if the optimal path into a state is the single skip state transition path, as illustrated going from frame 4 to frame 5 in lattice 468 of FIG. 14, traceback array 460 is updated according to the present invention by taking the sum of B^n_1 and the value of the state dwell counts, from traceback array 460, in a state dwell count location corresponding to a previous state that is two states prior to the current state n. For example, since the values of the state dwell count for state dwell count location L₂ of traceback array 460 are three dwell counts in state two and one dwell count in state one, and the current state n is equal to four, traceback array 460 is updated by taking the sum of state dwell count location L₂ and B^4"1, resulting in the updated dwell count of state dwell count location L equal to 1031, as shown in updated traceback array 470.

Finally, if the optimal path into a state is the double skip state transition path, as illustrated going from frame 4 to frame 5 in lattice 472 of FIG. 14, traceback array 460 is updated according to the present invention by taking the sum of B^{n l} and the value of the state dwell counts, from traceback array 460, in a state dwell count location corresponding to a previous state that is three states prior to the current state n. For example, since the values of the state dwell count for state dwell count location X_\ is four dwell counts in state one, and the current state n is equal to four, traceback array 460 is updated by taking the sum of state dwell count location h_\ and B^4"1, resulting in the updated dwell count of state dwell count location L equal to 1004, as shown in updated traceback array 474. It should be obvious to those skilled in the art that this update procedure of calculating Ln = L_m + B^{(n )} is generally applicable to any transition to state n from state m where m is less than or equal to n.

In the procedures outlined for update of the traceback information based on numeric encoding, e.g. FIG. 14, references the individual numerically encoded base-B values are made. It should be obvious to those familiar with the state of the art that memory words in a memory device, such as dynamic RAM and other storage media, have a fixed memory word size. Li the event the base B used for the encoding and the number of states N in the model are large enough, the number of bits needed to store an encoded value L_n may exceed the memory word size. In this case, certain arithmetic operations may be needed to perform the traceback information update procedures to accommodate an encoded value that is spread across multiple memory words. Such arithmetic operations will vary slightly depending on the size of a memory word and the facilities of the device used to perform the computation, and therefore such arithmetic operations are not included as part of this specification but are considered to be obvious to those skilled in the art of software development.

FIG. 15 is a flowchart of a method for updating traceback information stored as a traceback array of dwell counts using numeric encoding, according to the alternative embodiment of the present invention. As illustrated in FIGS. 13 and 15, the array of state dwell counts 457 is first initialized in Step 500 by setting the dwell count for X_\ equal to one, setting the dwell counts in the remaining locations of the array equal to zero, and setting a frame counter to the next frame, t = 2. A determination is then made as to whether all of the frames have been evaluated, Step 502. If it is determined that all frames have been evaluated, the update procedure is completed, Step 504. However, if it is determined that all frames have not been evaluated, the process begins at the last state by setting the current state equal to the total number of states N, Step 508, so that the highest, or last state is evaluated first. For example, as illustrated in FIG. 14, according to the alternative embodiment of the present invention, state n is set equal to four so that the evaluation begins at the point of lattice 458 (equivalently lattices 464, 468, 472) corresponding to frame two, state four. A determination is then made as to whether all states have been evaluated, i.e. if n < 1, Step 510. If all states have been evaluated, the frame counter is incremented, i.e. frame t = 3 in Step 512, and the evaluation returns to Step 502. However, if it is determined in Step 510 that all states have not been evaluated, a search for the best path into the current state n at frame t is performed in Step 514, using Viterbi search methods.

As can be seen in FIGS. 9 and 15, Steps 500-514 of the update procedure according to the alternative embodiment of the present invention for updating traceback information stored as a traceback array of dwell counts using numeric encoding is the same as Steps 400-414 of the update procedure according to the present invention for updating traceback information stored as a traceback array of dwell counts using memory locations, described above. However, in the update procedure, according to the alternative embodiment of the present invention, for updating traceback information stored as a traceback array of dwell counts using numeric encoding of FIG. 15, once the search for the best path has been completed, Step 514, the results are used to identify that the best path into current state n is from state m, Step 516. The state dwell count for current state n is then set equal to the state dwell count corresponding to the sum of the state dwell count location corresponding to previous state m, L_m , and B^(n_1) , Step 518. The process then continues with the prior state n=n-l, Step 520, and then resumes at Step 510. FIG. 16 is a flowchart of a process for generating a linear array, according to the alternative embodiment of the present invention, used to store a frame assignment for each frame based on results of the array updating procedure of FIG. 15. According to the alternative embodiment of the present invention, the array of state dwell counts 457 of FIG. 13 is unwrapped into a linear array A[t] having a length corresponding to the total number of frames in the utterance being aligned, similar to the generated linear array 440 of FIG.12, described above. Once a determination that all frames have been evaluated has been made in Step 502 and the update procedure has been completed, Step 504 of FIG. 15, the process for generating a linear array, according to the alternative embodiment of the present invention, based on the results of the array updating procedure of FIG. 15, is initiated in Step 600 of FIG. 16 by setting the current frame t equal to the total number of frames T, and setting the current state n equal to the total number of states N. If, for example, a linear array is to be generated from the updated traceback array 462 of FIG. 14, the total number of states is four and the total number of frames is equal to the sum of the individual base-B digits in state dwell count location L .

Since numerically encoded traceback information corresponding to the dwell count in state dwell count location L₄ is two frames in state four, and one frame in each of states one, two , and three, respectively, the encoded value in state dwell count location L is 2111. The total number of frames T in the utterance is equal to five (2+1+1+1=5). It is understood that the alternative embodiment of the present invention can be applied to any number of states and frames, and that the values for the state and frames has been chosen merely to assist in the explanation of the alternative embodiment of the present invention. After the initialization of Step 600, numerically encoded traceback information L corresponding to the current state dwell count location L_N is copied in Step 602, and a determination is made as to whether the copied traceback information L is greater than or equal to B^(n-1), Step 604. As described above, while in a preferred embodiment of the present invention, B is equal to ten, it is understood that any value for B can be utilized. However, according to the alternative embodiment of the present invention, the dwell time in any state cannot exceed B frames.

If it is determined in Step 604 that the copied numerically encoded traceback information L is greater than or equal to B^{(n )}, the corresponding frame assignment for the linear array A[t] is recorded in Step 606, the current frame t is decremented in Step 608, the copied traceback information L is decremented by the base-B value B^{(n )} corresponding to state n, Step 610, and the process returns to Step 604. If it is determined in Step 604 that the copied numerically encoded traceback information L is not greater than or equal to B*-^11"^, the current state n is decremented to a previous state n-1 in Step 612, and a determination is made as to whether all states have been evaluated, Step 614. If it is determined in Step 614 that all of the states have not been evaluated, the process continues at Step 604 using the previous state n-1. If it is determined that all states have been evaluated in Step 614, the linear array generating process is completed, Step 616, resulting in the linear array 440 of FIG. 12.

While a particular embodiment of the present invention has been shown and described, modifications may be made. It is therefore intended in the appended claims to cover all such changes and modifications which fall within the true spirit and scope of the invention.

Claims

CLAIMS We claim:

1. A method for storing and updating lattice traceback information in a speech recognition system, comprising the steps of: generating a traceback array having a plurality of rows and one or more columns, each row of the plurality of rows corresponding to one of a plurality of states in which a traceback path terminates, and each of the one or more columns containing dwell counts for states in the traceback path; determining an optimal state transition path into a given state of the plurality of states; and updating the generated traceback array in response to the determined optimal state transition path.

2. The method of claim 1, further comprising the step of: incrementing a dwell count contained in a first column of a row corresponding to the given state, in response to the determined optimal state transition path being a self -loop state transition path.

3. The method of claim 2, further comprising the steps of : copying a row corresponding to a first preceding state prior to the given state into a row corresponding to the given state; and resetting a dwell count contained in a first column of a row corresponding to the given state equal to one, in response to the determined optimal state transition path being a single step state transition path.

4. The method of claim 3, further comprising the steps of: copying a row corresponding to a second preceding state prior to the given state into a row corresponding to the given state; resetting a dwell count contained in a first column of the row corresponding to the given state equal to one; and resetting remaining dwell counts contained in the row corresponding to the given state, that are not included in the copied row, equal to zero, in response to the determined optimal state transition path being a single skip state transition path.

5. The method of claim 4, further comprising the steps of: copying a row corresponding to a third preceding state prior to the given state into a row corresponding to the given state; resetting a dwell count contained in a first column of the row corresponding to the given state equal to one; and resetting remaining dwell counts contained in the row corresponding to the given state, that are not included in the copied row, equal to zero, in response to the determined optimal state transition path being a double skip state transition path.

6. The method of claim 3, further comprising the steps of: copying a row corresponding to a state that is n states prior to the given state, into a row corresponding to the given state; resetting a dwell count contained in a first column of the row corresponding to the given state equal to one; and resetting remaining dwell counts contained in the row corresponding to the given state, that are not included in the copied row, equal to zero, in response to the determined optimal state transition path being an n-1 skip state transition path.

7. The method of claim 6, further comprising the step of: determining an optimal state transition path into each of the plurality of states, starting with the last state of a model.

8. The method of claim 7, further comprising the step of: determining an optimal state transition path into each of the plurality of states for each new frame f . .

9. The method of claim 8, further comprising the steps of: determining whether all frames have been evaluated; setting a current frame t equal to a total number of frames T and a current state n equal to a total number of states N in response to determining all frames have been evaluated; setting a counter k, corresponding to the number of frames assigned to state n in a path traced back from state N, equal to a state dwell count memory location L_N[n]; determining whether all state assignments for the current state n have been accounted for; recording a frame assignment, decrementing the current frame t and the counter k, and returning to the step of determining whether all state assignments for the current state n have been accounted for, in response to all state assignments not being accounted for; decrementing the current state n in response to all state assignments for the current state n being accounted for; and determining whether all states have been evaluated, and returning to the step of setting counter k in response to all states not having been evaluated.

10. The method of claim 1, further comprising the steps of: setting a current state n equal to the given state; determining that the optimal state transition path into the current state n is from a state m, where m is less than or equal to n; and setting a state dwell count memory location corresponding to the current state, stored as a base-B numerically encoded value, equal to a sum of a state dwell count memory location corresponding to state m and a base-B value B^(n_1).

11. The method of claim 10, further comprising the step of: determining an optimal state transition path into each of the plurality of states, starting with the last state of a model.

12. The method of claim 11, further comprising the step of: determining an optimal state transition path into each of the plurality of states for each new frame f .

13. The method of claim 12, further comprising the steps of:

(i) setting a current frame t equal to a total number of frames T and a current state n equal to a total number of states N;

(ii) copying base-B numerically encoded traceback information from a state dwell count location corresponding to the total number of states N;

(iii) determining whether the copied traceback information is greater than or equal to B^(n"1}; (iv) recording a frame assignment, decrementing the current frame t, decrementing the copied traceback information by the base-B value B^(n_1) corresponding to the current state, and returning to step (iii) in response to the copied traceback information being greater than or equal to B ^n_1); and

(v) decrementing the current state n and determining whether all states have been evaluated in response to the copied traceback information is not greater than or equal to B^(n_1); and

(vi) returning to step (iii) in response to all states not having yet been evaluated.

14. The method of claim 13, wherein B is equal to ten.

15. The method of claim 13, wherein B is equal to a power of two.

16. A method of updating traceback information stored as a traceback array of dwell counts, comprising the steps of:

(i) determining whether all frames have been evaluated;

(ii) setting a current state n equal to a total number of states N in response to all frames not being evaluated;

(iii) determining whether all states have been evaluated; (iv) going to a next frame and returning to step (i) in response to all states being evaluated (v) performing a search for a best path into the current state n at frame t in response to all states not being evaluated; and

(vi) updating the traceback array in response to the search for the best path.

17. The method of claim 16, further comprising the steps of: (vii) determining whether the best path is from current state n;

(viii) incrementing a state dwell count memory location L_n[n] corresponding to the current state n, decrementing the current state n, and returning to step (iii) in response to the best path being from the current state n;

(ix) setting the best path as being from a previous state m other than the current state n, setting the state dwell count memory location L_n[n] corresponding to¹ the current state n equal to one, and advancing to a state dwell count memory location L_n[i], corresponding to a state i prior to the current state n, in response to determining in step (vii) that the best path is not from current state n;

(x) determining whether all skipped states have been evaluated; (xi) in response to determining in step (x) that all skipped states have not been evaluated, setting state dwell count memory location L_n[i] equal to zero, decrementing prior state i, and returning to the step (x);

(xii) determining whether all states have been evaluated, in response to determining in step (x) that all skipped states have been evaluated; (xiii) decrementing the current state n and returning to step (iii), in response to determining in step (xii) that all states have not been evaluated; and

(xiv) copying a state dwell count memory location L_m[i], corresponding to the previous state m, into state dwell count memory location L_n[i], decrementing state i, and returning to step (xii), in response to determining in step (xii) that all states have been evaluated.

18. The method of claim 17, further comprising the steps of: determining whether all frames have been evaluated; setting a current frame t equal to a total number of frames T and a current state n equal to a total number of states N in response to determining all frames have been evaluated; setting a counter k, corresponding to the number of frames assigned to state n in a path traced back from state N, equal to a state dwell count memory location L_N[n]; determining whether all state assignments for the current state n have been accounted for; recording a frame assignment, decrementing the current frame t and the counter k, and returning to the step of determining whether all state assignments for the current state n have been accounted for, in response to all state assignments for the current state n not being accounted for; decrementing the current state n in response to all state assignments for the current state n being accounted for; and determining whether all states have been evaluated and returning to the step of setting counter k in response to all states not having been evaluated.

19. The method of claim 16, further comprising the steps of: (vii) setting the best path into state n as being from a state m, wherein m is less than or equal to n; and

(viii) setting a state dwell count for state n, stored as a base-B numerically encoded value, equal to the sum of a state dwell count location corresponding to state m, and a base-B value B^{(n )}, decrementing the current state n, and returning to step (iii).

20. The method of claim 19, further comprising the steps of:

(ix) setting a current frame t equal to a total number of frames T and a current state n equal to a total number of states N; (x) copying base-B numerically encoded traceback information from a state dwell count location corresponding to the total number of states N; (xi) determining whether the copied traceback information is greater than or equal to B^(n"υ;

(xii) recording a corresponding frame assignment, decrementing the current frame t, decrementing the copied traceback information by the base-B value B^(n_1) corresponding to the current state, and returning to step (xi) in response to the copied traceback information being greater than or equal to B^(n"1};

(xiii) decrementing the current state n and determining whether all states have been evaluatedin response to the copied traceback information not being greater than or equal to B^(n_1); and (xiv) returning to step (xi) in response to all states not having yet been evaluated.

21. The method of claim 20, wherein B is equal to ten.

22. The method of claim 20 wherein B is equal to a power of two.

23. A wireless communication device comprising: a microphone; and a processor coupled to the microphone to receive signals therefrom and responsive thereto to provide voice recognition, the processor generating a traceback array having a plurality of rows and one or more columns, each row of the plurality of rows corresponding to one of a plurality of states in which a traceback path terminates, and each of the one or more columns containing dwell counts for states in the traceback path, and updating the generated traceback array in response to an optimal state transition path into a given state of the plurality of states.

24. The communication device claim 23, wherein the processor: increments a dwell count contained in a first column of a row corresponding to the given state, in response to the optimal state transition path being a self -loop state transition path, copies a row corresponding to a first preceding state prior to the given state into a row corresponding to the given state, and re-sets a dwell count contained in a first column of a row corresponding to the given state equal to one, in response to the optimal state transition path being a single step state transition path, and copies a row corresponding to a state that is n states prior to the given state, into a row corresponding to the given state, resets a dwell count contained in the first column of the row corresponding to the given state equal to one, and resets remaining dwell counts contained in the row corresponding to the given state, that are not included in the copied row, equal to zero, in response to the determined optimal state transition path being an n-1 skip state transition path.

25. The communication device of claim 23, wherein the processor sets a current state n equal to the given state, determines that the optimal state transition path into the current state n is from a state m, where m is less than or equal to n, and sets a state dwell count memory location corresponding to the current state, stored as a base- B numerically encoded value, equal to a sum of a state dwell count memory location corresponding to state m and a base-B value B^{(n )}.

26. The communication device of claim 25, wherein B is equal to ten.

27. The communication device of claim 25, wherein B is equal to a power of two.