EP1018107A1 - Ansteuerungsverfahren für eine wechselstromplasmaanzeigetafel mit initialentladung - Google Patents

Ansteuerungsverfahren für eine wechselstromplasmaanzeigetafel mit initialentladung

Info

Publication number
EP1018107A1
EP1018107A1 EP98945381A EP98945381A EP1018107A1 EP 1018107 A1 EP1018107 A1 EP 1018107A1 EP 98945381 A EP98945381 A EP 98945381A EP 98945381 A EP98945381 A EP 98945381A EP 1018107 A1 EP1018107 A1 EP 1018107A1
Authority
EP
European Patent Office
Prior art keywords
line
display panel
lines
control circuit
preconditioning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP98945381A
Other languages
English (en)
French (fr)
Other versions
EP1018107B1 (de
Inventor
Serge Thomson-CSF Propriété Intellect. SALAVIN
Lionel Thomson-CSF Propriété Intellect. THAVOT
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Technicolor SA
Original Assignee
Thomson Multimedia SA
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Filing date
Publication date
Application filed by Thomson Multimedia SA filed Critical Thomson Multimedia SA
Publication of EP1018107A1 publication Critical patent/EP1018107A1/de
Application granted granted Critical
Publication of EP1018107B1 publication Critical patent/EP1018107B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296Driving circuits for producing the waveforms applied to the driving electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/292Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
    • G09G3/2927Details of initialising
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202Addressing of scan or signal lines
    • G09G2310/0216Interleaved control phases for different scan lines in the same sub-field, e.g. initialization, addressing and sustaining in plasma displays that are not simultaneous for all scan lines
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202Addressing of scan or signal lines
    • G09G2310/0218Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/066Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0238Improving the black level
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/297Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels using opposed discharge type panels

Definitions

  • the present invention relates to a method for controlling an alternative color display panel incorporating ionization.
  • This process is particularly applicable to color plasma panels displaying a large number of half-tones and of large size (more than one meter diagonal) for television application.
  • Plasma panels work on the principle of an electrical discharge in gases. They comprise two insulating slabs each carrying at least one network of electrodes, and delimiting between them a space filled with gas. The tiles are joined to each other by
  • each intersection of electrodes defines a cell to which a gas space corresponds.
  • the ignition of a given cell is achieved by the selection of two crossed electrodes to which we apply, at a given time,
  • the cells are arranged in rows and columns.
  • strips of phosphor materials are deposited, corresponding to the colors green, red and blue
  • a video pixel is made up of a triplet of cells (one red, one green, one blue).
  • the discharges in a plasma display panel are initiated correctly if the gaseous medium in which they occur is ionized.
  • the display panels that are currently being developed for these television applications are so-called "alternative" plasma panels. In these panels, the electrodes carried by the tiles are isolated from the
  • a maintenance signal formed of a succession of slots is permanently applied to all the lines, which has the effect of keeping each cell in the state which has been assigned to it during an addressing phase.
  • the addressing which consists either in switching on or in selectively switching off the cells of the panel is done by set of one or more lines and each line is scanned several times during the display time of an image or image cycle.
  • the gaseous mixture of color panels is generally a mixture of neon and xenon at about 10% xenon. This mixture diffuses ionization poorly.
  • the cells are delimited by barriers which have a role of confinement, that is to say that they are intended on the one hand to prevent the discharges from propagating towards neighboring cells which should not be on and on the other hand to avoid that the ultraviolet radiation created by a discharge in a given cell does not excite the phosphors of neighboring cells and does not cause a lack of color saturation.
  • confinement barriers are not conducive to the diffusion of ionization even if their height is less than the spacing between the two slabs and if they extend along a single network of electrodes.
  • the nature of the dielectric layer in contact with the gas mixture has the particularity of having a high secondary emission coefficient helping the start of the discharge, but this effect is not sufficient to solve this ionization problem.
  • a conditioning cell is generally provided for two useful cells. A section of such a panel is shown in Figure 1. The two tiles have the reference 10a, 10b. Each of them carries a network of useful electrodes 11a, 11b. Each intersection of useful electrodes 11 a, 11 b defines a useful cell 1.
  • Partitions 3 on the one hand separate two neighboring useful cells 1 and on the other have a spacer function to guarantee proper positioning of the slabs 10a, 10b.
  • Each useful cell 1 is adjacent to a conditioning cell 2. It is separated from it by a barrier 4 whose height is partially less than the distance between the two slabs 10a, 10b.
  • a conditioning cell 2 is defined by the intersection of one of the electrodes 11a which also serves to define a useful cell 1 and of a conditioning electrode 5.
  • conditioning discharge 6 which occurs in the conditioning cell 2 and which precedes a useful discharge 7 which occurs in the useful cell 1 on the right.
  • the conditioning discharge 6 is masked from the observer (shown schematically by an eye), because the slab 10b facing the observer carries a black network 8 for shielding the conditioning discharges 6.
  • the conditioning discharge 6 initiates the useful discharge by pre-ionizing the gas mixture contained between the two slabs 10a, 10b.
  • This structure with conditioning cells requires an array of electrodes and additional electronic circuits. It results in higher electrical consumption and the provision of more electrical power.
  • the conditioning discharges being masked from the observer, they do not introduce an annoying light background which reduces the contrast.
  • Another advantage is that the addressing of the conditioning cells is separate from that of the useful cells, which makes it possible not to use the time devoted to the addressing of the useful cells for the addressing of the conditioning cells. It should be borne in mind that the greater the number of lines in the panel, the smaller the time spent processing a line or the greater the number of lines processed at the same time.
  • A1-0 549 275 on behalf of FUJITSU to plan a non-selective ionization phase before each addressing phase. This means that this phase is applied simultaneously to all lines.
  • Figure 2 shows schematically the treatments applied to all the lines of a display panel of this type.
  • This ionization phase consists of various ignitions of all the cells of the panel, alternating ignitions with various extinctions of all the cells of the panel.
  • the ionization phase is shown with hatching, the addressing phase is crossed out and the maintenance phase is dotted.
  • these ionization phases create a relatively large light background on the screen, the contrast between cells on and cells off being of the order of 100.
  • the present invention provides a method for controlling an alternative color display panel with a preionization phase compatible with interlaced scans, this method aiming to minimize the light background and to avoid a reduction in the time allocated for addressing.
  • the present invention relates to a method for controlling an alternative color display panel comprising cells arranged in rows and columns, the rows forming at least two sets, these cells having two states, one registered and the other off. . It includes at least the following steps:
  • an addressing consisting of a semi-selective operation followed by a selective operation, characterized in that after at least one semi-selective operation relating to the first set, it consists in carrying out a preconditioning inscription of the cells of at least one line belonging to the second set of lines, whatever the state of the cells of this line, this preconditioning entry taking place outside of an addressing time of the second set and outside of the selective operation which follows the selective operation relating to the first set.
  • the maintenance signal comprises stages connected by fronts serving as a transition.
  • the preconditioning registration is carried out by a pulse superimposed on a level, just after a transition, at a time when a maintenance discharge would occur at cells registered on this line in the absence of preconditioning registration.
  • the time is not critical, it is of course possible to place the preconditioning pulse at another location on the bearing.
  • this preconditioning inscription is arranged so that it occurs as close as possible to an erasing operation applied to the second set. It is however preferable that the preconditioning registration takes place at least one maintenance cycle before this erasing operation so as not to disturb its effects.
  • each set is subjected to several successive treatments, a treatment consisting of addressing followed by at least one maintenance cycle, each treatment being associated with a control bit whose weight is representative of the duration of treatment.
  • the inscribed line of the second set changes according to the processing bit of the first set. This change can be made within the same second set of lines, for example by permutation within the lines of the second set.
  • This change can also be made within several sets of lines.
  • signals keep permanently lit at least one additional line of the display panel. , located on an edge. This line is hidden from an observer and is used only for this function.
  • the present invention also relates to a display panel implementing the method described above.
  • a display panel comprises at least one network of row or line electrodes with at least one network of column or column electrodes, a row management device and a column management device delivering signals to the rows and columns respectively, the line management device comprising at least one maintenance generator delivering maintenance signals to all the lines by means of one or more line control circuits, each line being connected to a line control circuit output , characterized in that it also comprises an addressing circuit delivering to the lines, via an output to be activated from one of the destination line control circuits, after validation of the destination line control circuit, signals which are superimposed on the signals maintenance, these signals being of three types: erasure, registration, registration of preconditioning.
  • the addressing circuit can include:
  • second means for sequentially transmitting, at the same chosen instant, a signal of the same type accompanied by the identification of said one or more outputs to be activated towards said one or more outputs to be activated from all the destination line control circuits having one or more such exits.
  • a line control circuit will then validate the transmission of a signal received from the second sequential transmission means to the line corresponding to the output to be activated, when it has received at the same instant a signal of the same type from the first transmission means. sequential.
  • the addressing circuit can comprise:
  • a line control circuit will validate the transmission of a signal received on one of its outputs, to the corresponding line, at the chosen time when it will receive a signal of the same type from the sequential transmission means.
  • FIG. 3a a timing diagram showing the times of addressing a few lines of an alternative display panel conventionally controlled with interlaced scans
  • FIG. 4 a timing diagram showing the processing of a few lines of a display panel controlled by the method according to the invention
  • FIG. 3a represents a timing diagram showing the times for addressing the lines of an alternative color display panel conventionally controlled with interlaced scans and capable of being controlled by the method according to the invention.
  • a maintenance signal is formed on the lines, formed by a succession of EN maintenance cycles in time slots. It has the effect of maintaining each cell in the state which has been assigned to it during an addressing.
  • the addressing is done set of lines by set of lines.
  • a set has one or more lines, if the panel is large each set preferably has several.
  • each set E1, E2, E3 has four lines Y1-Y4,
  • Addressing consists in modifying the voltage across the terminals of the cells in order to erase or write them down. It involves a semi-operation Selective consisting for example in extinguishing all the cells of a set followed by a selective operation consisting for example in registering only those which have to be registered.
  • the selective operation makes it possible to differentiate the different cells of a line so as to act only on some of them.
  • the erasure is semi-selective and the inscription selective. It is also possible that the deletion is selective and the registration semi-selective.
  • the operation of erasing the lines Y1 -Y4 of a set E1 consists in superimposing a pulse IE on the maintenance slots EN that this set E1 receives.
  • the operation of registering certain cells of a line Y2 consists of superimposing an impulse II2 on the maintenance slots EN that this line Y2 receives but also to apply on the columns corresponding to the cells of the line which must not be registered , pulses and nothing on the columns corresponding to the cells to be entered. We can then differentiate the different cells of the line.
  • a pulse IM2 on a column X1 masks the voltage pulse II2, applied to line Y2 for the cell located at the intersection of line Y2 and column X1 and the cell remains off.
  • a maintenance cycle EN in a niche has a relatively short low level pb followed by a longer high level ph.
  • a transition f separates two successive high and low levels.
  • the erase pulse IE takes place during a low plateau pb; it is unique for all the lines Y1, Y2, Y3, Y4 of the set addressed. On the other hand, during the next high ph level, several pulses
  • pulses aimed at registration combine with those received in synchronism by the columns. It is assumed in the example in FIG. 3a that only the cell located at the intersection of row Y1 and column X1 will be entered. Those located at the intersection of column X1 and lines Y2 to Y12 will be extinct, they receive pulses IM2 to IM12 at column X1 in synchronism with pulses II2 to 1112.
  • a free time interval t there is provided between the start of the high plateau ph and the first pulse 111 aimed at writing, a free time interval t. During this free time interval t no addressing is done. The duration of this free time interval t corresponds approximately to that of an impulse aimed at registration. This free time t represents the time necessary for the establishment of the maintenance discharges of the cells registered in the panel belonging to a set other than that addressed. Maintenance discharges occur at the end of a transition f leading to an extreme high ph or low pb plateau.
  • FIG. 3b schematically shows on a timing diagram the known principle of interlaced scans used for obtaining halftone.
  • each treatment starting with addressing is associated with a control bit whose weight is representative of the duration of ignition of the cells lit by this addressing.
  • 3 bits BO, B1, B2 are used.
  • the addressing operations have been represented as punctual without separating the erasure of the inscription.
  • the addressing time of a cell is the same for all the bits regardless of their weight, what changes is the duration of the processing, ie the duration of holding the cell on or off. So the treatment by bit BO lasts 177, processing by bit B1 lasts 2117 and processing by bit B2 lasts 4T / 7. Recall that T represents the duration of an image cycle.
  • a sequencing algorithm makes it possible to address all the lines 3 times, respecting the weight of the bit concerned between two successive addresses of the same line.
  • the same time interval ⁇ separates two successive addresses of two sets of lines processed by the same bit, whatever the weight of the bit.
  • tad be the time interval separating two successive addresses of two sets of lines by different bits
  • ntad with n equal to the number of bits used for halftones.
  • FIG. 4 shows, in the same way as in FIG. 3a, the processing of several lines by the method according to the invention.
  • a set E1, E2, E3, ... Em of lines has two lines and the four sets E1, E2, E3, ... Em shown correspond to eight lines Y1 to Y6, Yn-1, Yn.
  • a pre-conditioning entry IP of the cells of at least one line Y3 of the second set E2 is re-performed, whatever the state of the cells of the line Y3.
  • This IP preconditioning registration takes place outside of an addressing time of the second set and outside of the selective operation which follows the semi-selective operation of the first set E1.
  • This IP preconditioning registration achieves ionization of the panel and improves the response time of the cells of the panel during registration or an interview.
  • the preconditioning registration IP of the line Y3 takes place during the processing relating to the bit B1 of the first set E1.
  • the second set E2 is close to the first and it is processed just after the first E1 for the same bit B1 which means that the time range ⁇ 'during which the preconditioning registration IP can have is the same whatever the bit weight; which is simple to implement. It is of course possible to enter a line from any other set of lines.
  • the IP preconditioning registration for line Y3 is initialized by a preconditioning pulse which is superimposed on the EN maintenance slots received by this line Y3.
  • the preconditioning pulse bears the reference IP because it is this which is visible in the figure. It is the same for the erasure and registration pulses during the addresses.
  • This IP preconditioning pulse has an appropriate amplitude.
  • this preconditioning pulse IP during a free interval t at the start of the high plateau ph is that which allows safe registration of the entire line without modifying the time allocated for addressing. If the addressing time is not critical, it is possible to locate the pulse at another location in the high ph bearing.
  • IP preconditioning inscription is also found on lines Y4, Y5, Y6 at appropriate times. On line Y5, the IP preconditioning registration takes place at the end of the landing.
  • One of the solutions for reducing the light background is to carry out this preconditioning inscription only for a single halftone bit or a few of them, preferably for those of low weight because the ionization defects are more present. on cells processed by bits affected by these weights. Under these conditions, the duration of ignition of the line contributing to ionization is reduced since the duration of preconditioning ignition is directly proportional to the number of bits affected by preconditioning. In FIG. 4, no preconditioning registration is carried out during the processing relating to bit B3 of the set E1 of lines.
  • Another solution to reduce the light background is to start preconditioning registration as late as possible.
  • One way of minimizing the number of maintenance cycles between the preconditioning entry and the erasure consists, for example, in adapting the amplitude of the preconditioning pulse by giving it a voltage value different from that of the selective registration impulse.
  • To make the light background provided by the ignition of lines contributing to the ionization more homogeneous it is possible not to, for a given set E1 of lines, always light the same line of the second set E2.
  • the line Y3 which contributes to the ionization while during the processing relating to the bit B2 it is the line Y4.
  • a permutation among the lines Y3, Y4 of the second set E3 can be carried out according to the bit processing the first set E1.
  • an even bit B2 processing the first set E1 of lines can correspond to an even line Y4 of the second set E2 of lines and to an odd bit B1 an odd line Y1.
  • a permutation among all the lines of the second set appreciably improves the homogeneity of the light background obtained.
  • Other choices are possible, the main one being to change the line contributing to the ionization.
  • the line change can also be done within several sets of lines.
  • the same line of a second set contributes to the ionization during all the treatments of a first set, if the first and the second sets are treated successively by the same bit and if the line contributing to the ionization is on for the maximum time, it will stay on for 100 maintenance cycles per image cycle. It will be very bright.
  • the second set of lines has four lines and the lines of this set are permuted, ionization, each of them will only stay on for 6 maintenance cycles per image cycle.
  • the light background will be spread out in the second group
  • the following example shows that the contrast C is good in a display panel controlled by the method according to the invention.
  • the value of the contrast C is equal to:
  • I number of lines of the display panel, b number of bits used for displaying halftone, a number of addresses during an image cycle,
  • Luf represents the luminance of the light background introduced by the lighting of the lines contributing to the ionization and is proportional to: nxbxf / a with: n number of maintenance cycles during which a line contributing to the ionization remains on, f ratio from the number of bits using this ionization aid to the total number of bits.
  • This contrast value is the result of a compromise between the number of lines in the display panel, the number of bits for which the ionization aid applies and the number of maintenance cycles during which the lines contributing to the ionization are on.
  • FIGS. 5a and 5b to which reference is now made illustrate two variants of plasma panels implementing the addressing control method according to the invention.
  • the plasma panel comprises a useful screen 10 formed using a network of row or row electrodes Y1 to Y6 crossed with a second array of column or column electrodes X1 to X6.
  • a plasma panel for television application can have more than 1000 and define more than a million cells.
  • Each line Y1 to Y6 is connected to an output SY1 to SY6 of a line management device 20, and each column X1 to X6 to an output SX1 to SX6 of a column management device 210.
  • the function of the column management device 210 is in particular to apply to the columns X1 to X6 the masking pulses IM2, IM3 ... applied to certain columns during the addressing as shown in FIG. 3a.
  • the line management device 20 comprises one or more line control circuits 22, 23 called 'line drivers' by specialists in the field. Each line control circuit has a certain number of outputs S1, S2, S3, all these outputs forming the outputs of the line management device 20. Each of the line control circuits 22, 23 permanently receives the maintenance signal EN delivered by one or more maintenance generators 21 and this maintenance signal is transmitted simultaneously on all the lines Y1 to Y6 of the display panel.
  • the line management device 20 also comprises, cooperating with the maintenance generator 21, an addressing device 200.
  • This addressing device 200 will transmit erasure signals IE, registration II and registration of IP preconditioning at the right times, on outputs to activate good line control circuits, these signals are superimposed on the maintenance signals EN.
  • the maintenance generator 21 is in itself conventional and is not described.
  • the addressing device 200 operates in parallel mode while in FIG. 5b it operates in serial mode.
  • FIG. 5a also appear, outside the useful screen 10, two additional lines Yc1, Yc2 which are masked from an observer.
  • the panel During the operation of the panel they are permanently on to improve the ionization at the edge of the image as it was mentioned previously. For this purpose, they are connected to an AC device delivering a conditioning signal.
  • the addressing device 200 of FIG. 5a includes a signal generator GS which delivers signals of three types: erasure signals IE, registration signals II, preconditioning registration signals IP to a signal generator GD data.
  • the GD data generator delivers each of the signals it receives accompanied by an identification of a destination line control circuit 22, 23.
  • the signals it delivers bear the references IEC, IIC, IPC. They arrive on a SEQ sequencer controlled by a control device
  • IEC, IIC, IPC signals including the identification of a destination line control circuit transmitted sequentially, each at a selected time, to the control circuit 22, 23 destination line.
  • the GD data generator also delivers to an active output selection device DS, each of the signals which it receives accompanied by an identification of one or more line control circuit outputs to be activated.
  • the signals it delivers are referenced IES, IIS,
  • the erasure signals IE apply simultaneously to several outputs when the addressing is done set of lines by set of lines and each set of lines comprises several lines, while those of registration II and preconditioning IP apply only one outlet.
  • the IES, IIS, IPS signals including the identification of said one or more outputs to be activated arrive in parallel mode to an AIG switch and are routed simultaneously, in packets of three different types, each to said one or more outputs to be activated from the destination line control circuit.
  • the AIG switcher also receives the IEC, IIC, IPC signals including the identification of the destination line control circuit. This packet transmission of three signals of different types saves time.
  • a line control circuit 22, 23 validates the transmission of a signal present on one of its outputs, to the corresponding line Y1 to Y6, at the chosen time when it receives a signal of the same type coming from the sequencer SEQ.
  • the control circuits 22, 23 can also receive from a control circuit 25 additional signals adapted to their needs.
  • the signal generator GS delivering signals of the three types IE, II, IP
  • the data generator GD delivering the signals of the three types including the identification of the destination line control circuit, the signals of the three types including identification of the line control circuit output (s) to be activated.
  • the control circuit 25 and the sequencer SEQ which sequentially transmits, at selected times, the signals including the identification of the destination line control circuit to said destination line control circuit. The difference lies in the differentiation of the output or outputs to be activated from the line control circuits 22, 23.
  • the signals IES, IIS, IPS including the identification of said output or outputs to be activated arrive on a second sequencer SEQ ' ordered in synchronism with the first SEQ sequencer.
  • the second sequencer SEQ 'transmits sequentially, at the same chosen times, signals of the same type as those transmitted by the first sequencer SEQ but including said one or more outputs to be activated towards all the line control circuits 22, 23 having one or such outputs to activate.
  • a line control circuit 22, 23 validates the transmission of a signal received from the second sequencer SEQ 'to the line corresponding to the output to be activated when it has received at the same instant a signal of the same type from the first sequencer SEQ.
  • the signal generator GS can be produced by a counter, the data generator GD and the selection device DS by memories, the equalizers SEQ, SEQ 'by switches three inputs, one output and the switch by a multiplexer.
  • FIGS. 6a, 6b show timing diagrams of the IEC signals
  • IIC, IPC, IES, IIS, IPS arriving on the line control circuits respectively in the parallel mode and in the serial mode with for each figure the signals received on a line.
  • the advantage of parallel mode is that it saves time loading the data into the components, which is particularly desirable when the panel to be controlled has a large number of rows and columns and is used for television applications.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
EP98945381A 1997-09-30 1998-09-25 Wechselstromplasmaanzeigetafel mit initialentladung und ansteuerungsverfahren Expired - Lifetime EP1018107B1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR9712133 1997-09-30
FR9712133A FR2769115B1 (fr) 1997-09-30 1997-09-30 Procede de commande d'un panneau de visualisation alternatif integrant une ionisation
PCT/FR1998/002065 WO1999017269A1 (fr) 1997-09-30 1998-09-25 Procede de commande d'un panneau de visualisation a plasma alternatif integrant une ionisation

Publications (2)

Publication Number Publication Date
EP1018107A1 true EP1018107A1 (de) 2000-07-12
EP1018107B1 EP1018107B1 (de) 2001-08-16

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EP98945381A Expired - Lifetime EP1018107B1 (de) 1997-09-30 1998-09-25 Wechselstromplasmaanzeigetafel mit initialentladung und ansteuerungsverfahren

Country Status (9)

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US (1) US6198227B1 (de)
EP (1) EP1018107B1 (de)
JP (1) JP2001518645A (de)
KR (1) KR20010023525A (de)
CN (1) CN1272196A (de)
DE (1) DE69801372T2 (de)
FR (1) FR2769115B1 (de)
TW (1) TW408295B (de)
WO (1) WO1999017269A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100359547C (zh) 1998-09-04 2008-01-02 松下电器产业株式会社 等离子体显示板驱动方法及离子体显示板装置
FR2795218B1 (fr) * 1999-06-04 2001-08-17 Thomson Plasma Procede d'adressage d'un panneau de visualisation a effet memoire
FR2805918B1 (fr) * 2000-03-06 2002-05-24 Thomson Plasma Procede de commande d'un panneau d'affichage au plasma
CN111239236A (zh) * 2020-01-16 2020-06-05 安徽省东超科技有限公司 一种空气电离显示装置

Family Cites Families (10)

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Publication number Priority date Publication date Assignee Title
US3979638A (en) * 1974-04-15 1976-09-07 Bell Telephone Laboratories, Incorporated Plasma panel with dynamic keep-alive operation
FR2635902B1 (fr) * 1988-08-26 1990-10-12 Thomson Csf Procede de commande tres rapide par adressage semi-selectif et adressage selectif d'un panneau a plasma alternatif a entretien coplanaire
FR2635901B1 (fr) * 1988-08-26 1990-10-12 Thomson Csf Procede de commande ligne par ligne d'un panneau a plasma du type alternatif a entretien coplanaire
FR2635900B1 (fr) * 1988-08-30 1990-10-12 Thomson Csf Panneau a plasma a adressabilite accrue
US5099173A (en) 1990-01-31 1992-03-24 Samsung Electron Devices Co., Ltd. Plasma display panel having an auxiliary anode on the back substrate
FR2657713A1 (en) * 1990-01-31 1991-08-02 Samsung Electronic Devices Plasma visual display screen and method of manufacturing it
EP1231590A3 (de) * 1991-12-20 2003-08-06 Fujitsu Limited Vorrichtung zur Steuerung einer Anzeigetafel
JP3276406B2 (ja) 1992-07-24 2002-04-22 富士通株式会社 プラズマディスプレイの駆動方法
FR2744275B1 (fr) * 1996-01-30 1998-03-06 Thomson Csf Procede de commande d'un panneau de visualisation et dispositif de visualisation utilisant ce procede
JP3704813B2 (ja) * 1996-06-18 2005-10-12 三菱電機株式会社 プラズマディスプレイパネルの駆動方法及びプラズマディスプレイ

Non-Patent Citations (1)

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Title
See references of WO9917269A1 *

Also Published As

Publication number Publication date
DE69801372D1 (de) 2001-09-20
CN1272196A (zh) 2000-11-01
DE69801372T2 (de) 2002-05-29
KR20010023525A (ko) 2001-03-26
US6198227B1 (en) 2001-03-06
WO1999017269A1 (fr) 1999-04-08
FR2769115A1 (fr) 1999-04-02
JP2001518645A (ja) 2001-10-16
FR2769115B1 (fr) 1999-12-03
TW408295B (en) 2000-10-11
EP1018107B1 (de) 2001-08-16

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