EP0923122B1 - Method of manufacturing an integrated circuit using chemical mechanical polishing and fixture for chemical mechanical polishing - Google Patents

Method of manufacturing an integrated circuit using chemical mechanical polishing and fixture for chemical mechanical polishing Download PDF

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Publication number
EP0923122B1
EP0923122B1 EP19980309597 EP98309597A EP0923122B1 EP 0923122 B1 EP0923122 B1 EP 0923122B1 EP 19980309597 EP19980309597 EP 19980309597 EP 98309597 A EP98309597 A EP 98309597A EP 0923122 B1 EP0923122 B1 EP 0923122B1
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EP
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Grant
Patent type
Prior art keywords
ring member
substrate
support
inner
outer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP19980309597
Other languages
German (de)
French (fr)
Other versions
EP0923122A3 (en )
EP0923122A2 (en )
Inventor
Annette Margaret Crevasse
William Graham Easter
John Albert Maze (Iii)
John Thomas Sowell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Nokia of America Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Grant date

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/27Work carriers
    • B24B37/30Work carriers for single side lapping of plane surfaces
    • B24B37/32Retaining rings
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/04Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor

Description

    Field of the Invention
  • The present invention relates generally to chemical mechanical polishing and, more particularly, to chemical mechanical polishing using a carrier fixture.
  • Background of the Invention
  • Chemical-mechanical polishing (CMP) is used extensively in the manufacture of semiconductor devices. An exemplary CMP system is shown in U.S. Patent No. 5,081,421 entitled IN SITU MONITORING TECHNIQUE AND APPARATUS FOR CHEMICAL/ MECHANICAL PLANARIZATION ENDPOINT DETECTION, issued to Miller et al. and dated January 14, 1992. Figs. 4 and 5 illustrate a substrate 500 positioned in a carrier fixture 510 for chemical mechanical polishing (CMP). The substrate 500 is, for example, a six inch wafer which is produced having a flat edge 502. The carrier fixture 510 is mounted in a chemical mechanical polisher (not shown). The carrier fixture 510 holds the substrate 500 in opening 515 during the CMP process and allows the substrate 500 to rotate. The carrier fixture 510 includes transport channels 520 that allow a slurry to be channelled from the exterior of the carrier fixture 510 to the opening 515 where the substrate 500 is disposed during the CMP process. In other words, the transport channels 520 are openings from the exterior of the carrier fixture 510 to the opening 515. During the CMP process using the carrier fixture 510, the substrate 500 may be damaged and, therefore, must be discarded. Accordingly, it would be advantageous to develop a CMP process that reduces the occurrence of damage to the substrate.
  • JP-A-63283859 discloses a technique for improving the precision of the polished shape of a wafer by constituting a polishing jig by integrally forming a wafer holding jig and a correcting jig for a polisher, thus preventing the eccentric abrasion of the polisher and permitting uniform correction and use for a long time.
  • Summary of the Invention
  • In accordance with the present invention there is provided a method according to claim 1. Still further in accordance with the invention there is provided a carrier fixture according to claim 8.
  • The present invention is directed to a method of manufacturing integrated circuits using a carrier fixture. The carrier fixture does not include transport channels or openings for directing a slurry to a substrate being polished and, as a result, damage to the substrate is reduced because the edges adjacent to the substrate are eliminated. The inventors have determined that the substrate 500 scores the prior art carrier fixture 5 10 and has a tendency to catch the edge 525 of the transport channel 520 during the CMP process. For a 15.2 cm (six inch) substrate 500, the flat edge of the substrate has a tendency to catch the edge 525. As a result, the substrate 500 may cleave or break. The present invention further provides a carrier fixture having an inner support coupled to a ring member that contacts a substrate during the CMP process. The present invention also provides a carrier fixture having inner and outer supports coupled to a ring member.
  • The present invention provides a carrier fixture for a polisher including a ring member. The ring member includes an inner area and an outer area. An outer support is formed on the outer area and a continuous inner support is formed on the inner area. As a result, damage to the substrate is reduced because edges adjacent to the substrate arc eliminated because the inner support is continuous. The inventors have determined that a substrate scores the prior art carrier fixture 510 and has a tendency to catch the edge 525 of the transport channel 520 during the CMP process. For a 15,2 cm (six inch) substrate 500, the flat edge of the substrate has a tendency to catch the edge 525. As a result, the substrate 500 may cleave or break.
  • The present invention also further provides a carrier fixture having an inner support coupled to a ring member that contacts a substrate during the CMP process. The present invention also provides a carrier fixture having inner and outer supports coupled to a ring member. The present invention also provides a carrier fixture that does not include transport channels or openings for directing a slurry to a substrate being polished and, as a result, damage to the substrate is reduced because the edges adjacent to the substrate are eliminated.
  • It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
  • Brief Description of the Drawing
  • The invention is best understood from the following detailed description when read in connection with the accompanying drawing. It is emphasized that, according to common practice in the semiconductor industry, the various features of the drawing are not to scale. On the contrary, the dimensions of the various features are arbitrarily expanded or reduced for clarity. Included in the drawing are the following figures:
    • Fig. 1 is a top view of a carrier fixture according to an exemplary embodiment of the present invention;
    • Fig. 2 is a bottom view of the carrier fixture;
    • Fig. 3 is a perspective view of the carrier fixture;
    • Fig. 4 is a bottom view of a carrier fixture according to the prior art; and
    • Fig. 5 is a schematic diagram of the prior art carrier fixture along line 5-5.
    Detailed Description of the Invention
  • Referring now to the drawing, wherein like reference numerals refer to like elements throughout. Fig. 1 is a carrier fixture 110 used in a polishing system including a polisher (not shown) that is used during the manufacture of integrated circuits. The polisher is for example, an Auriga Planarization System, Auriga-C Planarization System, or a CMP 5, each available from Speedfam of 7406 West Detroit, Chandler, Arizona 85228. The polisher is used to polish a substrate 200, shown in Fig. 2, using, for example, chemical mechanical polishing. During polishing, the substrate 200 is placed in the carrier fixture 110 and polished by applying a slurry and rotating the substrate disposed in the carrier fixture 110. The substrate 200 may be formed from materials such as silicon, germanium, gallium arsenide or other materials known to those skilled in the art. The carrier fixture 110 may be formed from materials such as acetal (known as Deltin™), ceramics, and polyphenyane sulfide.
  • The carrier fixture 110 has openings 115 that receive clips, screws or fasteners (not shown) to attach the carrier fixture 110 to the polisher. As is shown in Figs. 2 and 3, the bottom 112 of carrier fixture 110 includes a ring member 120 that docs not have the above described slurry channels for providing slurry to the substrate 200. It has been found that slurry channels are not necessary for channeling a slurry to the substrate 200 during polishing. A sufficient amount of slurry passes under the inner support 130 to the substrate 200 during polishing.
  • One or more outer supports 125 are formed on the bottom 112 at the outer area or the periphery of the ring member 120. The outer supports 125 stabilize the ring member 120 during the polishing process. The outer supports 125 are spaced along the outer area so that the slurry may be channeled to the area 127 around an inner support 130. Each outer support 125 extends along an arc of θ which is, for example, 30°. Each outer support 125 is separated by an area extending along an arc of φ which is, for example, 30°. The thickness X1 of the outer supports 125 is, for example 6.35 mm (.25 inches). The outer supports 125 and the inner support 130 do not form transport channels as in the prior art. The diameter X4 of the ring member 120 is, for example, 219.08 mm (8.625 inches). The diameter X3 of the opening 140 is, for example 151.77 mm (5.975 inches).
  • The inner support 130 is on an inner area or inner periphery of the ring member 120. The inner support 130 forms a ring around opening 140. The thickness X2 of the inner support 130 can be decreased to increase its flexibility. Increased flexibility is desirable to avoid damage to the substrate 200 when the substrate 200 contacts the inner support 130 during polishing. The thickness X2 is, for example 6.35 mm (.25 inches)
  • The inner support 130 and the outer supports 125 project above the surface of the ring member 120 substantially the same distance Z2. The distance Z2 is, for example 6.35 mm (.25 inches). The height Z1 of the ring member 120 is, for example 11.42 mm (.45 inches).
  • During operation, the substrate 200 is disposed in the carrier fixture 110 in opening 140 for the removal of material formed on the substrate 200 using, for example, chemical mechanical polishing (CMP). Approximately twelve to seventeen percent of the substrate 200 projects beyond the bottom 150 of the inner support 130 during polishing. The material formed on the substrate 200 is, for example, a conductive material, an oxide, silicon, or any other material which may be formed on the substrate 200. A slurry used for polishing a conductive material, which is typically tungsten, comprises an abrasive component and an oxidizer. In an advantageous embodiment, aluminum oxide and ferric nitrate are used as the abrasive and the oxidizer, respectfully, in the slurry. As is known, other slurries may be used to polish other materials such as silicon and oxide.
  • In the CMP process, the conductive material is removed by a combination of physical, i.e. mechanical abrasion, and chemical, i.e., etching, processes. When the slurry and the polisher's pad (not shown) are pressed onto the conductive material, typically at pressures of approximately 6 to 8 psi, the oxidizing component of the slurry oxidizes the conductive material to form a thin layer of metal oxide. This metal oxide is then readily removed with the slurry's abrasive component as the substrate 200 is rotated with respect to the pad. This process is repeated until the material is removed from the substrate 200.
  • When the carrier fixture 110 was used in the polisher to polish tungsten formed on substrates 200, no substrate breakage was observed for 725 substrates each chemical mechanical polished for 210 seconds. In comparison, the prior art carrier fixture 510 caused substrate breakage after polishing 500 wafers for only 40 seconds each. In other words, the carrier fixture was used to successfully polish 42% more wafers for an increased duration of 425% as compared to the prior art carrier fixture.
  • Although the invention has been described with reference to exemplary embodiments, it is not limited to those embodiments. Rather, the appended claims should be construed to include other variants and embodiments of the invention which may be made by those skilled in the art without departing from the scope of the present invention.

Claims (12)

  1. A method of manufacturing an integrated circuit comprising the steps of:
    a) providing a substrate (200); and
    b) placing the substrate (200) in a ring member (120) including an inner support (130) formed on a first surface of the ring member at an inner area of the ring member and an outer support (125) formed on the first surface of the ring member at the outer area of the ring member wherein the inner support is a continuous annular ring and the outer support is a plurality of spaced apart circular segments arranged along the outer area of the ring member.
  2. The method of claim 1 further comprising a step of:
    c) polishing the substrate (200).
  3. The method of claim 1 wherein the inner support (130) and the outer support (125) project above the first surface the same distance.
  4. The method of claim 1 wherein the outer support (125) is separate from the inner support (130).
  5. The method of claim 1 wherein the ring member does not include transport channels or openings for directing slurry to a substrate being polished.
  6. The method of claim 1 wherein the inner support (130) is formed on an inner periphery of the ring member (120).
  7. The method of claim 1 wherein the outer support (125) is formed at the periphery of the ring member (120).
  8. A carrier fixture for a polisher comprising:
    a ring member (120) having a first surface including:
    a) an inner area and an outer area;
    b) an outer support (125) formed on the outer area of the first surface, the outer support (125) including a plurality of spaced apart circular segments arranged along the outer area of the ring member; and
    c) a continuous inner support (130) formed on the inner area of the first surface, wherein the continuous inner support (130) forms an annular ring.
  9. The carrier fixture according to claim 8 wherein the continuous inner support (130) and the outer support (125) project above the first surface the same distance.
  10. The carrier fixture according to claim 8 wherein the inner support (130) is formed on an inner periphery of the ring member (120).
  11. The carrier fixture according to claim 8 wherein the outer support (125) is formed at the periphery of the ring member (120).
  12. The carrier fixture of claim 8 wherein the carrier fixture does not include transport channels or openings for directing slurry to a substrate being polished.
EP19980309597 1997-12-01 1998-11-24 Method of manufacturing an integrated circuit using chemical mechanical polishing and fixture for chemical mechanical polishing Expired - Lifetime EP0923122B1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US08980943 US5951382A (en) 1997-12-01 1997-12-01 Chemical mechanical polishing carrier fixture and system
US982109 1997-12-01
US08982109 US5967885A (en) 1997-12-01 1997-12-01 Method of manufacturing an integrated circuit using chemical mechanical polishing
US980943 1997-12-01

Publications (3)

Publication Number Publication Date
EP0923122A2 true EP0923122A2 (en) 1999-06-16
EP0923122A3 true EP0923122A3 (en) 1999-12-29
EP0923122B1 true EP0923122B1 (en) 2011-09-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP19980309597 Expired - Lifetime EP0923122B1 (en) 1997-12-01 1998-11-24 Method of manufacturing an integrated circuit using chemical mechanical polishing and fixture for chemical mechanical polishing

Country Status (2)

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EP (1) EP0923122B1 (en)
JP (1) JPH11239965A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2085181A1 (en) 2000-07-31 2009-08-05 Ebara Corporation Substrate holding apparatus and substrate polishing apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63283859A (en) * 1987-05-13 1988-11-21 Hitachi Ltd Wafer polishing jig
US5695392A (en) * 1995-08-09 1997-12-09 Speedfam Corporation Polishing device with improved handling of fluid polishing media

Also Published As

Publication number Publication date Type
EP0923122A3 (en) 1999-12-29 application
EP0923122A2 (en) 1999-06-16 application
JPH11239965A (en) 1999-09-07 application

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