EP0907946B1 - Display system and process for supplying a display system with a picture signal - Google Patents

Description

The invention relates to a display system according to the preamble of claim 1 and method according to the preamble of Claim 6.

Display systems are used to display using a Video signal or a television signal such as e.g. NTSC or PAL standard to display images, for example liquid crystal displays (LCD) can be used.

From EP 0 489 757 B1 there is already an integrated circuit executed clock-controllable control unit of a display system known, in which several, identically constructed, integrated Circuits provided for part of the display are arranged with a character generator, the after entering a code from a storage unit output signals reads which are shown on the display.

When displaying images according to a television standard (NTSC, PAL), is used in the display of one to be shown on the display Synchronization after each image line between the display system and the image source, so that a phase shift between the clock frequency of the display system and the frequency of the supplied image signal occurs. This leads to image blur and shadow effects on vertical edges.

The object of the invention is to improve the image quality improve and in particular shadow effects and image blur to reduce.

The object of the invention is achieved by the features of the claim 1 and solved by the features of claim 6. A particularly good image quality is achieved when the supplied Image signal depending on the system frequency of the display system is synchronized.

Further advantageous embodiments of the invention are in the dependent claims specified.

Figur 1 schematisch den Aufbau eins Anzeigesystems und

Figur 2 ein Diagramm mit Signalabläufen.

The invention is illustrated by the figures; show it:

Figure 1 shows schematically the structure of a display system and

Figure 2 is a diagram with signal sequences.

FIG. 1 shows a display system in the form of logical blocks, either from individual building blocks or as an integrated one Circuit and / or implemented in the form of software can be.

Figure 1 shows a display 1, for example as a liquid crystal display, as a vacuum fluorescence display (VFD) or as a matrix of a multitude of light emitting diodes (LED) is formed. The display 1 is with a display control 2 provided with which the individual picture elements of Display 1 can be controlled, the display 1 in lines and Columns is divided according to a television picture. At a liquid crystal display are for example in the form a plurality of thin-film transistors arranged in a matrix, which are made of amorphous silicon and have a column and line control line can be controlled individually. On Color image is generated by using the thin film transistors a red, a blue and a green pixel is controlled in the appropriate intensity, so that the Colors of the red, blue and green pixels together result in the color of an image pixel.

The display control 2 is connected via a control line 23 connected to an image controller 3. Starting from the image controller 3 a clock line 10 is led to a computing unit 4. Furthermore, between the image controller 3 and the Computing unit 4 a first and a second synchronous line 11, 12 arranged and in addition one of the computing unit 4 Selection line 13 led to the image controller 3.

The image controller 3 is still a third and one fourth synchronous line 14, 15 with a video signal source 7 connected, from which a second image line 17 to the image controller 3 is performed.

The image controller 3 is on via a first image line 16 an image generator 5 connected to the from the computing unit 4 a first control line 18 is guided. In addition is the image generator 5 with an image memory 8 via a first data line 6 in connection.

The computing unit 4 is connected to an adjusting device 9, which has control registers, for example. The Image controller 3 is connected via a second control line 32 the display control 2 connected.

The image controller 3 has a timer 26, the one Clock frequency for a sample / hold member 27 specifies the the image signals of the first and second image lines 16, 17 be scanned. The RGB1 signal of the first image line 16 is from the sample / hold member 27 to a selection circuit 28 out. The RGB2 signal of the second image line 17 is via a second scanning line 30 also to the selection circuit 28 out. The selection line 13 of the computing unit 4 is connected to the selection circuit 28. The exit of the Selection circuit 28 is led to the control line 23.

The control unit 4 also has a second control unit 29 in connection, which via data lines with the Image memory 8 and is connected to a data memory 28.

The mode of operation of FIG. 1 is explained in more detail below. The image controller 3 processes image signals, for example as red, blue and green signals of a television standard (PAL, NTSC) are fed. The supplied image signals are synchronized with respect to the image controller 3. For this purpose, a first is via the first synchronous line 11 Synchronization signal VSY1 between the computing unit 4 and the image controller 3 exchanged, the synchronization the page change. This ensures that the image controller 3 and the computing unit 4th simultaneously represent or provide a new image page. Furthermore, the second synchronization line 12 shows a second synchronization signal HSY1 between the computing unit 4 and the image controller 3 exchanged for Synchronization of the line change within an image serves. This ensures that the image controller 3 and the computing unit 4 synchronously from one image line jump to the next image line.

The same synchronization is done between the image controller 3 and the video signal source 7 performed by the third synchronizing line 14 a third synchronization signal VSY2 and a fourth via the fourth synchronization line 15 Synchronous signal HSY2 is exchanged. The third synchronization signal VSY2 ensures that the image controller 3 and the video signal source 7 synchronously an image page change carry out. The fourth synchronization signal HSY2 provides for the image controller 3 and the video signal source 7 perform a line change synchronously within a picture.

In this way, both the first computing unit 4 and also the video signal source 7 with the image controller 3 accordingly a television standard, such as PAL or NTSC, synchronized, either the image controller 3 or the Computing unit 4 or the video source 7 the synchronization clock, that is, the first, the second, the third and the fourth synchronization signal VSY1, HSY1, VSY2, HSY2. Preferably, the first and second, respectively the third and fourth synchronization signals equal: VSY1 = VSY2; HSY1 = HSY2.

The control unit 4 controls the control line 18 Image generator 5 such that the image generator 5 is dependent from the first synchronization signal VSY1, the second Synchronization signal HSY1 and depending on the system clock of the image controller 3 an image signal via the first Image line 16 the sample / hold member 27 of the image controller 3 feeds. The first image line 16 points for the first image signal RGB1 a line for the color red, a line for the color blue and a line for the color green, where the color signals red, blue and green via the image controller 3 and the control unit 2 in a corresponding color corresponding image pixels of the display 1 are implemented.

According to the specified intensities of the color signals Red, blue and green can be any color on the display 1 being represented. The image generator 5 reads accordingly the timing information specified by the control unit 4 for the color signals red, blue, green from the image memory 8 and outputs the color signals according to that from the control unit 4 predetermined timing to the sample / hold member 27th further.

The control unit 4 controls the second control unit 29 which in accordance with the timing specified by the control unit 4 Image data from data memory 28 into image memory 8 transmits.

The video signal source 7 performs according to the synchronization by the third and fourth synchronization signal VSY2, HSY2 the sample / hold member 27 a second image signal RGB2 too, which is a color signal red, a color signal blue and a Color signal includes green. The second image line 17 points accordingly the first picture line 16 three lines for the Color red, blue and green.

The first image signal RGB1 and the second image signal RGB2 scanned by the sample / hold member 27 and via a first image signal line 31 and a second image signal line 30 led to a selection circuit 28, which is dependent from the selection signal supplied via the selection line 13 A either the first image signal RGB1 or the second image signal Passes on RGB2 to the display controller 2.

The image controller 3 outputs the second control line 32 to the display controller 2 the change from an image pixel to next image pixel, the change from one image line to the next Image line and the change from one image page to the next Image page forward. The display control 2 addresses accordingly the control by the image controller 3 the corresponding Image pixel with that supplied by the image controller 3 Image signal (RGB1 or RGB2).

The mode of operation of FIG device and method according to the invention explained in more detail, it being assumed that the first synchronization signal VSY1 and the third synchronization signal VSY2 are the same and as a vertical synchronization signal VSY are designated and that the second synchronization signal HSY1 and the fourth synchronization signal HSY2 are the same and as a horizontal synchronization signal HSY are designated. The vertical and the horizontal Synchronization signal are in this embodiment predefined by the image generator 3.

Figure 2a shows the vertical synchronization signal VSY, the when changing from a high state to a low state specifies a picture page change. Figure 2b shows a horizontal Synchronization signal HSY, which when changing from a high state to a low state a line break pretends.

On the horizontal and vertical synchronization signal are the image controller 3, the image generator 5 and the video signal source 7 synchronized so that the display control at time T1 2 with the presentation of a new image the display 1 begins, the image generator 5 the first image signal RGB1 of a new picture and the video signal source 7 that second image signal RGB2 of a new image to the image controller 3 feeds.

Also at time T1 there is the horizontal synchronization signal HSY by changing from a high state to the beginning of a new line before a low state. The image generator 5 and the video signal source 7 therefore lead to Time T1 the image signal RGB1, RGB2 of the first pixel one new image line to the image controller 3.

This is shown symbolically in FIG. 2c with the line counter ZZ. The line counter ZZ changes at time T1, at which a new picture is started from the count x, the Represents the number of lines of the last image, to the value 1 and indicates the first line of the new image. At the time T4, in which by the horizontal synchronization signal HSY (FIG. 2b) a line break is specified, the line counter ZZ jumps to the value 2.

Figure 2d shows a pixel counter depending on the time axis PZ, which indicates which pixel depending on the time is shown on display 1. The pixel counter PZ jumps from a value y, the number, at time T1 the pixel corresponds to the last line, to a value of 0 because a new line at time T1 and thus a new pixel is controlled. The line counter ZZ and the pixel counter PZ are integrated in the control unit 4.

The drive signal is synchronous with the pixel counter PZ in FIG. 2e RGBA shown with the corresponding Image pixel is controlled by the image controller 3. During the Duration of an image pixel, the control signal RGBA is constant, so that there is a step function for the control signal RGBA results.

The system clock CL of the image controller 3 is shown in FIG. 2f. which has a constant frequency and a square wave signal represents. The length of time between a rising and a falling edge of the system clock CL preferably gives the time duration of an image pixel by the pixel counter PZ is shown. A rising or a falling The edge of the system clock CL indicates the start of a new one Pixels, which is symbolized by arrows that led from the edges of the system clock CL to the pixel counter PZ are. At time T2 there is an arrow from the system clock CL led to the pixel counter PZ, which changes the image pixel 0 for image pixel 1.

Likewise from the next rising edge at the time T3 an arrow from the system clock CL to the pixel counter PZ, which determines the change from image pixel 1 to image pixel 2. The System clock CL is specified by the timer 26 in the image controller 3. The system clock CL thus determines the time behavior of the image pixels within a picture line by the display control 2 firmly.

The system clock CL also specifies the sampling clock with which the first and second image signals RGB1, RGB2 from the sample / hold member 27 can be scanned. In this embodiment the sampling takes place with an increasing or a falling edge of the system clock CL. This is in the Figures 2f and 2g shown in the form of arrows pointing to the first image signal RGB1 are aligned.

The control unit 4 controls depending on the system clock CL the output of the image generator 5 such that a new, first Image signal RGB1 with a predeterminable first phase relationship δϕ1 (time shift) compared to the system clock CL the sample / hold member 27 is given.

Figures 2g, 2h and 2i show an example of a first Image signal RGB1, the color signal red R in in FIG. 2g Figure 2h shows the color signal blue B and in Figure 2i the color signal Green G is shown. The color signals R, G, B are synchronized to each other for a predetermined period of time TF kept constant and then from the image generator 5 to one adjusted new color value from the image memory 8 for the corresponding image pixel is read out, and so too again kept constant for a predetermined period of time TF becomes. This results in the color signals R, B, G each have a step characteristic.

In this embodiment, the color signals are preferred synchronized with each other, but also a temporal Postponing the change in the individual color signals Red, blue, green to each other is possible, but then also the sampling adapted accordingly for the color signals have to be.

The times at which the color signals red, blue and green of the first image signal RGB1 are sampled in this Embodiment by rising or falling edges of the system clock CL determined and in the form of arrows that the color signal red of the first image signal of FIG. 2g are shown.

The phase relationship chosen in this embodiment (Time difference) between the system clock CL and the first Image signal RGB1 consists of a predeterminable first phase shift δϕ1 between the edge change of the system clock and the change of the first output from the image generator 5 Image signal RGB1, the image generator 5 making a change the first image signal for an image pixel to the first image signal for the following image pixel with a specifiable phase shift (Time shift) to the edges of the system clock, preferably with a predeterminable first phase shift δϕ1 (time shift) at the sampling times of the Sample / hold member 27 performs.

Consider the color signal red R of the first image signal RGB1 the phase relationship (time shift) compared to System clock CL, it is clear from Figure 2g and 2f that the Color signal red R at the start time T1 to a new value set for the next image pixel by the image generator 5 and this value is maintained until the end time TE is, then from the image generator 5 back to one new value to be set, which then again for the same period.

The starting time TA at which the first image signal RGB1 is changed is a first definable phase shift δϕ1 (duration) compared to the edge change of the system clock CL shifted. This applies to both the rising as well the falling edge of the system clock CL. Because in this embodiment the system clock specifies the sampling clock applies this phase shift (time shift) also compared the sampling clock with which the sample and hold 27 the first Scans image signal.

Now consider the scanning process of the sample / hold member 27, the scanning takes place with an increasing or a falling edge of the system clock CL, as by the arrows in Figure 2f, 2g is shown by the system clock CL are led to the first image signal RGB1. At the time of sampling TAB samples the sample / hold member 27 the color signal values Red, blue and green of the first image signal RGB1. The sampled value is for the period from time T1 to at time T2 from the image controller 3 and the display control 2 shown on the display 1. The displayed image value the display 1 is divided into image pixels in FIG. 2e shown.

Figures 2k, 2l and 2m show the color signal red R, the Color signal blue B, and the color signal green G of the second Image signal. The color signals R, G, B of the second image signal are in accordance with the color signals of the first image signal temporally synchronized to each other and are for one predetermined time period is kept at a constant value, so that there is a step function for each of the color signals results. The sampling times at which the sample / hold member 27 samples the second image signal are above the color signal Red R, Figure 2k, also shown in the form of arrows.

The selection signal A is shown in Figure 2j and has to at the changeover time TU the value 1 and after the changeover time TU has the value 0, so that before the switchover time TU the first image signal RGB1 on display 1 and after the changeover time TU the second image signal RGB2 on the display 1 is shown. The changeover time TU is from Control unit 4 selected such that the switchover time TU a predeterminable second phase shift δϕ2 (second time period) versus an ascending or a descending Edge of the system clock CL, especially with respect to the sampling clock is moved.

FIG. 2e shows the control signal RGBA with which the control unit 2 controls the display 1. With the numbers 1 or 2 is symbolically the first or that in FIG. 2e second image signal RGB1, RGB2 shown. The numbers 1 or 2 indicate which image signal the switching unit 28 to the Control unit 2 passes on. Up to the switchover time TU becomes the first image signal RGB1 and after the switching time Open the second image signal RGB2 from the control unit 2 the display 1 reproduced. This is in the image pixels of the Pixel counter PZ, which are provided with the numbers 1 to 7, the first image signal RGB1 and in the image pixels that with the Numbers 8 and 9 of the pixel counter PZ are marked that second image signal RGB2 shown.

wobei die Abtastfrequenz f der Steuereinheit 4 vorzugsweise ungleich einem Vielfachen der Frequenz des Zeittaktes CL ist. Ist die Abtastfrequenz f ungleich einem Vielfachen der Frequenz des Zeittaktes CL, so kann die Abtastfrequenz nahezu gleich, aber größer als die Frequenz des Zeittaktes CL gewählt werden und trotzdem ist eine gute Abstimmung der ersten Phasenverschiebung δϕ1 (Zeitverschiebung) über die Steuereinheit 4 gegeben.The vertical synchronization signal VSY has a frequency of 50 to 60 Hz, the horizontal synchronization signal HSY has a frequency range of 14 to 18 kHz, the sampling frequency f of the control unit 4, with which the control unit 4 samples the system clock CL of the image controller 3, is in one Range between 4 and 40 MHz. The control unit 4 samples the clock CL with a frequency f that is greater than the frequency of the clock CL and preferably not equal to a multiple of the frequency of the clock CL. In the given example, the frequency of the clock CL is 3.2 MHz and the sampling frequency f is 40 MHz. The time duration of a pixel represented by the pixel counter PZ in Figure 2d is thus: 1 / CL = 156μ s and the predeterminable by the control unit 4 first phase shift δφ1 between the clock CL and the switching times of the first image signal RGB1 can thus a Multiple of the reciprocal value of the sampling frequency f can be set:

wherein the sampling frequency f of the control unit 4 is preferably not equal to a multiple of the frequency of the clock CL. If the sampling frequency f is not equal to a multiple of the frequency of the clock CL, the sampling frequency can be chosen to be almost the same, but greater than the frequency of the clock CL, and nevertheless the first phase shift δϕ1 (time shift) is well coordinated via the control unit 4.

The first phase shift δϕ1 is preferably within an image line kept constant by the control unit 4. A very good picture quality is achieved when the first Phase shift δϕ1 (first time shift) within one Image is kept constant. It is beneficial Training if when sampling a first image signal always that for the corresponding image pixel from the image memory 8 provided first image signal is sampled in good time, so that always the right image pixel with the right image signal is controlled. In this way, edge shifts and avoided shadow effects.

The control unit 4 is connected to the setting device 9, which, for example, has control registers with which either the first or the second phase shift δϕ1, δϕ2 (first or second time shift) from a user is adjustable taking into account the image quality. By setting the first and / or the second phase shift it is possible to get an optimal synchronization depending on the sharpness of the display 1.

Claims (10)

1. Display system having:

   a display (1),

   a display controller (2),

   a picture controller (3), which operates according to a system clock pulse (CL), the system clock pulse (CL) defining the time response of the picture pixels within a line,

   a picture signal source (4, 5), which is connected to the picture controller (3) and to which the system clock pulse (CL) is passed and which feeds a picture signal (RGB1) to the picture controller (3) in dependence on the system clock pulse (CL), with the result that the picture controller (3) displays the picture signal on the display (1) via the display controller (2) in dependence on the system clock pulse (CL).
2. Display system according to Claim 1, characterized in that the picture controller (3) samples the fed-in picture signal (RGB1) with a sampling clock pulse (27), which depends on the system clock pulse, in that the picture controller (3) displays a corresponding pixel on the display (1) in accordance with the sampled picture signal (RGB1), and in that the picture signal source (4, 5) feeds the picture signal (RGB1) to the picture controller (3) with regard to the sampling clock pulse (27) with a predeterminable phase shift (δϕ1).
3. Display system according to Claim 2, characterized in that the phase shift (δϕ1) is constant for at least one picture line of the display (1).
4. Display system according to Claim 1, characterized in that the picture controller (3) is connected to a second picture signal source (7), which feeds a second picture signal (RGB2) to the picture controller (3), in that a control unit (4) is provided, to which the system clock pulse is passed, in that the control unit (4) feeds to the picture controller (3) a changeover signal (A), which has a predeterminable phase shift (δϕ2) relative to the system clock pulse and defines which picture signal (RGB1, RGB2) is displayed on the display (1) by the picture controller (3).
5. Display system according to Claim 4, characterized in that the picture controller (3) samples the fed-in picture signal (RGB1) with a sampling clock pulse (27), which depends on the system clock pulse, in that the picture controller (3) displays a corresponding pixel on the display (1) in accordance with the sampled picture signal (RGB1), in that the picture signal source (4, 5) feeds the picture signal (RGB1) to the picture controller (3) with regard to the sampling clock pulse (27) with a predeterminable phase shift (δϕ1), and in that the computing unit (4) samples the system clock pulse at a sampling frequency whose reciprocal value is not equal to a multiple of the time period of the system clock pulse, and in that the computing unit (4) specifies the phase shift (δ1) as a multiple of the reciprocal value of the sampling frequency.
6. Method for supplying a display system with a picture signal (RGB1), which is displayed on a display (1) by the display system in dependence on a system clock pulse (CL), the system clock pulse (CL) defining the time response of the picture pixels within a line, and the picture signal (RGB1) being fed to the display system from the picture signal source in dependence on the system clock pulse (CL).
7. Method according to Claim 6, characterized in that the picture signal (RGB1) is specified for at least one picture pixel, in that the picture signal (RGB1) is subsequently specified for at least one second picture pixel, and in that the change of the picture signal from one picture pixel to the next picture pixel is specified in a predeterminable phase relationship (δϕ1) relative to the system clock pulse.
8. Method according to Claim 6, characterized in that a second picture signal (RGB2) and a selection signal (A) are fed to the display system, in that the first or the second picture signal (RGB1, RGB2) is displayed on the display by the display system in dependence on the selection signal (A), in that the selection signal (A) is changed in a predeterminable second phase relationship (δϕ2) relative to the system clock pulse.
9. Method according to Claim 6, characterized in that the picture signal (RGB1) is sampled, in that the sampled value is subsequently displayed, and in that the instant of sampling (27) is specified in dependence on the system clock pulse.
10. Method according to Claim 9, characterized in that the picture signal (RGB1) is specified as a value for at least one first picture pixel, in that the picture signal (RGB1) is subsequently specified as a value for at least one second picture pixel, and in that the picture signal (RGB1) is changed from the value for the first picture pixel to the value for the second picture pixel in a predeterminable phase relationship (δϕ1) relative to the instant of sampling (27).

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