EP0903012A4 - Method and apparatus for performing bandedge equalization - Google Patents

Method and apparatus for performing bandedge equalization

Info

Publication number
EP0903012A4
EP0903012A4 EP97928711A EP97928711A EP0903012A4 EP 0903012 A4 EP0903012 A4 EP 0903012A4 EP 97928711 A EP97928711 A EP 97928711A EP 97928711 A EP97928711 A EP 97928711A EP 0903012 A4 EP0903012 A4 EP 0903012A4
Authority
EP
European Patent Office
Prior art keywords
bandedge
equalization
performing bandedge
bandedge equalization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97928711A
Other languages
German (de)
French (fr)
Other versions
EP0903012A1 (en
Inventor
Christopher H Strolle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Sarnoff Corp
Original Assignee
Sharp Corp
Sarnoff Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp, Sarnoff Corp filed Critical Sharp Corp
Publication of EP0903012A1 publication Critical patent/EP0903012A1/en
Publication of EP0903012A4 publication Critical patent/EP0903012A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/30—Time-delay networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0087—Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H04L7/0278—Band edge detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
EP97928711A 1996-06-07 1997-06-05 Method and apparatus for performing bandedge equalization Withdrawn EP0903012A4 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US1930896P 1996-06-07 1996-06-07
US19308P 1996-06-07
PCT/US1997/009200 WO1997047084A1 (en) 1996-06-07 1997-06-05 Method and apparatus for performing bandedge equalization

Publications (2)

Publication Number Publication Date
EP0903012A1 EP0903012A1 (en) 1999-03-24
EP0903012A4 true EP0903012A4 (en) 2001-11-14

Family

ID=21792526

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97928711A Withdrawn EP0903012A4 (en) 1996-06-07 1997-06-05 Method and apparatus for performing bandedge equalization

Country Status (4)

Country Link
EP (1) EP0903012A4 (en)
JP (1) JP3601646B2 (en)
KR (1) KR20000016323A (en)
WO (1) WO1997047084A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10985900B1 (en) * 2020-03-03 2021-04-20 Ciena Corporation Estimating clock phase error based on channel conditions

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1181817A (en) * 1982-04-28 1985-01-29 John D. Mcnicol Intermediate frequency slope compensation control arrangements
US4831637A (en) * 1984-06-19 1989-05-16 American Telephone And Telegraph Company Apparatus and technique for timing jitter cancellation in a data receiver
US5065410A (en) * 1987-12-15 1991-11-12 Nec Corporation Method and arrangement for setting an amplitude equalization characteristic on an equalizer for use in a modem
US5588025A (en) * 1995-03-15 1996-12-24 David Sarnoff Research Center, Inc. Single oscillator compressed digital information receiver

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
No further relevant documents disclosed *
See also references of WO9747084A1 *

Also Published As

Publication number Publication date
JP3601646B2 (en) 2004-12-15
JPH10145269A (en) 1998-05-29
EP0903012A1 (en) 1999-03-24
KR20000016323A (en) 2000-03-25
WO1997047084A1 (en) 1997-12-11

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Legal Events

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Effective date: 20060926