EP0685030A1

EP0685030A1 - Internal combustion engine fuel injector control system

Info

Publication number: EP0685030A1
Application number: EP94931032A
Authority: EP
Inventors: Paolo Tubetti; Riccardo Groppo; Giorgio Bortignon
Original assignee: Robert Bosch GmbH
Current assignee: Robert Bosch GmbH
Priority date: 1993-11-19
Filing date: 1994-10-31
Publication date: 1995-12-06
Anticipated expiration: 2014-10-31
Also published as: ITTO930870A1; WO1995014162A1; EP0685030B1; DE69413206D1; DE69413206T2; IT1261360B; ITTO930870A0

Abstract

A system (1) presenting a number of actuator circuits, each including a capacitor (C1), and a first controlled switch (SWi) interposed between the coil of an injector (Li) and a reference line, for permitting supply of the injector (Li) by the capacitor. A second controlled switch (SWR) is interposed between a capacitor line and an injector supply line (104). The system (1) also presents an electronic control unit (12) for controlling switching of the first (SWi) and second (SWR) switches, so as to supply the injectors with current presenting a high-amplitude portion with a rapid leading edge, a slowly increasing portion, and a portion with an amplitude oscillating about a mid value.

Description

INTERNAL COMBUSTION ENGINE FUEL INJECTOR CONTROL SYSTEM

TECHNICAL FIELD

The present invention relates to a system for controlling the inductive loads of internal" combustion engine fuel supply injectors. BACKGROUND ART As is known, for controlling internal combustion engine injectors, these must be supplied with current the pattern of which generally comprises a rapidly increasing portion, a more slowly increasing portion, a portion oscillating about a mid value, and a rapidly decreasing portion.

Currently used circuits for obtaining the above pattern substantially comprise a low-voltage supply source, and a capacitor for storing the energy required for producing a rapid current pulse in the inductive load of the injector.

For this purpose, the capacitor is charged by the supply source to a given voltage value, and is then connected by a first electronic switch to the injector to form a resonant circuit and transfer energy from the capacitor to the injector which thus receives the initial current pulse required for opening it.

Such circuits also comprise a second electronic switch.

Known circuits are connected to an electronic control unit for activating the first and second switch for predetermined time intervals and so supplying the injector with current presenting the aforementioned pattern.

DISCLOSURE OF INVENTION

It is an object of the present ^" invention to provide a system for flexibly calculating the closing/opening times of the first and second switch so that said times are correlated with the pattern of a number of circuit quantities and with a number of injector parameters.

According to the present invention, there is provided a system as claimed in Claim 1. BRIEF DESCRIPTION OF DRAWINGS

The present invention will be described with reference to the accompanying drawings, in which:

Figure 1 shows a system for controlling the inductive loads of internal combustion engine fuel supply injectors;

Figure 2 shows a simplified electric diagram of a circuit forming part of the electronic system according to the present invention; Figure 3 shows time graphs of a number of quantities in the Figure 2 system;

Figure 4 shows a detail of the Figure 1 circuit.

BEST MODE FOR CARRYING OUT THE INVENTION Number 1 in Figure 1 indicates an electronic system for controlling the inductive loads of injectors 7 of a known fuel injection system 8 of an internal combustion engine 9, in particular a supercharged diesel engine. System 1 comprises a control circuit 100 for controlling injectors 7 and to which the injectors are connected over respective control lines 10.

System 1 also comprises an electronic control unit 12 supplied with a number of information signals (e.g. engine speed, accelerator position, etc.) from engine 9, and cooperating with control circuit 100.

With reference to Figure 2, circuit 100 comprises two input terminals 102 and 103 for connection to a supply source B consisting of a battery with a low voltage Vbatt.

More specifically, terminal 102 is connected to the anode of a diode D2, the cathode of which is connected to a first common line (actuator line) 104, while terminal 103 is connected directly to a second common line (ground) 105.

Circuit 100 also comprises a number of actuator circuits 106 connected to one another in parallel between lines 104 and 105, and each comprising an actuator LI, a coupling diode Di, a controlled electronic switch SWi (conveniently formed by a power MOSFET transistor), and a common capacitor ci.

More specifically, each actuator Li consists of the coil of a respective injector 7, and presents one terminal connected to line 104, and the other terminal, defining node 107, connected to the anode of diode Dl which connects actuator Li to a third common line (capacitance line) 112. The cathode of each diode Di is connected to a second node 113 in turn connected to capacitance line 112 and to a first terminal of common capacitor Ci which provides for storing energy at a higher voltage than Vbatt. The other terminal of capacitor Ci is connected to ground line 105.

Each switch SWi provides for connecting actuator Li to battery B and for transferring energy from actuator Li to capacitor Ci; is interposed between node 107 and ground 105; and presents a control input 108 connected to control unit 12 by a respective control line 56 over which control unit 12 supplies an actuator selecting signal s..

Circuit 100 also comprises the series connection of an electronic switch SWR (conveniently formed by a power MOSFET transistor) which provides for connecting capacitance line 112 to actuator line 104, and for recirculating the current of load Li.

More specifically, switch SWR presents a first terminal connected to capacitance line 112; a second terminal connected to actuator line 104; and a control terminal connected to a control circuit 114 (described in more detail later on) in turn connected to control unit 12 by a control line 58 over which unit 12 supplies a signal s. for controlling switch SWR.

Finally, capacitance line 112 is connected to control unit 12 over line 59 for permitting control unit 12 to monitor the voltage on line 112. Control unit 12 is also supplied by a line 113a with a signal proportional to voltage Vbatt, and provides for measuring (by means of a measuring circuit not shown) the value of inductance L of actuators Li.

Circuit 100 charges capacitor Ci to an appropriate voltage value, and supplies one of actuators Li with a current Ii the pattern of which presents a high-amplitude portion with a rapid leading edge, followed by a lower-amplitude portion terminating with a rapid trailing edge. The above pattern is achieved by controlling switches SWR and SWi as described below.

With reference to Figure 3, it is assumed to begin with that switches SWR and SWi are open (low logic level of signals s. and s.) , and that capacitor Ci is charged to a predetermined high value V (voltage V_ higher than Vbatt) so that the voltage drop between capacitance line 112 and actuator line 104 is such as to maintain a reverse bias of diode D2, and no current Ii flows in the actuators .

At instant t_Q, switch SWR is closed so that actuator line 104 is brought to the voltage level of capacitance line 112. At instant t., control unit 12 selects the desired actuator Li by switching respective signal s. to high and closing the relative switch SWi.

The selected actuator Li is thus connected between capacitance line 112 and ground 105, in parallel with capacitor Ci with which it forms a resonant circuit.

The selected actuator is therefore supplied with a current pulse formed by a high-frequency sinusoid portion (the value of which is determined by the inductance of actuator Li and the capacitance of capacitor Ci) and produced by rapid discharging of the energy stored in capacitor Ci whose voltage V falls rapidly.

The capacitor continues discharging up to instant t_ at which voltage V_ on line 112 approximately equals voltage Vbatt, so that diode D2 is biased directly and connects battery B to actuator line 104.

After instant t_, the selected actuator Li is supplied by low-voltage battery B and, from this point on, injector Li is supplied with a current proportional to Vbatt/L, where L is the value of the inductance of actuator Li selected by control unit 12.

At this step, diode Di of the selected actuator continues to be reverse biased. The current in the injector therefore increases slowly until, after a time Tbypass from instant t. (instant t_) , it reaches a value Ipeak.

According to the present invention, the closing time Tbypass of switch SWi is calculated by unit 12 using an electronic map Ml which supplies Tbypass as a function of Vbatt/L input values.

More specifically, map Ml supplies Tbypass values increasing alongside an increase in inductance L and alongside a fall in Vbatt.

At instant t_, therefore, switch SWi is opened (high-to-low switching of signal s.).

Consequently, diode Di of the selected actuator is biased directly and acts as a freewheeling diode for discharging the formerly charged actuator Li and recirculating current Ii via capacitance line 112 and switch SWR. At this step, current Ii tends to fall in proportion to -(Vd2)/L - where Vd2 is the voltage drop across diode D2, and L the inductance of selected actuator Li - until it reaches a value Ioffchop at instant t4..

Opening time Tdelay=t.-t of switch SWi is calculated by unit 12 which presents an interpolation unit CI for supplying Tdelay according to the equation: Tdelay=Kl+A*(L-K2) where L is the inductance of selected actuator Li expressed in μH; KI and K2 are two experimental numeric constants; and A is an experimental gain coefficient. At instant t , switch SWi is again closed, so that selected actuator Li is again charged by battery B and disconnected from capacitance line 112 by relative diode Di. In the instants following instant t. , the current

Ii in actuator Li again increases in proportion to Vbatt/L. As of instant t. , the current increases for a time Tonchop until it reaches value Ionchop at instant t₅ at which switch SWi is again opened. According to the present invention, time Tonchop is calculated by unit 12 using an electronic map M2 which supplies Tonchop as a function of 7batt/L input values.

More specifically, map M2 supplies Tonchop values increasing alongside an increase in inductance L of selected actuator Li and alongside a fall in voltage Vbatt.

Opening of switch SWi (instant t₅) again discharges actuator Li for time Toffchop. Time Toffchop is calculated by unit 12 which presents an interpolation unit C2 for supplying Toffchop according to the equation:

Toffchop=K3+B*(L-K4) where L is the inductance of selected actuator Li expressed in μH; K3 and K4 are two experimental numeric constants; and B is an experimental gain coefficient.

As such, switch SWi is appropriately opened and closed successively to maintain a current in selected actuator Li oscillating about a predetermined medium-low value.

Switches SWR and SWi are opened successively for rapidly discharging actuator Li. More specifically, at instant t,b, switch SWi is opened with switch SWR open. At this step, diode Di is biased directly to connect actuator Li to capacitance line 112 and again form a resonant circuit, so that actuator Li discharges rapidly into capacitor Ci, current Ii decreases in the form of a high-frequency sinusoid portion, and the energy formerly accumulated by actuator Li is transferred to capacitor Ci -whose voltage increases rapidly.

This step continues until all the current in actuator Li is discharged, and which corresponds to a first charge of capacitor Ci to voltage V , at which point diode Di is disabled to prevent a sign inversion of the current in the actuator (instant t_) .

Subsequently, being isolated from the rest of the circuit, capacitor Ci remains charged to voltage value

As shown in Figure 3, at instant t_g, control unit

12 again closes one or more switches SWi for time Tonric, so as to again close the circuit including battery B and each actuator Li with a closed switch SWi. As such, each actuator Li is supplied with increasing current and, in this step, capacitor Ci remains isolated. At instant t , switch SWi (or all the switches closed previously) is again opened so that, for time Toffric, as in interval t--t_, energy is transferred from the actuator to capacitor CI, current Ii in actuator Li falls to zero (instant t ) , and the voltage of capacitance line 112 increases.

By repeating the above two steps n times, it is therefore possible to gradually charge the capacitor to the desired V level by first charging actuators Li simultaneously to such a value as not to activate them (and so open the injectors) , and then discharging the actuator current into the capacitor.

According to the present invention, recharge time Tonric (t -t_g) is calculated by unit 12 using an electronic map M3 for supplying Tonric as a function of Vbatt/L input values.

More specifically map M3 supplies Tonric values increasing alongside an increase in inductance L and alongside a fall in Vbatt. Control unit 12 also presents an electronic map C3 for supplying time Toffric.

Unit 12 also supplies the n number of recharge steps as a function of voltage V_ of capacitor Ci at the end of the injection cycle. The n number is calculated by unit 12 using an electronic map M4 for supplying n as a function of an input V_? value.

Figure 4 shows a detail of control circuit 114 supervising switches of MOSFET SWR.

In particular. Figure 4 shows details of the MOSFET source and drain terminals connected respectively to line 112 and node 113. Circuit 114 comprises a first capacitor CI with a first terminal connected to line 112, and a second terminal connected to the cathode of a diode Dr, the anode of which is connected to node 113.

Circuit 114 comprises a second capacitor C2 connected parallel to a Zener diode Dz and presenting a first terminal connected to line 112, and a second terminal connected to the cathode of diode Dr via a resistor R.

Circuit 114 also comprises a first electronic switch SWB (conveniently formed by an optoisolator) located between line 112 and a control terminal (GATE) 115 of MOSFET SWR; and a second electronic switch SWA (conveniently formed by an optoisolator) interposed between control terminal 115 and the node 116 common to diode Dz, capacitor C2 and resistor R.

Switches SWA and SWB are controlled in complementary manner by the logic signal from control unit 12, i.e. one is always on while the other is off.

In actual use, when charging capacitor Ci as described previously, the magnetic energy accumulated by the injectors is transferred to capacitors Ci and CI which are charged as a function of the respective capacitance values. More specifically, as the ratio of the capacitance values of capacitors CI and Ci is less than 1, capacitor CI is charged to a voltage VI lower than that at the terminals of capacitor Ci, so that diode Dr is disabled, and capacitor CI is isolated from capacitor Ci and acts as a constant voltage source with one terminal connected to the source terminal of MOSFET SWR.

Moreover, capacitor C2 is charged to a voltage Vz which is determined by Zener diode Dz, is lower than the charge voltage VI of capacitor CI, and is higher than the threshold voltage Vgsth required for closing MOSFET

SWR.

For disabling MOSFET SWR, switch SWA is opened and switch SWB closed, so that voltage Vgs between control terminal 115 and the source terminal of MOSFET SWR equals zero, thus disabling the MOSFET.

For closing MOSFET SWR, switch SWB is opened and switch SWA closed, so that voltage Vz at the terminals of capacitor C2 is applied between control terminal (GATE) 115 and the source terminal of the MOSFET which thus closes. During this step, the current supplied to

MOSFET SWR is limited by resistance R, while Zener diode

Dz protects GATE 115 of the MOSFET against overvoltage.

As the switching times of MOSFET SWR are not negligible, switches SWA and SWB are activated in advance with respect to the start and end of injection.

Circuit 114 therefore provides for obvious advantages by supplying MOSFET SWR at all times with sufficient voltage for rapidly closing it, and by drawing no energy from capacitor Ci for biasing optoisolators SWA and SWB.

Moreover, circuit 114 is extremely straightforward and reliable.

The system according to the present invention therefore provides for flexibly calculating, for each selected actuator Li, the control times of first and second switches SWi, SWR, by virtue of said times being correlated to the inductance L of the selected actuator Li and to the voltage Vbatt of battery B.

As such, the current supplied to each- injector 7 is regulated as a function of the inductance L of the injector coil. Since the coils of injectors 7 of system 8 invariably present differing inductance values L (due to manufacturing tolerances) , each injector 7 is therefore automatically supplied with the most appropriate current value.

More specifically, an increase in inductance L makes it increasingly difficult (for known physical reasons) to inject current into actuator Li, so that time Tbypass is automatically increased to permit the current supplied to the injector to reach the predetermined Ipeak value. Similarly, a fall in battery voltage Vbatt reduces the current gradient in interval t_-t , so that time Tbypass is again increased to permit the current supplied to the injector to reach the predetermined Ipeak value.

Clearly, changes may be made to the system as described and illustrated herein without, however, departing from the scope of the present invention. For example, the number of circuits 106 depends on the number of actuators Li and may vary as required.

Claims

1) A system for controlling the inductive loads of injectors, comprising: a control circuit (100) with a first and second input terminal (102, 103) connectable to a low-voltage supply source (Vbatt) ; an energy storing circuit (106) connected between said input terminals and including a capacitive element (Ci) and at least one inductive load (Li) of an injector; a first controlled switching element (SWi) interposed between said inductive load (Li) and a reference line (105) , for selectively supplying said inductive load (Li) ; a second controlled switching element (SWR) for rapidly discharging said capacitive element into said inductive load; and a control unit (12) generating control signals (s., s.) for said first and second switching elements (SWi, SWR); characterized in that said control unit comprises computing means (Ml, CI, M2, C2) for processing, on the basis of input information signals (Vbatt/L) , the duration of control time intervals (Tbypass, Tdelay, Tonchop, Toffchop) of at least one of said switching elements (SWi, SWR) for supplying said load with a current (Ii) presenting a high-amplitude portion with a rapid leading edge, a slowly increasing portion, and an oscillating-amplitude portion wherein said current is maintained about a sensibly constant mid value.

2) A system as claimed in Claim 1, characterized in that said control unit comprises: first computing means (Ml) for processing a first time (Tbypass) wherein said first switching element (SWi) is maintained closed while said second switching element (SWR) is closed and said capacitive element (Ci) is charged, for rapidly discharging said capacitive element into said load (Li) ; second computing means (CI) for processing a second time (Tdelay) wherein said first switching element (SWi) is maintained open while said second switching element (SWR) is closed, for discharging said load (Li) ; and third and fourth computing means (M2, C2) for processing respective third and fourth times (Tonchop, Toffchop) wherein said first switching element (SWi) is alternately closed/opened with said second switching element (SWR) closed, for generating small current pulses in said load with no energy transfer between said load and said capacitive element.

3) A system as claimed in Claim 1 or 2, characterized in that said control unit comprises fifth and sixth computing means (M3, C3) for processing respective fifth and sixth times (Tonric, Toffric) wherein said first switching element (SWi) is alternately closed/opened with said second switching element (SWR) open, for generating small current pulses in said load and subsequently transferring energy from said load to said capacitive element. 4) A system as claimed in Claim 2 and 3, characterized in that said first (Ml) , third (M2) and fifth (M3) computing means comprise electronic maps (Ml, M2, M3) supplied with said information signals (Vbatt/L) and in turn supplying said respective first, third and fifth times (Tbypass, Tonchop, Tonric) .

5) A system as claimed in Claim 4, characterized in that said information signals comprise- the value of the inductance (L) of the coil of said injector, and the value of the voltage (Vbatt) of said supply source (B) ; said electronic maps supplying times (Tbypass,

Tonchop, Tonric) increasing alongside an increase in the value of said inductance (L) and alongside a fall in said voltage (Vbatt) of said supply source.

6) A system as claimed in one of the foregoing Claims from 2 to 5, characterized in that said second

(CI) and fourth (C2) computing means determine said second and fourth times (Tdelay, Toffchop) by means of linear combinations of said information signals (Vbatt/L) . 7) A system as claimed in Claim 6, characterized in that said second (CI) and fourth (C2) computing means determine said second and fourth times (Tdelay, Toffchop) by means of linear combinations of the type: Time = coeff.l + A*(L-coeff.2) where L is the value of the inductance of the injector expressed in μH; coeff.l and coeff.2 are two experimental numeric constants; and A is a gain coefficient.

8) A system as claimed in any one of the foregoing Claims, characterized in that said load (Li) is connected by a first terminal (104) to said first input terminal (102) ; said reference line (105) is connected to said second input terminal (103) ; said load (Li) is connected to said first switching element ^"(SWi) by a second terminal defining a first node (107) connected to a second node (113) consisting of a first terminal of said capacitive element (Ci) ; and said second switching element (SWR) is interposed between said second node (113) and said first terminal (104) of said load.

9) A system as claimed in Claim 8, characterized in that said capacitive element (Ci) presents a second terminal connected to said reference line (105) . 10) A system as claimed in Claim 8 or 9, characterized in that said first and second nodes (107, 113) are connected to each other by a first unipolar switch (Di) permitting current flow from said load (Li) to said capacitive element (Ci) ; and, between said first input terminal (102) and said first terminal (104) of said load (Li) , there is provided a second unipolar switch (D2) permitting current flow from said first input terminal to said load. 11) A system as claimed in Claim 10, characterized in that said first and second unipolar switches (Di, D2) consist of a junction diode.

12) A system as claimed in one of the foregoing Claims, characterized in that said first and second switching elements (SWi, SWR) each present a control terminal (108) connected to said control unit (12) .

13) A system as claimed in one of the foregoing Claims, wherein said second switching element comprises an electronic semiconductor switch (SWR) , in particular a MOSFET transistor; characterized in that it comprises control means (114) for controlling said- electronic switch (SWR) and interposed between a control terminal (115) of the electronic switch and said control unit (12); said control means (114) comprising energy storing means (CI, C2) ; and unipolar switching means (Dr) interposed between said energy storing means (CI, C2) and said capacitive element (Ci) , for permitting energy flow to said energy storing means (CI, C2) when charging said capacitive element (Ci) ; said control means also comprising first switching means (SWA) controlled by said control unit (12) and interposed between said energy storing means (CI, C2) and said control terminal (115) of said electronic switch (SWR) ; said first switching means (SWA) being movable between a first open position, and a closed position wherein they supply said electronic semiconductor switch with the energy required for switching it.

14) A system as claimed in Claim 13, characterized in that it comprises second switching means (SWB) interposed between said control terminal (115) and a terminal (source) of said electronic switch; said second switching means (SWB) being activated by said control unit (12) in a complementary manner with respect to said first switching means (SWA) . 15) A system as claimed in Claim 14, characterized in that said energy storing means comprise at least one capacitor (C2) , and means for limiting -the charge voltage of said capacitor (C2) .

16) An electronic system for controlling the inductive loads of internal combustion engine fuel supply injectors, substantially as described and illustrated herein with reference to the accompanying drawings.