EP0664497A1 - Signal pour la transmission d'informations, particulièrement, l'information de temps à travers deux fils dans une installation d'horloges - Google Patents

Signal pour la transmission d'informations, particulièrement, l'information de temps à travers deux fils dans une installation d'horloges Download PDF

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Publication number
EP0664497A1
EP0664497A1 EP94810041A EP94810041A EP0664497A1 EP 0664497 A1 EP0664497 A1 EP 0664497A1 EP 94810041 A EP94810041 A EP 94810041A EP 94810041 A EP94810041 A EP 94810041A EP 0664497 A1 EP0664497 A1 EP 0664497A1
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EP
European Patent Office
Prior art keywords
frequency
voltage
modulated
wave
signal
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP94810041A
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German (de)
English (en)
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EP0664497B1 (fr
Inventor
Moser Urs
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UHRENFABRIK W MOSER-BAER AG
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UHRENFABRIK W MOSER-BAER AG
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Priority to EP94810041A priority Critical patent/EP0664497B1/fr
Priority to AT94810041T priority patent/ATE166732T1/de
Priority to DE59406084T priority patent/DE59406084D1/de
Publication of EP0664497A1 publication Critical patent/EP0664497A1/fr
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Publication of EP0664497B1 publication Critical patent/EP0664497B1/fr
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G9/00—Visual time or date indication means
    • G04G9/0005—Transmission of control signals
    • G04G9/0011—Transmission of control signals using coded signals

Definitions

  • the present invention relates to a signal for transmitting information, in particular time information, about a two-wire line in a clock system with at least one master clock from which the two-wire line originates and with at least one terminal connected to the two-wire line, in particular a slave clock, the master clock generating a device and sending the signal, and the terminal is assigned a device for receiving and decoding the signal.
  • clock systems with a master clock and a plurality of slave clocks connected along a two-wire line originating from the master clock are operated in such a way that minute pulses of alternately positive and negative polarity are emitted to the two-wire line from the master clock.
  • Each slave clock, which is connected to the two-wire line contains a stepper motor that is switched forward with the above-mentioned time pulses. The minute hand then jumps one minute at a time.
  • the advantage of such systems is that the slave clocks can be manufactured very easily and inexpensively.
  • the disadvantage of this system is that it is very time-consuming to set all the clocks both during commissioning and after a line break. To do this, all clocks must be manually set to the same time and polarity. For example, in large station systems with many slave clocks, it can easily happen that an entire working day has to be spent on setting up the system.
  • DE-25 25 631 discloses a clock system in which the above-mentioned disadvantage is eliminated in that not only minute pulses are transmitted via the two-wire line to which the slave clocks are connected, but effective time information. A device for receiving and decoding this time information is present in each slave clock. An electronic circuit is provided for this. As a result of that A 50 Hz AC voltage is connected to the two-wire line, which contains time information in the form of phase jumps and which is simultaneously provided for supplying the slave clocks with electrical energy, the installation and setting up of such systems is relatively simple and not very time-consuming.
  • the time information is encoded by a certain sequence of positive and negative phase jumps.
  • the phase jumps are generated either by switching the AC voltage at the zero crossing to its inverted voltage or by suppressing a half-wave in each case.
  • the AC voltage present on the two-wire line receives a DC voltage component through the phase jumps mentioned. This is greater the more phase jumps with the same polarity follow one another. Difficulties arise in particular in the case of long lines, which may contain non-negligible capacitive and / or inductive components, in the transmission of the phase jumps mentioned. For example, it is impossible to install isolating transformers in the two-wire line, since it is known that direct voltage components are not transmitted and the phase jumps are thus distorted. This can result in incorrect reception of the time information in the slave clocks. In order to prevent this as far as possible, the evaluation circuit in the slave clocks is correspondingly complex.
  • the signal with the phase jumps has a high harmonic content. This can lead to high-frequency radiation, which can cause interference from other systems, especially in today's time, when entire building complexes are filled with sensitive electronics.
  • the object of the present invention to provide a signal for transmitting information, in particular time information, over a two-wire line in a clock system, which is such that the aforementioned disadvantages no longer occur.
  • the signal is a frequency-modulated AC voltage and in that the first half-wave of a period of the frequency-modulated AC voltage has a first or a second frequency and each second half-wave of the period of the frequency-modulated AC voltage comprises the other of the two frequencies.
  • This type of modulation in which there are no phase jumps, means that the harmonic content of the signal is correspondingly low and interference radiation from any high-frequency components does not occur.
  • the frequency-modulated AC voltage is advantageously such that the duration of a half-wave of the frequency-modulated AC voltage with the first frequency is greater than half the duration of a period of the unmodulated AC voltage and that the duration of a half-wave of the frequency-modulated AC voltage with the second frequency is less than half the duration a period of the unmodulated AC voltage.
  • the advantage is achieved that the signal has no DC voltage component.
  • the signal can thus be transmitted without any distortion over two-wire lines with large capacitive and / or inductive components.
  • Isolating transformers can be installed in the line, which is particularly important when arranging power amplifiers in the two-wire line. In this way it is possible to set up a two-wire network with many stub lines, whereby distances of up to a few 10 km per stub line can be bridged.
  • the signal according to the invention is coded such that a half-wave of the frequency-modulated AC voltage with the first frequency, followed by a half-wave of the frequency-modulated AC voltage with the second frequency, represents one of two binary logic states and that a half-wave of the frequency-modulated AC voltage with the second frequency follows from a half-wave of the frequency-modulated AC voltage with the first frequency to the other of the two binary logic states represents.
  • the advantage is that a logical state "L” or "H”, or "0” or "1" can be transmitted with each half-wave and that, regardless of the sequence of the logical states, there is no distortion of the signal he follows. As described further below, determining a change in the logical state is extremely simple.
  • the frequency deviation of the frequency-modulated AC voltage is expediently chosen to be relatively small. It is at least 0.2% and at most 10%. A frequency deviation of 2% has preferably been selected.
  • the larger the frequency swing the greater the harmonic content of the signal, which increases the interference on other systems. With a very small frequency swing, the effort for evaluating the time information that the signal contains is correspondingly large. The smaller the frequency swing is made, the greater the demands on the transmitter regarding the stability of the signal.
  • the frequency of the AC voltage signal is preferably 50 Hz and the AC voltage signal is also used simultaneously to supply the slave clocks with electrical energy.
  • very large clock systems for example, it is not a problem to generate an AC voltage signal for the transmission of large powers up to several 100 watts. Thanks to the advantage that it has no DC voltage component, the signal according to the invention can be temporarily transformed to a higher voltage and can be transformed down again at the start of a stub line. In this way, line losses can be reduced.
  • the signal according to the invention can be generated in the master clock with very little effort by prescribing amplitude values of one period of the signal for one logical state and amplitude values of one period of the signal for the other logical state in a table of a memory of a computing means in digital form .
  • the computing means determines, depending on whether a logic state "H” or "L" is to be output, the corresponding table that must be read out in order to generate the period of the AC voltage to be transmitted. It is then the digitized amplitude values of one or the other table output to a digital / analog converter.
  • the digitized amplitude values of one of the two tables are read out in succession and fed to the digital / analog converter. After passing through a low-pass filter and an amplifier, the frequency-modulated alternating voltage composed in this way reaches the two-wire line that goes from the master clock.
  • the two tables mentioned can be permanently stored in a non-volatile storage medium.
  • the computing means can comprise a software program which, when the master clock is switched on, first calculates the individual digital values which are to be written into the memory cells for the two tables.
  • a device for receiving and decoding the signal according to the invention is present in each terminal or in each slave clock.
  • the decoding of the frequency-modulated signal can be carried out in a very simple manner with little circuit complexity if the zero crossings of the received AC voltage signal are determined with a comparator.
  • Another means, for example a microprocessor makes it easy to measure and compare the times of two successive zero crossings.
  • the logic state of the coded binary signal transmitted with the frequency-modulated AC voltage signal always changes when two successive zero crossings are determined with the same time interval. This is always the case if either two half-periods follow one another at the first frequency or if two half-periods follow one another at the second frequency.
  • Each end device can contain its own supply voltage source or it can be supplied with electrical energy with the received frequency-modulated AC voltage signal.
  • a rectifier circuit and a voltage regulator are connected to the two-wire line in addition to the comparator mentioned.
  • Time information or other commands for slave clocks and / or other end devices can be encoded therein.
  • a binary diagram which essentially comprises the above-mentioned number of bits, not only the effective time in hours, minutes, seconds and fractions of seconds, but also, for example, the date, the day of the week and / or information as to whether Summer time or winter time, etc., to transmit.
  • control commands can be contained in the binary diagram, which are used to set up the clock system, in that each slave clock is set to a predefined time, for example to zero o'clock, after receiving a corresponding control code.
  • the microprocessor after receiving the control code, calculates the number of control pulses which, based on the currently displayed time (is stored), must be given to the stepper motor of the slave clock in rapid succession in order to set the aforementioned time.
  • slave clocks can be arranged on the two-wire line.
  • the microprocessor contained therein After the microprocessor contained therein has evaluated a specific command which was contained in the binary diagram, it can trigger any switching operation. For example, this can be an acoustic signal or some other process.
  • Reference numbers 1 show a two-wire line that is connected to a device 5 for generating and transmitting the signal of a master clock 2 according to the invention.
  • a terminal 3 and several slave clocks 4 are connected in parallel to the two-wire line.
  • the terminal 3 and each of the slave clocks comprises a device 6 for receiving and decoding the signal according to the invention.
  • the device 6 is only visible in the terminal 3 in FIG. 1.
  • the device 6 comprises a microprocessor which controls a control relay 39 in the terminal 3.
  • This control relay 39 can be switched, for example, if a command code is contained in the signal according to the invention which corresponds, for example, to the code that has been preselected with a selector switch 35. Any operations can be triggered or controlled with the contact (s) of the control relay 39. Accordingly, the microprocessor controls the stepper motors present in the slave clocks 4 by outputting pulses.
  • the reference number 36 shows slave clocks with an analog display without a second hand.
  • the slave clocks 37 have an analog display with a second hand.
  • the reference numeral 38 indicates a slave clock with a digital display.
  • a plurality of two-wire lines would emerge from the master clock in a star shape. These would preferably be coupled to the master clock by means of a transformer.
  • a mesh network with a plurality of two-wire stub lines coupled to transformers and provided with repeaters could also be provided.
  • Reference number 7 indicates the signal according to the invention for transmitting information, in particular time information, via the two-wire line 1. This signal is described in more detail below with reference to FIG. 2.
  • the signal 7 according to the invention is recorded in FIG. 2 as a voltage-time diagram.
  • the ordinate of the diagram corresponds to the voltage of the signal and the abscissa represents a time base.
  • Dashed with 13 is an unmodulated sinusoidal AC voltage, which has a period 10 of time T.
  • the positive half-wave of this unmodulated AC voltage has a peak voltage U and lasts T / 2 of the period 10.
  • the negative half-wave has a peak voltage of -U and also lasts T / 2 of the period 10.
  • the frequency-modulated signal 7 also comprises periods 10 of duration T. Each period has a first, in the case shown positive half-wave 8 and a second, in the case shown negative half-wave 9.
  • the signal 7 is frequency-modulated so that either the duration T 1 of the first half-wave 8 is greater than half the duration T / 2 of the period 10 and then the second half-wave 9 has a duration T 2, which is correspondingly less than the duration T / 2 the period 10, or that the first half-wave 8 has a duration T2 which is less than the duration T / 2 of the period 10 and the second half-wave 9 comprises a duration T1 which is greater than the duration T / 2 of the period 10. Die Sum T1 and T2 of the two half-waves always result in the total duration T of the period 10.
  • first 8 or second half-wave 9 of the signal according to the invention has a duration T1
  • this half-wave is formed by an AC signal with a first frequency 11.
  • this half-wave is from an AC signal with a second Frequency 12 formed.
  • Each period of the signal according to the invention has a half wave which is formed with the first 11 or second frequency 12 and then has a half wave which is formed with the second 12 or first frequency 11.
  • Each period 10 of the signal 7 according to the invention contains a logic state “H” or “L” of a digital signal.
  • first half-wave 8 has, for example, the time T 1 and the second half-wave 9 has the time T 2
  • first half-wave 8 has the time T2 and the second half-wave 9 has the time T1
  • the sequences of the individual periods thus contain a sequence of logic states "H", "L".
  • the peak values of the frequency-modulated AC voltage were all of the same size, for example correspond to the peak voltage values U or - U of the unmodulated AC voltage 13, a DC voltage component would be present in each period 10 of the frequency-modulated AC voltage, which could then always have a negative effect on the transmission of the signal if the signal were not delivered to purely ohmic loads. Since the two-wire line in watch systems is rarely purely ohmic, it has been ensured by adapting the peak values of the individual half-waves that the direct voltage component of each period 10 of the frequency-modulated alternating voltage signal 7 is zero.
  • the half-wave with the duration T1 accordingly has a peak voltage U1 or - U1, which is smaller than the peak value U or - U of a half-wave of the unmodulated AC voltage 13 and the half-wave with the duration T2 has a peak voltage U2 or - U2 , which is greater than the peak value of a half wave of the unmodulated AC voltage 13.
  • a first voltage time area 33 which is formed over the half wave with the time T 1, corresponds to a second voltage time area 34 which is formed over a half wave with the duration T 2. Since no period 10 of the frequency-modulated AC voltage signal according to the invention contains a DC voltage component, the wave train of the signal according to the invention also has no DC voltage component.
  • the reference numeral 14 denotes a storage device in which a first function table 15 and a second function table 16 are contained.
  • Each of the function tables comprises a number of memory locations, in each of which a digital word is stored, which in coded form corresponds to an amplitude value of a voltage train to be formed.
  • amplitude values are stored in approximately 50 to 100 memory locations, with which a period of the signal according to the invention according to FIG. 2 can be formed, in which the first half wave 8 has the duration T 1 and the second half wave 9 has the duration T 2. In the figure, such a period corresponds to a logic state "H".
  • the table is therefore also referred to as an "H" table.
  • amplitude values are stored in an equal number of memory locations, with which a period of the signal according to the invention can be formed, the first half-wave 8 of which has the time T2 and the second half-wave 9 of which has the time T1.
  • a half-wave corresponds to a logic state "L”.
  • This function table is therefore referred to as an "L" table.
  • the device 5 further comprises a read-out means 17, 18, consisting of a computing means 17 and an address counter 18.
  • the computing means activates in accordance with the digital data that are present at a data input 40 an address line 44 indicating the "H” table or an address line 45 indicating the "L” table.
  • the address counter which is advanced by a clock generation means 41 via a clock line 42, the individual memory cells with the digitized amplitude values for the signal period to be generated are successively controlled via an address bus 43 in the memory means 14.
  • the function table values either of the “H” table 15 or the “L” table 16, are output in series via a bus 46 and are fed to a digital / analog converter 19. This produces an analog output signal at its output, which is fed to a low-pass filter and amplifier 47.
  • the filtered and amplified signal is applied as the frequency-modulated alternating voltage signal 7 according to the invention via an output 48 to the two-wire line, not shown in FIG. 3, coming from the device 5.
  • the computing means 17 and the address counter 18 are preferably a microprocessor.
  • FIG. 4 shows a device 6 for receiving and decoding the signal according to the invention. Such a device is present in each terminal 3 and in each slave clock 4.
  • FIG. 4 which is only shown in principle, is described in the following purely as a block diagram, since the components and the interaction of the components to form the individual circuit blocks are known to the person skilled in the art.
  • the two wires 24, 25 of the two-wire line 1 are tapped with a first line 21 and with a second line 22 and fed to a comparator means 20.
  • the two lines 21, 22 each pass through a series resistor R2, R1 to an input of an operational amplifier OP1.
  • Its output 23 changes its logic state whenever there is a zero crossing at which the AC signal tapped on the two-wire line 1 takes place, ie when the two inputs of the operational amplifier OP1 interchange their polarity.
  • An RC element (R3, C1), which is connected in parallel to the inputs, keeps interference voltages away from the operational amplifier OP1.
  • the output 23 of the comparator means 20 is connected to a signal input 53 of a time measuring means 26.
  • the time measuring means is a microprocessor 31 which has a clock oscillator 52 controlled by a quartz Q1. The times between two zero crossings or between two logical changes in the state of the comparator means are measured with the microprocessor to decode the information from the received AC voltage signal. Based on the logical status sequence of the received binary diagram, an output signal 27, for example minute pulses, is fed to a slave clock 32.
  • the microprocessor has a reset input 54 and a watchdog output 55, which input and output are connected to a watchdog circuit 51.
  • This circuit comprises the resistors R4, R5, the capacitors C2, C3, the diodes D1, D2 and the operational amplifier OP2.
  • the watchdog circuit is used to monitor the functioning of the microprocessor 31 and to restart the program running in it if necessary.
  • the microprocessor for the detection of a bit change is evaluated analogously to the following equations: If there is a bit change "H"->"L”, if there is a bit change "L"->"H", where T n is the duration of the half period n and T n - 1 is the duration of the n preceding half period.
  • the device 6 is supplied with electrical energy with a power supply unit 50, which is arranged in a voltage supply module 49 and on the output side supplies the DC voltage required to supply the device, and which is connected on the input side to a local power supply connection.
  • a power supply unit 50 which is arranged in a voltage supply module 49 and on the output side supplies the DC voltage required to supply the device, and which is connected on the input side to a local power supply connection.
  • the device 6 shown in FIG. 5 differs from that in FIG. 4 only in that instead of the voltage supply module 49 there are means 29, 30 for generating a DC voltage from the frequency-modulated AC voltage according to the invention received via the two-wire line 1.
  • the means 29 essentially comprise a bridge rectifier D3, D4, D5, D6 in a grating circuit and a filter capacitor C6.
  • the DC voltage smoothed by the filter capacitor C6 is used to feed the comparator means 20 before the DC voltage is supplied to the means 30, a voltage regulator REG1 and a subsequent further filter capacitor C7.
  • the DC voltage stabilized at the output of the voltage regulator REG1 is used to feed the remaining part of the circuit of the device 6.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Electric Clocks (AREA)
  • Selective Calling Equipment (AREA)
  • Alarm Systems (AREA)
EP94810041A 1994-01-24 1994-01-24 Signal pour la transmission d'informations, particulièrement, l'information de temps à travers deux fils dans une installation d'horloges Expired - Lifetime EP0664497B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP94810041A EP0664497B1 (fr) 1994-01-24 1994-01-24 Signal pour la transmission d'informations, particulièrement, l'information de temps à travers deux fils dans une installation d'horloges
AT94810041T ATE166732T1 (de) 1994-01-24 1994-01-24 Signal zum übertragen von informationen, insbesondere zeitinformationen über eine zweidrahtleitung bei einer uhrenanlage
DE59406084T DE59406084D1 (de) 1994-01-24 1994-01-24 Signal zum Übertragen von Informationen, insbesondere Zeitinformationen über eine Zweidrahtleitung bei einer Uhrenanlage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP94810041A EP0664497B1 (fr) 1994-01-24 1994-01-24 Signal pour la transmission d'informations, particulièrement, l'information de temps à travers deux fils dans une installation d'horloges

Publications (2)

Publication Number Publication Date
EP0664497A1 true EP0664497A1 (fr) 1995-07-26
EP0664497B1 EP0664497B1 (fr) 1998-05-27

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EP94810041A Expired - Lifetime EP0664497B1 (fr) 1994-01-24 1994-01-24 Signal pour la transmission d'informations, particulièrement, l'information de temps à travers deux fils dans une installation d'horloges

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EP (1) EP0664497B1 (fr)
AT (1) ATE166732T1 (fr)
DE (1) DE59406084D1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2525631B1 (de) * 1975-06-09 1976-12-16 Siemens Ag Verfahren und schaltungsanordnung zur fernspeisung elektronischer nebenuhren
FR2447572A1 (fr) * 1979-01-23 1980-08-22 Flonic Sa Systeme de distribution de l'heure a des horloges receptrices
EP0335797A1 (fr) * 1988-03-31 1989-10-04 Automobiles Peugeot Procédé et dispositif de synchronisation en réception d'une horloge locale d'une station d'un réseau de communication, notamment d'un véhicule automobile

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2525631B1 (de) * 1975-06-09 1976-12-16 Siemens Ag Verfahren und schaltungsanordnung zur fernspeisung elektronischer nebenuhren
FR2447572A1 (fr) * 1979-01-23 1980-08-22 Flonic Sa Systeme de distribution de l'heure a des horloges receptrices
EP0335797A1 (fr) * 1988-03-31 1989-10-04 Automobiles Peugeot Procédé et dispositif de synchronisation en réception d'une horloge locale d'une station d'un réseau de communication, notamment d'un véhicule automobile

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Publication number Publication date
EP0664497B1 (fr) 1998-05-27
ATE166732T1 (de) 1998-06-15
DE59406084D1 (de) 1998-07-02

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