EP0485466A4 - Distributive, digital maximization function architecture and method - Google Patents

Distributive, digital maximization function architecture and method

Info

Publication number
EP0485466A4
EP0485466A4 EP19900911963 EP90911963A EP0485466A4 EP 0485466 A4 EP0485466 A4 EP 0485466A4 EP 19900911963 EP19900911963 EP 19900911963 EP 90911963 A EP90911963 A EP 90911963A EP 0485466 A4 EP0485466 A4 EP 0485466A4
Authority
EP
European Patent Office
Prior art keywords
distributive
digital
maximization function
function architecture
architecture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19900911963
Other versions
EP0485466A1 (en
Inventor
Daniel W. Hammerstrom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Adaptive Solutions Inc
Original Assignee
HAMMERSTROM DANIEL W
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HAMMERSTROM DANIEL W filed Critical HAMMERSTROM DANIEL W
Publication of EP0485466A1 publication Critical patent/EP0485466A1/en
Publication of EP0485466A4 publication Critical patent/EP0485466A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8015One dimensional arrays, e.g. rings, linear arrays, buses

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Biophysics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Computing Systems (AREA)
  • Artificial Intelligence (AREA)
  • Neurology (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
EP19900911963 1990-05-30 1990-05-30 Distributive, digital maximization function architecture and method Withdrawn EP0485466A4 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1990/003068 WO1991019259A1 (en) 1990-05-30 1990-05-30 Distributive, digital maximization function architecture and method

Publications (2)

Publication Number Publication Date
EP0485466A1 EP0485466A1 (en) 1992-05-20
EP0485466A4 true EP0485466A4 (en) 1992-12-16

Family

ID=22220892

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19900911963 Withdrawn EP0485466A4 (en) 1990-05-30 1990-05-30 Distributive, digital maximization function architecture and method

Country Status (3)

Country Link
EP (1) EP0485466A4 (en)
JP (1) JPH05501460A (en)
WO (1) WO1991019259A1 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9206126D0 (en) * 1992-03-20 1992-05-06 Maxys Circuit Technology Limit Parallel vector processor architecture
US5717947A (en) * 1993-03-31 1998-02-10 Motorola, Inc. Data processing system and method thereof
EP0694855B1 (en) * 1994-07-28 2002-05-02 International Business Machines Corporation Search/sort circuit for neural networks
GB2393283B (en) * 2002-09-17 2005-09-14 Micron Europe Ltd Method for load balancing an N-dimensional array of parallel processing elements
DE10260176B4 (en) 2002-12-20 2006-05-18 Daimlerchrysler Ag Device for data acquisition
US7574466B2 (en) 2003-04-23 2009-08-11 Micron Technology, Inc. Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
US7447720B2 (en) 2003-04-23 2008-11-04 Micron Technology, Inc. Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
US7454451B2 (en) 2003-04-23 2008-11-18 Micron Technology, Inc. Method for finding local extrema of a set of values for a parallel processing element
FR3015068B1 (en) 2013-12-18 2016-01-01 Commissariat Energie Atomique SIGNAL PROCESSING MODULE, IN PARTICULAR FOR NEURONAL NETWORK AND NEURONAL CIRCUIT

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3970993A (en) * 1974-01-02 1976-07-20 Hughes Aircraft Company Cooperative-word linear array parallel processor
WO1988001769A1 (en) * 1986-09-02 1988-03-10 Columbia University In The City Of New York Parallel processing system and method of using the same
EP0362876A2 (en) * 1988-10-07 1990-04-11 Hughes Aircraft Company Cellular network assignment processor using minimum/maximum convergence technique

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1099574A (en) * 1964-08-21 1968-01-17 Standard Telephones Cables Ltd Adaptive element
US3613084A (en) * 1968-09-24 1971-10-12 Bell Telephone Labor Inc Trainable digital apparatus
US4858147A (en) * 1987-06-15 1989-08-15 Unisys Corporation Special purpose neurocomputer system for solving optimization problems

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3970993A (en) * 1974-01-02 1976-07-20 Hughes Aircraft Company Cooperative-word linear array parallel processor
WO1988001769A1 (en) * 1986-09-02 1988-03-10 Columbia University In The City Of New York Parallel processing system and method of using the same
EP0362876A2 (en) * 1988-10-07 1990-04-11 Hughes Aircraft Company Cellular network assignment processor using minimum/maximum convergence technique

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
IEEE TRANSACTIONS ON COMPUTERS vol. C-33, no. 2, February 1984, NEW YORK US pages 133 - 139 BOKHARI 'Finding maximum on an array processor with a global bus' *
JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING vol. 4, no. 6, December 1987, DULUTH, MN US pages 575 - 591 ROTEM 'Analysis of a distributed algorithm for extrema finding in a ring' *
See also references of WO9119259A1 *

Also Published As

Publication number Publication date
WO1991019259A1 (en) 1991-12-12
JPH05501460A (en) 1993-03-18
EP0485466A1 (en) 1992-05-20

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