EA032058B1 - Method for thermal oxidation of silicon wafers - Google Patents

Method for thermal oxidation of silicon wafers Download PDF

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Publication number
EA032058B1
EA032058B1 EA201500106A EA201500106A EA032058B1 EA 032058 B1 EA032058 B1 EA 032058B1 EA 201500106 A EA201500106 A EA 201500106A EA 201500106 A EA201500106 A EA 201500106A EA 032058 B1 EA032058 B1 EA 032058B1
Authority
EA
Eurasian Patent Office
Prior art keywords
reactor
plates
boat
temperature
loading
Prior art date
Application number
EA201500106A
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Russian (ru)
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EA201500106A1 (en
Inventor
Аркадий Степанович Турцевич
Юрий Борисович Васильев
Виктор Леонидович Трусов
Алла Николаевна Богаткина
Original Assignee
Открытое акционерное общество "ИНТЕГРАЛ"-управляющая компания холдинга "ИНТЕГРАЛ"
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Priority to EA201500106A priority Critical patent/EA032058B1/en
Publication of EA201500106A1 publication Critical patent/EA201500106A1/en
Publication of EA032058B1 publication Critical patent/EA032058B1/en

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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/477Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere

Abstract

The invention relates to the field of microelectronics, and more specifically to the technology of forming high-quality layers of thin gate and tunnel dielectrics, and can be used in the manufacturing process of MOS and CMOS submicron integrated circuits. The basis of the invention is to improve the yield of IC and improve the parameters of the gate silicon dioxide. The essence of the invention lies in the fact that in the method of thermal oxidation of silicon wafers, including loading the boat with the plates into the heated reactor, raising the temperature to the oxidation temperature, oxidizing the plates, cooling and unloading the boat with the plates from the reactor, and during loading the boat into the reactor and unloading from the reactor, the loading chamber is blown with a laminar flow of circulating filtered air or nitrogen, the loading of the boat with the plates is carried out in a reactor heated to a temperature of 350-380 ° C.

Description

The invention relates to the field of microelectronics, and more specifically to a technology for the formation of high-quality layers of thin gate and tunneling dielectrics, and can be used in the manufacturing process of MOS and CMOS submicron integrated circuits. The basis of the invention is the task of increasing the yield of suitable ICs and improving the parameters of the gate silica. The essence of the invention lies in the fact that in the method of thermal oxidation of silicon wafers, which includes loading the boat with the wafers into a heated reactor, raising the temperature to an oxidation temperature, oxidizing the wafers, cooling and unloading the boat with wafers from the reactor, and during loading the boat into the reactor and unloading from the reactor, the loading chamber is blown by a laminar flow of circulating filtered air or nitrogen, the loading of the boat with the plates is carried out in a reactor heated to a temperature of 350-380 ° C.

The invention relates to the field of microelectronics, and more specifically to a technology for the formation of high-quality layers of thin gate and tunneling dielectrics, and can be used in the manufacturing process of MOS and CMOS submicron integrated circuits.

Known standard process for the oxidation of silicon wafers [1], including cleaning silicon wafers, drying, placement in a quartz boat and automatic loading into a furnace heated to a temperature of 800-900 ° C with subsequent gradual increase in temperature.

Such an increase in temperature is necessary to prevent the formation of defects and cracking of the plates.

However, this method has the following disadvantages:

loading into a diffusion furnace heated to a temperature of 800-900 ° C a quartz boat with silicon wafers in an air atmosphere with an uncontrolled content of impurities leads to acidification of the wafers in the air during loading and unloading, and pollution of growing thermal silicon dioxide with undesirable impurities in the air the deterioration of the electrical parameters of the gate or tunnel silicon dioxide (increase the leakage current, decrease the breakdown charge), deteriorate the reliability of MOS transistors and ICs on them basis;

uneven heating of the plates during the loading of the boat into the furnace leads to an increased dispersion of the thickness of silicon dioxide over the surface of the plates.

These shortcomings do not make it possible to obtain high-quality gate silica, to increase the percentage of suitable devices.

The closest technical solution to the proposed invention is a method of thermal oxidation of silicon wafers [2], which includes loading the boat with the wafers into a heated reactor, raising the temperature to the oxidation temperature, oxidizing the wafers, cooling and unloading the boat with wafers from the reactor, and in the process of loading the boat into reactor and discharges from the reactor, the loading chamber is blown by a laminar flow of circulating filtered air or nitrogen.

A purge of the loading zone with a laminar flow of circulating filtered air reduces the defectiveness of the grown silicon dioxide layers, and a nitrogen purge further reduces the acidification of the plates in air when loading into a heated reactor and reduces the spread of the thickness of silicon dioxide over the surface of the plates.

However, this method is not without drawbacks: loading and unloading a boat with plates into a heated reactor while blowing the loading zone with air or nitrogen does not completely eliminate the acidification of the plates and does not allow to obtain the required parameters of thin gate silicon dioxide.

The proposed invention solves the problem of increasing the yield of suitable ICs and improving the parameters of the gate silica.

The problem is solved in that in the method of thermal oxidation of silicon wafers, which includes loading the boat with the wafers into a heated reactor, raising the temperature to an oxidation temperature, oxidizing the wafers, cooling and unloading the boat with wafers from the reactor, moreover, in the process of loading the boat into the reactor and unloading from The reactor loading chamber is blown by a laminar flow of circulating filtered air or nitrogen, the loading of the boat with the plates is carried out in a reactor heated to a temperature of 350-380 ° C.

A comparative analysis of the alleged invention with the prototype showed that the inventive method is characterized in that the loading of the boat with the plates is carried out in a reactor heated to a temperature of 350 380 ° C.

The use of an identical or similar sequence of actions for the problem being solved was not found.

The solution of the problem is explained as follows.

Loading a boat with plates into a reactor heated to a temperature of 350-380 ° C leads to the complete elimination of acidification of the plates. As a result, plate contamination with undesirable impurities is eliminated, leakage current decreases, the dielectric strength of silicon dioxide increases, and the yield of suitable MOS structures increases.

At a temperature in the reactor greater than 380 ° C, the surface of the plates is acidified in air during loading of the boat with the plates, an uncontrolled increase in the thickness of natural silicon dioxide at the 8ί-8ίΟ 2 interface during the loading of the boat into the reactor becomes more than 0.3 nm, which leads to an increase in leakage current, a decrease in the dielectric strength of silicon dioxide, and a decrease in the yield of suitable MOS structures.

When the temperature in the reactor is less than 350 ° C, the acidification of the plates is completely eliminated during loading the boat into the reactor, the electrical parameters of silicon dioxide and the yield are not changed, but the time of heating the plates to the temperature of oxidation and cooling after oxidation increases, which leads to an extension of the oxidation process and reduced performance of the diffusion system.

The invention is illustrated in FIG. 1-2, where in FIG. 1 shows the temperature-time cycle

- 1 032058 grams of the oxidation process according to the prototype method, which includes loading the boat with plates into a reactor heated to a temperature of 700 ° C, raising the temperature to an oxidation temperature, oxidizing the plates, cooling and unloading the boat with plates from the reactor, and during the loading of the boat into the reactor and unloading from the reactor, the loading chamber is blown by a laminar flow of circulating filtered air or nitrogen, and in FIG. 2 shows a temperature-time sequence diagram of the oxidation process according to the proposed method of thermal oxidation, which includes loading the boat with plates into a reactor heated to a temperature of 350-380 ° C, raising the temperature to the oxidation temperature, oxidizing the plates, cooling and unloading the boat with plates from the reactor, In the process of loading the boat into the reactor and unloading from the reactor, the loading chamber is blown through a laminar flow of circulating filtered air or nitrogen.

The proposed method includes the following sequence of operations.

1. Loading a boat with plates into a reactor heated to a temperature of 350-380 ° C.

2. Raising the temperature to the temperature of oxidation.

3. Oxidation of the plates.

4. Plate cooling.

5. Unloading boats with plates from the reactor.

When loading boats with plates into the reactor and unloading from the reactor, the loading chamber is blown through a laminar flow of circulating filtered air or nitrogen.

The implementation of the proposed method of thermal oxidation of silicon wafers is confirmed by the following specific examples.

As silicon wafers, single-crystal silicon wafers 200KDB12 (100) were used (import). To study the oxidation processes, plates without a topological relief were used. To study the parameters of the gate silicon dioxide (leakage current, breakdown charge, yield), we used test MOS structures with an area of 1 x 10 -4 cm 2 insulated with local silicon dioxide.

The plates were oxidized using a vertical diffusion system A8M 400XT. For oxidation, gaseous oxygen and nitrogen of the 6.0 grade (99.9999%) were used, as well as dichloroethylene (BSB) of the company ΆΪΓ RgoisE. The oxidation temperature was 1000 ° C. Thickness 8ΐΘ 2 was 7 nm.

The thickness of the silicon dioxide was measured using a Θρΐΐ-РгоЬе 2690 setup. The parameters of the gate silica (leakage current, breakdown charge, yield of suitable structures) were measured using a 7000 probe micromanipulator, a precision parameter analyzer НР4156В and an automated measuring system НР4061А.

The results of a study of the oxidation process, characteristics of the obtained films and analysis of test structures are presented in the table.

The comparison of the parameters and characteristics of the oxidation processes of the present method and prototype

№№ p / p Temperature boat loads with plates in a heated reactor, ° C Silica Characteristics The yield of annual MOS structures in relation to the prototype, rel. units Breakdown charge, C / cm 2 Leakage current, A / cm 2 The increase in the thickness of natural 81O2 in the process loading, nm one 300 7.25 1,8h10 '15 <0.30 2.01 2 350 7.18 1,9h10 '15 <0.30 1.96 3 370 (optimal process) 7.31 2,0h10 '15 <0.30 1.99 four 380 7.29 2,1h10 '15 0.30 1.98 five 420 6.91 3,6h10 '14 0.51 1.31 6 prototype 4.18 1.7x10 “ 13 1.23 1.00

- 2 032058

Analysis of the table shows that when the boat is loaded with plates heated to a temperature of 350 380 ° C reactor thickness increase natural 8ίΘ 2 during loading in comparison with the prototype decreases from 1.23 nm to <0.3 nm, the charge breakdown silica increases from 4 , 18 to (7.18-7.31) C / cm 2 , the leakage current decreases from 1.7x10 -13 to (1.9-2.0) x10 -15 A / cm 2 . The yield of suitable MOS structures increases by 1.96-1.99 times. If the above modes are not performed, then the effect is not achieved.

The optimal method is thermal oxidation, which includes loading the boat with the plates into a reactor heated to a temperature of 370 ° C. With this method, natural oxidation 8ίΘ thickness increment 2 during loading in comparison with the prior art is reduced by 4.1 times, the amount of charge breakdown silica 7 nm thick charge exceeds the breakdown of the method-prototype is 1.75 times, the leakage current is reduced by 85 times and the duration of the oxidation process increases by 1.75 times. The yield of suitable MOS structures exceeds the yield of suitable by the prototype method by 1.96-1.99 times.

Thus, the proposed method for the thermal oxidation of silicon wafers allows us to solve the problem of increasing the yield of suitable ICs and improving the parameters of the gate silicon dioxide.

Information sources.

1. Technology of integrated electronics: a training manual for the discipline Design and technology of integrated electronics products for students of specialties Design and production of RES, Electron-optical systems and technologies / L.P. Anufriev, S.V. Bordusov, L.I. Gursky [and other]; / Under the general. ed. A.P. Dostanko and L.I. Gursky. Minsk: Integralpolygraph, 2009, p. 145.

2. Basic manufacturing processes for the manufacture of semiconductor devices and integrated circuits on silicon. Edited by A.S. Turtsevich, Doctor of Technical Sciences in three volumes. Volume 2, p. 62.

Claims (1)

  1. CLAIM
    A method of thermal oxidation of silicon wafers, including loading a boat with plates into a heated reactor, raising the temperature to an oxidation temperature, oxidizing the plates, cooling and unloading the boat with plates from the reactor, and during loading of the boat into the reactor and unloading from the reactor, the loading chamber is blown through a laminar flow filtered air or nitrogen, characterized in that the loading of the boat with the plates is carried out in a reactor heated to a temperature of 350-380 ° C.
    Interval Temperature rise Heat Oxidation Cooling Unloading Temperature ° C 1000 700 / X Time min - thirty 60 100 -
EA201500106A 2014-12-17 2014-12-17 Method for thermal oxidation of silicon wafers EA032058B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EA201500106A EA032058B1 (en) 2014-12-17 2014-12-17 Method for thermal oxidation of silicon wafers

Applications Claiming Priority (1)

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EA201500106A EA032058B1 (en) 2014-12-17 2014-12-17 Method for thermal oxidation of silicon wafers

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EA032058B1 true EA032058B1 (en) 2019-04-30

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6596650B2 (en) * 1997-03-05 2003-07-22 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
RU2297692C2 (en) * 2003-11-27 2007-04-20 Открытое акционерное общество "НИИ молекулярной электроники и завод "Микрон" Method for producing cmos transistor gate regions
RU2014121382A (en) * 2014-05-28 2014-09-27 Общество с ограниченной ответственностью "Микро фотоника" Method for producing microsurgical blades

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6596650B2 (en) * 1997-03-05 2003-07-22 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
RU2297692C2 (en) * 2003-11-27 2007-04-20 Открытое акционерное общество "НИИ молекулярной электроники и завод "Микрон" Method for producing cmos transistor gate regions
RU2014121382A (en) * 2014-05-28 2014-09-27 Общество с ограниченной ответственностью "Микро фотоника" Method for producing microsurgical blades

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