DE69433718D1 - Herstellungsverfahren für eine Halbleitereinheit, wobei Höcker zum Bonden von zwei Bauelementen verwendet werden - Google Patents
Herstellungsverfahren für eine Halbleitereinheit, wobei Höcker zum Bonden von zwei Bauelementen verwendet werdenInfo
- Publication number
- DE69433718D1 DE69433718D1 DE69433718T DE69433718T DE69433718D1 DE 69433718 D1 DE69433718 D1 DE 69433718D1 DE 69433718 T DE69433718 T DE 69433718T DE 69433718 T DE69433718 T DE 69433718T DE 69433718 D1 DE69433718 D1 DE 69433718D1
- Authority
- DE
- Germany
- Prior art keywords
- bumps
- bonding
- manufacturing
- components
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0612—Layout
- H01L2224/0613—Square or rectangular array
- H01L2224/06131—Square or rectangular array being uniform, i.e. having a uniform pitch across the array
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13109—Indium [In] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12043—Photo diode
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20170493A JP3194553B2 (ja) | 1993-08-13 | 1993-08-13 | 半導体装置の製造方法 |
JP20170493 | 1993-08-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69433718D1 true DE69433718D1 (de) | 2004-05-27 |
DE69433718T2 DE69433718T2 (de) | 2004-08-19 |
Family
ID=16445544
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69433718T Expired - Lifetime DE69433718T2 (de) | 1993-08-13 | 1994-05-03 | Herstellungsverfahren für eine Halbleitereinheit, wobei Höcker zum Bonden von zwei Bauelementen verwendet werden |
Country Status (4)
Country | Link |
---|---|
US (1) | US6121062A (de) |
EP (1) | EP0638926B1 (de) |
JP (1) | JP3194553B2 (de) |
DE (1) | DE69433718T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09148373A (ja) * | 1995-11-21 | 1997-06-06 | Murata Mfg Co Ltd | 無線通信モジュール |
JP3176580B2 (ja) * | 1998-04-09 | 2001-06-18 | 太陽誘電株式会社 | 電子部品の実装方法及び実装装置 |
JP3278055B2 (ja) * | 1998-06-30 | 2002-04-30 | セイコーインスツルメンツ株式会社 | 電子回路装置 |
US6258612B1 (en) * | 2000-06-28 | 2001-07-10 | Advanced Micro Devices, Inc. | Determination of flux prior to package assembly |
JP4049239B2 (ja) * | 2000-08-30 | 2008-02-20 | Tdk株式会社 | 表面弾性波素子を含む高周波モジュール部品の製造方法 |
US6666368B2 (en) * | 2000-11-10 | 2003-12-23 | Unitive Electronics, Inc. | Methods and systems for positioning substrates using spring force of phase-changeable bumps therebetween |
US6712260B1 (en) | 2002-04-18 | 2004-03-30 | Taiwan Semiconductor Manufacturing Company | Bump reflow method by inert gas plasma |
US7649267B2 (en) * | 2005-03-17 | 2010-01-19 | Panasonic Corporation | Package equipped with semiconductor chip and method for producing same |
JP4650220B2 (ja) * | 2005-11-10 | 2011-03-16 | パナソニック株式会社 | 電子部品の半田付け方法および電子部品の半田付け構造 |
US11134598B2 (en) | 2009-07-20 | 2021-09-28 | Set North America, Llc | 3D packaging with low-force thermocompression bonding of oxidizable materials |
JP4901933B2 (ja) | 2009-09-29 | 2012-03-21 | 株式会社東芝 | 半導体装置の製造方法 |
US20110169160A1 (en) * | 2010-01-13 | 2011-07-14 | California Institute Of Technology | Real time monitoring of indium bump reflow and oxide removal enabling optimization of indium bump morphology |
JP5645592B2 (ja) * | 2010-10-21 | 2014-12-24 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
WO2013134054A1 (en) * | 2012-03-04 | 2013-09-12 | Set North America, Llc | 3d packaging with low-force thermocompression bonding of oxidizable materials |
JP2016009850A (ja) * | 2014-06-26 | 2016-01-18 | 東レエンジニアリング株式会社 | 実装装置および実装方法 |
JP6636534B2 (ja) | 2014-11-12 | 2020-01-29 | オントス イクイップメント システムズ インコーポレイテッド | フォトレジスト表面および金属表面処理の同時親水化:方法、システム、および製品 |
Family Cites Families (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5756937A (en) * | 1980-09-20 | 1982-04-05 | Fujitsu Ltd | Assembling method for semiconductor device |
US4545610A (en) * | 1983-11-25 | 1985-10-08 | International Business Machines Corporation | Method for forming elongated solder connections between a semiconductor device and a supporting substrate |
DE3676832D1 (de) * | 1985-02-15 | 1991-02-21 | Ibm | Loetverbindung zwischen chip und substrat und verfahren zur herstellung. |
JPS6271908A (ja) * | 1985-09-26 | 1987-04-02 | Oki Electric Ind Co Ltd | 光半導体結合器の光半導体素子半田付け方法 |
JPS62245640A (ja) * | 1986-04-18 | 1987-10-26 | Hitachi Ltd | 半導体装置の製造方法および装置 |
JPS62276518A (ja) * | 1986-05-26 | 1987-12-01 | Hitachi Ltd | 接続方法および光電子装置の製造方法ならびに支持体 |
US4752027A (en) * | 1987-02-20 | 1988-06-21 | Hewlett-Packard Company | Method and apparatus for solder bumping of printed circuit boards |
JPS63289844A (ja) * | 1987-05-21 | 1988-11-28 | Fuji Electric Co Ltd | 半導体装置のバンプ電極 |
US4912545A (en) * | 1987-09-16 | 1990-03-27 | Irvine Sensors Corporation | Bonding of aligned conductive bumps on adjacent surfaces |
US4865245A (en) * | 1987-09-24 | 1989-09-12 | Santa Barbara Research Center | Oxide removal from metallic contact bumps formed on semiconductor devices to improve hybridization cold-welds |
JP2570786B2 (ja) * | 1988-01-28 | 1997-01-16 | 富士通株式会社 | 半田バンプの接続方法 |
US5022580A (en) * | 1988-03-16 | 1991-06-11 | Plessey Overseas Limited | Vernier structure for flip chip bonded devices |
JP2633903B2 (ja) * | 1988-04-28 | 1997-07-23 | 株式会社日立製作所 | パッケージの製造方法 |
JPH01295433A (ja) * | 1988-05-24 | 1989-11-29 | Matsushita Electric Works Ltd | バンプの製法 |
DE3824008A1 (de) * | 1988-07-15 | 1990-01-25 | Contraves Ag | Elektronische schaltung sowie verfahren zu deren herstellung |
JP2615149B2 (ja) * | 1988-07-27 | 1997-05-28 | 株式会社半導体エネルギー研究所 | Icチップの実装方法 |
JPH02172296A (ja) * | 1988-12-23 | 1990-07-03 | Shimadzu Corp | フリップチップ実装方法 |
JPH02232946A (ja) * | 1989-03-06 | 1990-09-14 | Shimadzu Corp | ハンダバンプとパッドとの接合構造 |
US5071787A (en) * | 1989-03-14 | 1991-12-10 | Kabushiki Kaisha Toshiba | Semiconductor device utilizing a face-down bonding and a method for manufacturing the same |
JPH02303676A (ja) * | 1989-05-17 | 1990-12-17 | Hitachi Ltd | ろう材接合法および処理装置ならびに半導体装置 |
JP2786700B2 (ja) * | 1989-11-29 | 1998-08-13 | 株式会社日立製作所 | 半導体集積回路装置の製造方法および製造装置 |
JPH0371649A (ja) * | 1989-08-11 | 1991-03-27 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2929545B2 (ja) * | 1989-10-25 | 1999-08-03 | 株式会社日立製作所 | 半導体集積回路装置の製造方法および製造装置 |
JPH03138941A (ja) * | 1989-10-25 | 1991-06-13 | Hitachi Ltd | 半田バンプ形成方法および装置 |
JPH03209734A (ja) * | 1990-01-11 | 1991-09-12 | Japan Radio Co Ltd | 半導体接続方法 |
JPH03217024A (ja) * | 1990-01-22 | 1991-09-24 | Hitachi Ltd | 半導体装置 |
JPH03218645A (ja) * | 1990-01-24 | 1991-09-26 | Sharp Corp | 半導体装置の実装方法 |
US5341980A (en) * | 1990-02-19 | 1994-08-30 | Hitachi, Ltd. | Method of fabricating electronic circuit device and apparatus for performing the same method |
JP2821229B2 (ja) * | 1990-03-30 | 1998-11-05 | 株式会社日立製作所 | 電子回路装置 |
JPH0437137A (ja) * | 1990-06-01 | 1992-02-07 | Hitachi Ltd | 半導体チップ又は半導体装置及びその製造方法 |
DE4020048A1 (de) * | 1990-06-23 | 1992-01-02 | Ant Nachrichtentech | Anordnung aus substrat und bauelement und verfahren zur herstellung |
JPH0456246A (ja) * | 1990-06-25 | 1992-02-24 | Matsushita Electron Corp | 半導体製造装置 |
JP2633386B2 (ja) * | 1990-11-14 | 1997-07-23 | 松下電子工業株式会社 | 半導体装置の製造方法および半導体装置の製造装置 |
US5056215A (en) * | 1990-12-10 | 1991-10-15 | Delco Electronics Corporation | Method of providing standoff pillars |
JPH04294542A (ja) * | 1991-03-22 | 1992-10-19 | Nippon Steel Corp | 半導体装置のバンプ高さ制御方法 |
JPH04328843A (ja) * | 1991-04-30 | 1992-11-17 | Matsushita Electric Ind Co Ltd | 突起電極の検査方法 |
JPH0541381A (ja) * | 1991-08-05 | 1993-02-19 | Fujitsu Ltd | バンプ形成治具及びその形成方法 |
US5125560A (en) * | 1991-11-04 | 1992-06-30 | At&T Bell Laboratories | Method of soldering including removal of flux residue |
-
1993
- 1993-08-13 JP JP20170493A patent/JP3194553B2/ja not_active Expired - Fee Related
-
1994
- 1994-05-03 DE DE69433718T patent/DE69433718T2/de not_active Expired - Lifetime
- 1994-05-03 EP EP94303200A patent/EP0638926B1/de not_active Expired - Lifetime
-
1996
- 1996-02-23 US US08/606,503 patent/US6121062A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0638926B1 (de) | 2004-04-21 |
US6121062A (en) | 2000-09-19 |
JPH0758153A (ja) | 1995-03-03 |
EP0638926A1 (de) | 1995-02-15 |
DE69433718T2 (de) | 2004-08-19 |
JP3194553B2 (ja) | 2001-07-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
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