DE69325334T2 - Vorrichtung zur Unterbrechungsverarbeitung - Google Patents

Vorrichtung zur Unterbrechungsverarbeitung

Info

Publication number
DE69325334T2
DE69325334T2 DE69325334T DE69325334T DE69325334T2 DE 69325334 T2 DE69325334 T2 DE 69325334T2 DE 69325334 T DE69325334 T DE 69325334T DE 69325334 T DE69325334 T DE 69325334T DE 69325334 T2 DE69325334 T2 DE 69325334T2
Authority
DE
Germany
Prior art keywords
device
interrupt processing
interrupt
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69325334T
Other languages
English (en)
Other versions
DE69325334D1 (de
Inventor
Toshiya Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hudson Soft Co Ltd
Original Assignee
Hudson Soft Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP4289251A priority Critical patent/JPH06180653A/ja
Application filed by Hudson Soft Co Ltd filed Critical Hudson Soft Co Ltd
Application granted granted Critical
Publication of DE69325334T2 publication Critical patent/DE69325334T2/de
Anticipated expiration legal-status Critical
Application status is Expired - Lifetime legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/30105Register structure
    • G06F9/30116Shadow registers, e.g. coupled registers, not forming part of the register space
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/461Saving or restoring of program or task context
    • G06F9/462Saving or restoring of program or task context with multiple register sets
DE69325334T 1992-10-02 1993-08-09 Vorrichtung zur Unterbrechungsverarbeitung Expired - Lifetime DE69325334T2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4289251A JPH06180653A (ja) 1992-10-02 1992-10-02 割り込み処理方法および装置

Publications (1)

Publication Number Publication Date
DE69325334T2 true DE69325334T2 (de) 2000-02-24

Family

ID=17740737

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69325334T Expired - Lifetime DE69325334T2 (de) 1992-10-02 1993-08-09 Vorrichtung zur Unterbrechungsverarbeitung
DE69325334A Expired - Fee Related DE69325334D1 (de) 1992-10-02 1993-08-09 Vorrichtung zur Unterbrechungsverarbeitung

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69325334A Expired - Fee Related DE69325334D1 (de) 1992-10-02 1993-08-09 Vorrichtung zur Unterbrechungsverarbeitung

Country Status (6)

Country Link
US (1) US5530873A (de)
EP (1) EP0593154B1 (de)
JP (1) JPH06180653A (de)
CA (1) CA2103988C (de)
DE (2) DE69325334T2 (de)
TW (1) TW245786B (de)

Families Citing this family (44)

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US5701493A (en) * 1995-08-03 1997-12-23 Advanced Risc Machines Limited Exception handling method and apparatus in data processing systems
US5640570A (en) * 1996-01-26 1997-06-17 International Business Machines Corporation Information handling system for transmitting contents of line register from asynchronous controller to shadow register in another asynchronous controller determined by shadow register address buffer
DE19651075A1 (de) * 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654595A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
DE19654593A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit
EP1329816B1 (de) 1996-12-27 2011-06-22 Richter, Thomas Verfahren zum selbständigen dynamischen Umladen von Datenflussprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o.dgl.)
DE19654846A1 (de) * 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
DE19704728A1 (de) 1997-02-08 1998-08-13 Pact Inf Tech Gmbh Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
DE19704742A1 (de) 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
US5987258A (en) * 1997-06-27 1999-11-16 Lsi Logic Corporation Register reservation method for fast context switching in microprocessors
US6128728A (en) * 1997-08-01 2000-10-03 Micron Technology, Inc. Virtual shadow registers and virtual register windows
DE19861088A1 (de) * 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
DE69837138T2 (de) * 1997-12-31 2007-08-16 Texas Instruments Inc., Dallas Unterbrechbare mehrfache Ausfuehrungseinheitverarbeitung waehrend mehrfacher Zuweisung von Register verwendenden Operationen
US6990555B2 (en) 2001-01-09 2006-01-24 Pact Xpp Technologies Ag Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
US6243804B1 (en) * 1998-07-22 2001-06-05 Scenix Semiconductor, Inc. Single cycle transition pipeline processing using shadow registers
JP4709394B2 (ja) * 1999-04-27 2011-06-22 インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation プログラムコード変換において使用する例外処理の方法および装置
EP1228440B1 (de) 1999-06-10 2017-04-05 PACT XPP Technologies AG Sequenz-partitionierung auf zellstrukturen
AT476700T (de) 2000-06-13 2010-08-15 Richter Thomas Pipeline ct-protokolle und -kommunikation
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
EP1402382B1 (de) 2001-06-20 2010-08-18 Richter, Thomas Verfahren zur bearbeitung von daten
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7844796B2 (en) 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
US7210129B2 (en) 2001-08-16 2007-04-24 Pact Xpp Technologies Ag Method for translating programs for reconfigurable architectures
WO2004021176A2 (de) 2002-08-07 2004-03-11 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
US7266725B2 (en) 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
WO2003060747A2 (de) 2002-01-19 2003-07-24 Pact Xpp Technologies Ag Reconfigurierbarer prozessor
AU2003214003A1 (en) 2002-02-18 2003-09-09 Pact Xpp Technologies Ag Bus systems and method for reconfiguration
US6986028B2 (en) * 2002-04-22 2006-01-10 Texas Instruments Incorporated Repeat block with zero cycle overhead nesting
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
US7394284B2 (en) 2002-09-06 2008-07-01 Pact Xpp Technologies Ag Reconfigurable sequencer structure
US7493478B2 (en) * 2002-12-05 2009-02-17 International Business Machines Corporation Enhanced processor virtualization mechanism via saving and restoring soft processor/system states
WO2005020065A2 (en) * 2003-08-25 2005-03-03 Koninklijke Philips Electronics, N.V. Dynamic retention of hardware register content in a computer system
JP4700611B2 (ja) 2003-08-28 2011-06-15 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフトPACT XPP Technologies AG データ処理装置およびデータ処理方法
EP1974265A1 (de) 2006-01-18 2008-10-01 PACT XPP Technologies AG Hardwaredefinitionsverfahren
TWI421764B (zh) * 2010-10-15 2014-01-01 Inventec Corp 在中斷管理模式下顯示畫面的方法
MY167502A (en) 2010-12-17 2018-09-04 Inventio Ag Lift installation with car and counterweight
US10002089B2 (en) * 2015-11-12 2018-06-19 Nxp Usa, Inc. Interrupt-controlled direct memory access peripheral data transfer

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4103329A (en) * 1976-12-28 1978-07-25 International Business Machines Corporation Data processing system with improved bit field handling
US4217638A (en) * 1977-05-19 1980-08-12 Tokyo Shibaura Electric Co., Ltd. Data-processing apparatus and method
JPS5616248A (en) * 1979-07-17 1981-02-17 Matsushita Electric Ind Co Ltd Processing system for interruption
US4434461A (en) * 1980-09-15 1984-02-28 Motorola, Inc. Microprocessor with duplicate registers for processing interrupts
JPS58225443A (en) * 1982-06-25 1983-12-27 Nec Corp High-speed data processor
JPS5933558A (en) * 1982-08-19 1984-02-23 Nec Corp Information processor
JPS6349945A (en) * 1986-08-20 1988-03-02 Nec Corp Process roll-in system for data processor
US5237700A (en) * 1990-03-21 1993-08-17 Advanced Micro Devices, Inc. Exception handling processor for handling first and second level exceptions with reduced exception latency

Also Published As

Publication number Publication date
EP0593154A3 (de) 1995-01-04
DE69325334D1 (de) 1999-07-22
TW245786B (de) 1995-04-21
JPH06180653A (ja) 1994-06-28
CA2103988C (en) 2000-06-13
US5530873A (en) 1996-06-25
EP0593154B1 (de) 1999-06-16
EP0593154A2 (de) 1994-04-20
CA2103988A1 (en) 1994-04-03

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