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DE69132501T2 - Methode zum Betrieb eines synchronen Speichers mit einer variablen Länge der Ausgabedaten - Google Patents

Methode zum Betrieb eines synchronen Speichers mit einer variablen Länge der Ausgabedaten

Info

Publication number
DE69132501T2
DE69132501T2 DE1991632501 DE69132501T DE69132501T2 DE 69132501 T2 DE69132501 T2 DE 69132501T2 DE 1991632501 DE1991632501 DE 1991632501 DE 69132501 T DE69132501 T DE 69132501T DE 69132501 T2 DE69132501 T2 DE 69132501T2
Authority
DE
Grant status
Grant
Patent type
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE1991632501
Other languages
English (en)
Other versions
DE69132501D1 (de )
DE69132501T3 (de )
Inventor
Michael Farmwald
Mark A Horowitz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rambus Inc
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Grant date
Family has litigation

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066Output synchronization
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/006Identification
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0215Addressing or allocation; Relocation with look ahead addressing means
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646Configuration or reconfiguration
    • G06F12/0653Configuration or reconfiguration with centralised address assignment
    • G06F12/0661Configuration or reconfiguration with centralised address assignment and decentralised selection
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646Configuration or reconfiguration
    • G06F12/0684Configuration or reconfiguration with feedback, e.g. presence or absence of unit detected by addressing, overflow detection
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1678Details of memory controller using bus width
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1689Synchronisation and timing concerns
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1694Configuration of memory controller to different memory types
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/376Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a contention resolving method, e.g. collision detection, collision avoidance
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write (R-W) circuits
    • G11C11/4096Input/output (I/O) data management or control circuits, e.g. reading or writing circuits, I/O drivers, bit-line switches
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/88Masking faults in memories by using spares or by reconfiguring with partially good memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by G11C11/00
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04Supports for storage elements, Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G11C7/1012Data reordering during input/output, e.g. crossbars, layers of multiplexers, shifting or rotating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045Read-write mode select circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069I/O lines read out arrangements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write (R-W) timing or clocking circuits; Read-write (R-W) control signal generators or management
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write (R-W) timing or clocking circuits; Read-write (R-W) control signal generators or management
    • G11C7/222Clock generating, synchronizing or distributing circuits within memory device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write (R-W) timing or clocking circuits; Read-write (R-W) control signal generators or management
    • G11C7/225Clock input buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/105Aspects related to pads, pins or terminals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/108Wide data ports
    • Y02D10/13
    • Y02D10/14
    • Y02D10/151
DE1991632501 1990-04-18 1991-04-16 Methode zum Betrieb eines synchronen Speichers mit einer variablen Länge der Ausgabedaten Expired - Lifetime DE69132501T3 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US51089890 true 1990-04-18 1990-04-18
US510898 1990-04-18

Publications (2)

Publication Number Publication Date
DE69132501T2 true DE69132501T2 (de) 2001-08-23
DE69132501T3 DE69132501T3 (de) 2009-09-03

Family

ID=24032637

Family Applications (22)

Application Number Title Priority Date Filing Date
DE1991632721 Expired - Lifetime DE69132721T2 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991632501 Expired - Lifetime DE69132501T3 (de) 1990-04-18 1991-04-16 Methode zum Betrieb eines synchronen Speichers mit einer variablen Länge der Ausgabedaten
DE1991633550 Expired - Lifetime DE69133550T2 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2002000378 Pending DE02000378T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2000108822 Pending DE1022642T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991633572 Expired - Lifetime DE69133572D1 (de) 1990-04-18 1991-04-16 Halbleiterbauelement mit dynamischem Arbeitsspeicher (DRAM)
DE1991632121 Revoked DE69132121D1 (de) 1990-04-18 1991-04-16 Halbleiterspeichervorrichtung
DE1991633500 Expired - Lifetime DE69133500D1 (de) 1990-04-18 1991-04-16 DRAM Halbleiter Vorrichtung
DE1991633550 Expired - Lifetime DE69133550D1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991632501 Expired - Lifetime DE69132501D1 (de) 1990-04-18 1991-04-16 Methode zum Betrieb eines synchronen Speichers mit einer variablen Länge der Ausgabedaten
DE1991633572 Expired - Lifetime DE69133572T2 (de) 1990-04-18 1991-04-16 Halbleiterbauelement mit dynamischem Arbeitsspeicher (DRAM)
DE1991632721 Expired - Lifetime DE69132721D1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2006125954 Pending DE06125954T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991633565 Expired - Lifetime DE69133565T3 (de) 1990-04-18 1991-04-16 System mit einer Vielzahl von DRAMS und einem Bus
DE1991633565 Expired - Lifetime DE69133565D1 (de) 1990-04-18 1991-04-16 System mit einer Vielzahl von DRAMS und einem Bus
DE1991633611 Expired - Lifetime DE69133611D1 (de) 1990-04-18 1991-04-16 Integrierte E/A-Schaltung, die eine Hochleistungsbusschnittstelle benutzt
DE1991633598 Expired - Lifetime DE69133598D1 (de) 1990-04-18 1991-04-16 Integrierte E/A-Schaltung, die eine Hochleistungsbusschnittstelle benutzt
DE2006125958 Pending DE06125958T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991633500 Expired - Lifetime DE69133500T2 (de) 1990-04-18 1991-04-16 DRAM Halbleitervorrichtung
DE2006125946 Pending DE06125946T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2000100018 Pending DE00100018T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991632121 Expired - Lifetime DE69132121T2 (de) 1990-04-18 1991-04-16 Halbleiterspeichervorrichtung

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE1991632721 Expired - Lifetime DE69132721T2 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle

Family Applications After (20)

Application Number Title Priority Date Filing Date
DE1991633550 Expired - Lifetime DE69133550T2 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2002000378 Pending DE02000378T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2000108822 Pending DE1022642T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991633572 Expired - Lifetime DE69133572D1 (de) 1990-04-18 1991-04-16 Halbleiterbauelement mit dynamischem Arbeitsspeicher (DRAM)
DE1991632121 Revoked DE69132121D1 (de) 1990-04-18 1991-04-16 Halbleiterspeichervorrichtung
DE1991633500 Expired - Lifetime DE69133500D1 (de) 1990-04-18 1991-04-16 DRAM Halbleiter Vorrichtung
DE1991633550 Expired - Lifetime DE69133550D1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991632501 Expired - Lifetime DE69132501D1 (de) 1990-04-18 1991-04-16 Methode zum Betrieb eines synchronen Speichers mit einer variablen Länge der Ausgabedaten
DE1991633572 Expired - Lifetime DE69133572T2 (de) 1990-04-18 1991-04-16 Halbleiterbauelement mit dynamischem Arbeitsspeicher (DRAM)
DE1991632721 Expired - Lifetime DE69132721D1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2006125954 Pending DE06125954T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991633565 Expired - Lifetime DE69133565T3 (de) 1990-04-18 1991-04-16 System mit einer Vielzahl von DRAMS und einem Bus
DE1991633565 Expired - Lifetime DE69133565D1 (de) 1990-04-18 1991-04-16 System mit einer Vielzahl von DRAMS und einem Bus
DE1991633611 Expired - Lifetime DE69133611D1 (de) 1990-04-18 1991-04-16 Integrierte E/A-Schaltung, die eine Hochleistungsbusschnittstelle benutzt
DE1991633598 Expired - Lifetime DE69133598D1 (de) 1990-04-18 1991-04-16 Integrierte E/A-Schaltung, die eine Hochleistungsbusschnittstelle benutzt
DE2006125958 Pending DE06125958T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991633500 Expired - Lifetime DE69133500T2 (de) 1990-04-18 1991-04-16 DRAM Halbleitervorrichtung
DE2006125946 Pending DE06125946T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE2000100018 Pending DE00100018T1 (de) 1990-04-18 1991-04-16 Eingang/Ausgang einer integrierten Schaltung mit einer Hochleistungsbusschnittstelle
DE1991632121 Expired - Lifetime DE69132121T2 (de) 1990-04-18 1991-04-16 Halbleiterspeichervorrichtung

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