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Datenverarbeitungssystem mit sich um Zugriff auf verteilte Betriebsmittel bewerbenden Einheiten und mit auf den Status der verteilten Betriebsmittel reagierender Schiedsrichtereinheit

Info

Publication number
DE68928772D1
DE68928772D1 DE1989628772 DE68928772A DE68928772D1 DE 68928772 D1 DE68928772 D1 DE 68928772D1 DE 1989628772 DE1989628772 DE 1989628772 DE 68928772 A DE68928772 A DE 68928772A DE 68928772 D1 DE68928772 D1 DE 68928772D1
Authority
DE
Grant status
Grant
Patent type
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE1989628772
Other languages
English (en)
Other versions
DE68928772T2 (de )
Inventor
Carlo Bagnoli
Guido Perrella
Tommaso Majo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Qwest Communications International Inc
Original Assignee
Bull HN Information Systems Italia SpA
Qwest Communications International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Grant date

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G06F15/161Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a programme unit and a register, e.g. for a simultaneous processing of several programmes
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
DE1989628772 1988-11-18 1989-11-04 Datenverarbeitungssystem mit sich um Zugriff auf verteilte Betriebsmittel bewerbenden Einheiten und mit auf den Status der verteilten Betriebsmittel reagierender Schiedsrichtereinheit Expired - Fee Related DE68928772D1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IT2265188 1988-11-18

Publications (1)

Publication Number Publication Date
DE68928772D1 true DE68928772D1 (de) 1998-09-10

Family

ID=11198868

Family Applications (4)

Application Number Title Priority Date Filing Date
DE1989628772 Expired - Lifetime DE68928772T2 (de) 1988-11-18 1989-11-04 Datenverarbeitungssystem mit sich um Zugriff auf verteilte Betriebsmittel bewerbenden Einheiten und mit auf den Status der verteilten Betriebsmittel reagierender Schiedsrichtereinheit
DE1989628772 Expired - Fee Related DE68928772D1 (de) 1988-11-18 1989-11-04 Datenverarbeitungssystem mit sich um Zugriff auf verteilte Betriebsmittel bewerbenden Einheiten und mit auf den Status der verteilten Betriebsmittel reagierender Schiedsrichtereinheit
DE1989615701 Expired - Fee Related DE68915701D1 (de) 1988-11-18 1989-11-04 Multiprozessorsystem mit verteilten gemeinsamen Betriebsmitteln und mit Verklemmungsverhinderung.
DE1989615701 Expired - Lifetime DE68915701T2 (de) 1988-11-18 1989-11-04 Multiprozessorsystem mit verteilten gemeinsamen Betriebsmitteln und mit Verklemmungsverhinderung.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE1989628772 Expired - Lifetime DE68928772T2 (de) 1988-11-18 1989-11-04 Datenverarbeitungssystem mit sich um Zugriff auf verteilte Betriebsmittel bewerbenden Einheiten und mit auf den Status der verteilten Betriebsmittel reagierender Schiedsrichtereinheit

Family Applications After (2)

Application Number Title Priority Date Filing Date
DE1989615701 Expired - Fee Related DE68915701D1 (de) 1988-11-18 1989-11-04 Multiprozessorsystem mit verteilten gemeinsamen Betriebsmitteln und mit Verklemmungsverhinderung.
DE1989615701 Expired - Lifetime DE68915701T2 (de) 1988-11-18 1989-11-04 Multiprozessorsystem mit verteilten gemeinsamen Betriebsmitteln und mit Verklemmungsverhinderung.

Country Status (3)

Country Link
US (1) US5182808A (de)
DE (4) DE68928772T2 (de)
EP (2) EP0581335B1 (de)

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US5265257A (en) * 1990-06-22 1993-11-23 Digital Equipment Corporation Fast arbiter having easy scaling for large numbers of requesters, large numbers of resource types with multiple instances of each type, and selectable queuing disciplines
EP0537899B1 (de) * 1991-09-27 1999-12-15 Sun Microsystems, Inc. Verklemmungserkennung und Maskierung enthaltende Busarbitrierungsarchitektur
US5283870A (en) * 1991-10-04 1994-02-01 Bull Hn Information Systems Inc. Method and apparatus for avoiding processor deadly embrace in a multiprocessor system
US5426739A (en) * 1992-03-16 1995-06-20 Opti, Inc. Local bus - I/O Bus Computer Architecture
US5309568A (en) * 1992-03-16 1994-05-03 Opti, Inc. Local bus design
US5388224A (en) * 1992-04-24 1995-02-07 Digital Equipment Corporation Processor identification mechanism for a multiprocessor system
US5666511A (en) * 1992-10-08 1997-09-09 Fujitsu Limited Deadlock suppressing schemes in a raid system
US5500946A (en) * 1992-11-25 1996-03-19 Texas Instruments Incorporated Integrated dual bus controller
FR2708766B1 (fr) * 1993-08-03 1995-09-08 Bull Sa Procédé d'analyse d'interblocages dans un système d'exploitation.
US5708794A (en) * 1993-08-10 1998-01-13 Dell Usa, L.P. Multi-purpose usage of transaction backoff and bus architecture supporting same
WO1995020191A1 (en) * 1994-01-25 1995-07-27 Apple Computer, Inc. System and method for coordinating access to a bus
US5469435A (en) * 1994-01-25 1995-11-21 Apple Computer, Inc. Bus deadlock avoidance during master split-transactions
GB9405855D0 (en) * 1994-03-24 1994-05-11 Int Computers Ltd Computer system
US5586289A (en) * 1994-04-15 1996-12-17 David Sarnoff Research Center, Inc. Method and apparatus for accessing local storage within a parallel processing computer
US5878240A (en) * 1995-05-11 1999-03-02 Lucent Technologies, Inc. System and method for providing high speed memory access in a multiprocessor, multimemory environment
US5682537A (en) * 1995-08-31 1997-10-28 Unisys Corporation Object lock management system with improved local lock management and global deadlock detection in a parallel data processing system
KR0172310B1 (ko) * 1995-12-29 1999-03-30 김주용 교착 상태 방지를 위한 버스 유닛
US6006255A (en) * 1996-04-05 1999-12-21 International Business Machines Corporation Networked computer system and method of communicating using multiple request packet classes to prevent deadlock
US6085263A (en) * 1997-10-24 2000-07-04 Compaq Computer Corp. Method and apparatus for employing commit-signals and prefetching to maintain inter-reference ordering in a high-performance I/O processor
US6108737A (en) * 1997-10-24 2000-08-22 Compaq Computer Corporation Method and apparatus for reducing latency of inter-reference ordering in a multiprocessor system
US6055605A (en) * 1997-10-24 2000-04-25 Compaq Computer Corporation Technique for reducing latency of inter-reference ordering using commit signals in a multiprocessor system having shared caches
US6286090B1 (en) * 1998-05-26 2001-09-04 Compaq Computer Corporation Mechanism for selectively imposing interference order between page-table fetches and corresponding data fetches
US6792513B2 (en) 1999-12-29 2004-09-14 The Johns Hopkins University System, method, and computer program product for high speed backplane messaging
CA2322613A1 (en) 2000-10-06 2002-04-06 Ibm Canada Limited-Ibm Canada Limitee Latch mechanism for concurrent computing environments
US6795878B2 (en) * 2000-12-11 2004-09-21 International Business Machines Corporation Verifying cumulative ordering of memory instructions
GB0118294D0 (en) * 2001-07-27 2001-09-19 Ibm Method and system for deadlock detection and avoidance
US8473634B2 (en) * 2003-10-23 2013-06-25 Microsoft Corporation System and method for name resolution
US7185175B2 (en) * 2004-01-14 2007-02-27 International Business Machines Corporation Configurable bi-directional bus for communicating between autonomous units
US7694023B1 (en) 2006-01-24 2010-04-06 Lockheed Martin Corporation Routing a processor communication
WO2008154360A1 (en) * 2007-06-06 2008-12-18 Hunt Technologies, Llc Arbitration of memory transfers in a dsp system
US8429353B2 (en) * 2008-05-20 2013-04-23 Oracle America, Inc. Distributed home-node hub

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NL7907179A (nl) * 1979-09-27 1981-03-31 Philips Nv Signaalprocessorinrichting met voorwaardelijke- -interrupteenheid en multiprocessorsysteem met deze signaalprocessorinrichtingen.
US4698746A (en) * 1983-05-25 1987-10-06 Ramtek Corporation Multiprocessor communication method and apparatus
US4763249A (en) * 1983-09-22 1988-08-09 Digital Equipment Corporation Bus device for use in a computer system having a synchronous bus
US4807109A (en) * 1983-11-25 1989-02-21 Intel Corporation High speed synchronous/asynchronous local bus and data transfer method
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US4779089A (en) * 1985-11-27 1988-10-18 Tektronix, Inc. Bus arbitration controller
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US4949239A (en) * 1987-05-01 1990-08-14 Digital Equipment Corporation System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
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Also Published As

Publication number Publication date Type
EP0581335A2 (de) 1994-02-02 application
EP0369264A3 (en) 1990-07-18 application
DE68915701T2 (de) 1994-09-15 grant
EP0369264A2 (de) 1990-05-23 application
US5182808A (en) 1993-01-26 grant
EP0581335A3 (en) 1995-11-08 application
EP0369264B1 (de) 1994-06-01 grant
EP0581335B1 (de) 1998-08-05 grant
DE68928772T2 (de) 1999-04-08 grant
DE68915701D1 (de) 1994-07-07 grant

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: PATENTANWAELTE RUFF, WILHELM, BEIER, DAUSTER & PARTNER, 70173 STUTTGART

8339 Ceased/non-payment of the annual fee