DE602006007497D1 - Mehrstufiger analog/digital-umsetzer und verfahren zum kalibrieren des umsetzers - Google Patents

Mehrstufiger analog/digital-umsetzer und verfahren zum kalibrieren des umsetzers

Info

Publication number
DE602006007497D1
DE602006007497D1 DE602006007497T DE602006007497T DE602006007497D1 DE 602006007497 D1 DE602006007497 D1 DE 602006007497D1 DE 602006007497 T DE602006007497 T DE 602006007497T DE 602006007497 T DE602006007497 T DE 602006007497T DE 602006007497 D1 DE602006007497 D1 DE 602006007497D1
Authority
DE
Germany
Prior art keywords
calibrating
transfer
digital transformer
stage analog
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006007497T
Other languages
English (en)
Inventor
Giovanni Antonio Cesura
Roberto Giampiero Massolini
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=36540147&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE602006007497(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE602006007497D1 publication Critical patent/DE602006007497D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10—Calibration or testing
    • H03M1/1009—Calibration
    • H03M1/1033—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
    • H03M1/1057—Calibration over the full range of the converter, e.g. for correcting differential non-linearity by trimming, i.e. by individually adjusting at least part of the quantisation value generators or stages to their nominal values
    • H03M1/1061—Calibration over the full range of the converter, e.g. for correcting differential non-linearity by trimming, i.e. by individually adjusting at least part of the quantisation value generators or stages to their nominal values using digitally programmable trimming circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10—Calibration or testing
    • H03M1/1004—Calibration or testing without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/162—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in a single stage, i.e. recirculation type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/40—Analogue value compared with reference values sequentially only, e.g. successive approximation type recirculation type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/44—Sequential comparisons in series-connected stages with change in value of analogue signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Analogue/Digital Conversion (AREA)
DE602006007497T 2006-02-27 2006-02-27 Mehrstufiger analog/digital-umsetzer und verfahren zum kalibrieren des umsetzers Active DE602006007497D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IT2006/000117 WO2007096920A1 (en) 2006-02-27 2006-02-27 Multistage analog/digital converter and method for calibrating said converter

Publications (1)

Publication Number Publication Date
DE602006007497D1 true DE602006007497D1 (de) 2009-08-06

Family

ID=36540147

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006007497T Active DE602006007497D1 (de) 2006-02-27 2006-02-27 Mehrstufiger analog/digital-umsetzer und verfahren zum kalibrieren des umsetzers

Country Status (5)

Country Link
US (1) US7671769B2 (de)
EP (1) EP1989781B1 (de)
CN (1) CN101390291B (de)
DE (1) DE602006007497D1 (de)
WO (1) WO2007096920A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009091620A1 (en) * 2008-01-17 2009-07-23 President And Fellows Of Harvard College Digital background calibration in pipelined adcs
US7956787B2 (en) * 2008-12-19 2011-06-07 Silicon Laboratories Inc. SAR analog-to-digital converter having differing bit modes of operation
US8068045B2 (en) * 2010-03-01 2011-11-29 Analog Devices, Inc. Calibration methods and structures for pipelined converter systems
JP5436508B2 (ja) * 2011-09-22 2014-03-05 独立行政法人科学技術振興機構 アナログ‐デジタル変換器及びアナログ信号をデジタル信号に変換する方法
US8723707B2 (en) 2011-11-14 2014-05-13 Analog Devices, Inc. Correlation-based background calibration for reducing inter-stage gain error and non-linearity in pipelined analog-to-digital converters
US8604953B2 (en) * 2011-11-14 2013-12-10 Analog Devices, Inc. Calibrating timing, gain and bandwidth mismatch in interleaved ADCs
EP2660982A4 (de) * 2012-03-07 2015-08-05 Asahi Kasei Microdevices Corp Abtastschaltung, a/d-wandler, d/a-wandler und codec
US8942444B2 (en) 2012-08-17 2015-01-27 General Electric Company System and method for image compression in X-ray imaging systems
US8791845B2 (en) * 2012-08-31 2014-07-29 Texas Instruments Incorporated Circuitry and method for reducing area and power of a pipelince ADC
JP5926388B2 (ja) * 2012-09-07 2016-05-25 旭化成エレクトロニクス株式会社 サンプルホールド回路、ａ／ｄ変換器およびサンプルホールド回路のキャリブレーション方法
CN103124177B (zh) * 2013-02-27 2014-05-14 天津大学 一种循环模数转换器及数字校准方法
US8836558B1 (en) * 2013-03-15 2014-09-16 Analog Devices, Inc. Method and device for improving convergence time in correlation-based algorithms
CN111682877B (zh) * 2020-05-29 2023-04-28 成都华微电子科技股份有限公司 流水线模数转换器的模数转换方法、流水线模数转换器
US11831325B2 (en) * 2022-01-19 2023-11-28 Infineon Technologies Ag Homogeneity enforced calibration for pipelined ADC
US20230344438A1 (en) * 2022-04-25 2023-10-26 Dunmore Circuits, LLC Differential to single ended pipeline analog to digital converter
CN117389128B (zh) * 2023-12-08 2024-02-23 深圳市山海半导体科技有限公司 一种数字时钟自动校准方法及系统

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5621406A (en) * 1994-09-29 1997-04-15 Rosemount Inc. System for calibrating analog-to-digital converter
US5668549A (en) * 1994-11-10 1997-09-16 National Semiconductor Corporation Radix 2 architecture and calibration technique for pipelined analog to digital converters
KR100286322B1 (ko) * 1997-09-11 2001-04-16 김영환 아날로그/디지털변환회로
US6456223B1 (en) * 1999-12-28 2002-09-24 Texas Instruments Incorporated Pipelined analog to digital converter using digital mismatch noise cancellation
US6734818B2 (en) * 2000-02-22 2004-05-11 The Regents Of The University Of California Digital cancellation of D/A converter noise in pipelined A/D converters
SE516799C2 (sv) * 2000-04-25 2002-03-05 Ericsson Telefon Ab L M Ett förfarande och en anordning för kalibrering av A/D- omvandlare
US6515611B1 (en) * 2001-11-06 2003-02-04 Agere Systems Inc. Multistage analog-to-digital converter with amplifier component swapping for improved linearity
GB0216897D0 (en) * 2002-07-20 2002-08-28 Koninkl Philips Electronics Nv Switched-current analogue-to-digital converter
CN1499730A (zh) * 2002-11-08 2004-05-26 尹登庆 流水线结构的高速高精度模数转换器
US6822601B1 (en) * 2003-07-23 2004-11-23 Silicon Integrated Systems Corp. Background-calibrating pipelined analog-to-digital converter
US7035756B2 (en) * 2003-12-17 2006-04-25 Texas Instruments Incorporated Continuous digital background calibration in pipelined ADC architecture
US7289055B2 (en) * 2004-02-05 2007-10-30 Sanyo Electric Co., Ltd. Analog-digital converter with gain adjustment for high-speed operation
US7221299B2 (en) * 2004-06-12 2007-05-22 Nordic Semiconductor Asa Method and apparatus for an ADC circuit with wider input signal swing
US6967603B1 (en) * 2004-07-19 2005-11-22 Realtek Semiconductor Corp. ADC background calibration timing
TWI249903B (en) * 2005-03-16 2006-02-21 Univ Tsinghua Multi-step analog/digital converter and on-line calibration method thereof
US7352306B2 (en) * 2005-11-30 2008-04-01 Teradyne, Inc. Analog-to-digital converter with non-linearity compensation

Also Published As

Publication number Publication date
US7671769B2 (en) 2010-03-02
CN101390291B (zh) 2011-09-07
US20090102688A1 (en) 2009-04-23
WO2007096920A1 (en) 2007-08-30
EP1989781B1 (de) 2009-06-24
CN101390291A (zh) 2009-03-18
EP1989781A1 (de) 2008-11-12

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