DE602005018738D1 - Speichervorrichtung mit auf Zeitverschiebung basierender Referenzzellenemulation - Google Patents
Speichervorrichtung mit auf Zeitverschiebung basierender ReferenzzellenemulationInfo
- Publication number
- DE602005018738D1 DE602005018738D1 DE602005018738T DE602005018738T DE602005018738D1 DE 602005018738 D1 DE602005018738 D1 DE 602005018738D1 DE 602005018738 T DE602005018738 T DE 602005018738T DE 602005018738 T DE602005018738 T DE 602005018738T DE 602005018738 D1 DE602005018738 D1 DE 602005018738D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- reference cell
- time shift
- shift based
- based reference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
- G11C2211/5634—Reference cells
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05101660A EP1699055B1 (de) | 2005-03-03 | 2005-03-03 | Speichervorrichtung mit auf Zeitverschiebung basierender Referenzzellenemulation |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602005018738D1 true DE602005018738D1 (de) | 2010-02-25 |
Family
ID=34938879
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602005018738T Active DE602005018738D1 (de) | 2005-03-03 | 2005-03-03 | Speichervorrichtung mit auf Zeitverschiebung basierender Referenzzellenemulation |
Country Status (3)
Country | Link |
---|---|
US (1) | US7345905B2 (de) |
EP (1) | EP1699055B1 (de) |
DE (1) | DE602005018738D1 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ITTO20040470A1 (it) * | 2004-07-08 | 2004-10-08 | St Microelectronics Srl | Circuito di lettura/verifica di celle di memoria multilivello con tensione di lettura a rampa e relativo metodo di lettura/verifica. |
DE602005004253T2 (de) * | 2005-01-28 | 2009-01-08 | Stmicroelectronics S.R.L., Agrate Brianza | Speicher, bei dem zum Lesen an die Wortleitung eine Spannungs-Rampe angelegt wird, die mit einem Stromgenerator erzeugt wird |
EP1699054A1 (de) | 2005-03-03 | 2006-09-06 | STMicroelectronics S.r.l. | Speichervorrichtung mit rampenartiger Vorspannungsanordnung und reduzierter Anzahl von Referenzzellen |
EP1843356A1 (de) | 2006-04-03 | 2007-10-10 | STMicroelectronics S.r.l. | Verfahren und System zur Aktualisierung einer Speichervorrichtung während ihres Lesens |
KR100822560B1 (ko) * | 2006-09-04 | 2008-04-16 | 주식회사 하이닉스반도체 | 낸드 플래시 메모리의 전류 측정 회로 |
US7787282B2 (en) | 2008-03-21 | 2010-08-31 | Micron Technology, Inc. | Sensing resistance variable memory |
US7787307B2 (en) * | 2008-12-08 | 2010-08-31 | Micron Technology, Inc. | Memory cell shift estimation method and apparatus |
JPWO2011033701A1 (ja) * | 2009-09-16 | 2013-02-07 | パナソニック株式会社 | 半導体記憶装置 |
US8625345B2 (en) | 2011-07-27 | 2014-01-07 | Micron Technology, Inc. | Determining and transferring data from a memory array |
US10153022B1 (en) | 2017-06-09 | 2018-12-11 | Micron Technology, Inc | Time-based access of a memory cell |
US10153021B1 (en) | 2017-06-09 | 2018-12-11 | Micron Technology, Inc. | Time-based access of a memory cell |
US10431301B2 (en) | 2017-12-22 | 2019-10-01 | Micron Technology, Inc. | Auto-referenced memory cell read techniques |
US10566052B2 (en) | 2017-12-22 | 2020-02-18 | Micron Technology, Inc. | Auto-referenced memory cell read techniques |
US10607664B2 (en) | 2018-03-22 | 2020-03-31 | Micron Technology, Inc. | Sub-threshold voltage leakage current tracking |
US10424372B1 (en) | 2018-04-19 | 2019-09-24 | Micron Technology, Inc. | Apparatuses and methods for sensing memory cells |
US10796755B2 (en) | 2018-04-19 | 2020-10-06 | Micron Technology, Inc. | Permutation coding for improved memory cell operations |
JP2021047966A (ja) * | 2019-09-19 | 2021-03-25 | キオクシア株式会社 | 半導体メモリ装置及び方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4495602A (en) * | 1981-12-28 | 1985-01-22 | Mostek Corporation | Multi-bit read only memory circuit |
US5967976A (en) * | 1994-08-19 | 1999-10-19 | Novoste Corporation | Apparatus and methods for procedures related to the electrophysiology of the heart |
US5634924A (en) * | 1995-08-28 | 1997-06-03 | Symbiosis Corporation | Bipolar roller electrodes and electrocautery probes for use with a resectoscope |
US5694366A (en) * | 1996-05-01 | 1997-12-02 | Micron Quantum Devices, Inc. | OP amp circuit with variable resistance and memory system including same |
US6091995A (en) * | 1996-11-08 | 2000-07-18 | Surx, Inc. | Devices, methods, and systems for shrinking tissues |
TW367503B (en) * | 1996-11-29 | 1999-08-21 | Sanyo Electric Co | Non-volatile semiconductor device |
DE69723814D1 (de) * | 1997-05-09 | 2003-09-04 | St Microelectronics Srl | Verfahren und Vorrichtung zum Analogprogrammieren von nichtflüchtigen Speicherzellen, insbesondere für Flash-Speicherzellen |
US6953461B2 (en) * | 2002-05-16 | 2005-10-11 | Tissuelink Medical, Inc. | Fluid-assisted medical devices, systems and methods |
JP3653449B2 (ja) * | 2000-06-15 | 2005-05-25 | シャープ株式会社 | 不揮発性半導体記憶装置 |
JP4790268B2 (ja) * | 2002-10-23 | 2011-10-12 | パロマー・メディカル・テクノロジーズ・インコーポレイテッド | 冷却剤及び局所物質と共に使用する光処理装置 |
US20040181214A1 (en) * | 2003-03-13 | 2004-09-16 | Garabedian Robert J. | Passively cooled array |
EP1467377B1 (de) | 2003-04-10 | 2007-11-28 | STMicroelectronics S.r.l. | Leseverfahren eines nichtflüchtigen Halbleiterspeichers und zugehörige Vorrichtung |
IL161648A0 (en) * | 2003-04-29 | 2004-09-27 | Saifun Semiconductors Ltd | Apparatus and methods for multi-level sensing in a memory array |
-
2005
- 2005-03-03 DE DE602005018738T patent/DE602005018738D1/de active Active
- 2005-03-03 EP EP05101660A patent/EP1699055B1/de active Active
-
2006
- 2006-03-02 US US11/367,707 patent/US7345905B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1699055A1 (de) | 2006-09-06 |
US7345905B2 (en) | 2008-03-18 |
EP1699055B1 (de) | 2010-01-06 |
US20060209594A1 (en) | 2006-09-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |