DE3874923D1 - Speichereinheit. - Google Patents

Speichereinheit.

Info

Publication number
DE3874923D1
DE3874923D1 DE8888302167T DE3874923T DE3874923D1 DE 3874923 D1 DE3874923 D1 DE 3874923D1 DE 8888302167 T DE8888302167 T DE 8888302167T DE 3874923 T DE3874923 T DE 3874923T DE 3874923 D1 DE3874923 D1 DE 3874923D1
Authority
DE
Germany
Prior art keywords
storage unit
storage
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888302167T
Other languages
English (en)
Other versions
DE3874923T2 (de
Inventor
Tomoaki C O Brother Ko Hattori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Brother Industries Ltd
Original Assignee
Brother Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Brother Industries Ltd filed Critical Brother Industries Ltd
Publication of DE3874923D1 publication Critical patent/DE3874923D1/de
Application granted granted Critical
Publication of DE3874923T2 publication Critical patent/DE3874923T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Memory System (AREA)
DE8888302167T 1987-03-13 1988-03-11 Speichereinheit. Expired - Fee Related DE3874923T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62059797A JPS63225836A (ja) 1987-03-13 1987-03-13 記憶装置

Publications (2)

Publication Number Publication Date
DE3874923D1 true DE3874923D1 (de) 1992-11-05
DE3874923T2 DE3874923T2 (de) 1993-03-04

Family

ID=13123627

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888302167T Expired - Fee Related DE3874923T2 (de) 1987-03-13 1988-03-11 Speichereinheit.

Country Status (4)

Country Link
US (1) US4788666A (de)
EP (1) EP0283223B1 (de)
JP (1) JPS63225836A (de)
DE (1) DE3874923T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010211618A (ja) * 2009-03-11 2010-09-24 Toshiba Corp 半導体記憶装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56143049A (en) * 1980-04-04 1981-11-07 Komatsu Ltd Output circuit
US4415972A (en) * 1980-12-29 1983-11-15 Sperry Corporation Dual port memory interlock
US4395765A (en) * 1981-04-23 1983-07-26 Bell Telephone Laboratories, Incorporated Multiport memory array
JPS6052513B2 (ja) * 1981-12-02 1985-11-19 富士通株式会社 半導体記憶装置
JPS59154564A (ja) * 1983-02-24 1984-09-03 Hitachi Ltd プログラマブルコントロ−ラ
US4558433A (en) * 1983-05-31 1985-12-10 International Business Machines Corporation Multi-port register implementations
JPS6029860A (ja) * 1983-07-18 1985-02-15 Fuji Electric Co Ltd デ−タの更新方法
US4577293A (en) * 1984-06-01 1986-03-18 International Business Machines Corporation Distributed, on-chip cache
US4623990A (en) * 1984-10-31 1986-11-18 Advanced Micro Devices, Inc. Dual-port read/write RAM with single array

Also Published As

Publication number Publication date
EP0283223B1 (de) 1992-09-30
EP0283223A3 (en) 1990-01-10
EP0283223A2 (de) 1988-09-21
US4788666A (en) 1988-11-29
JPS63225836A (ja) 1988-09-20
DE3874923T2 (de) 1993-03-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee